1 /* Driver for Realtek PCI-Express card reader 2 * 3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2, or (at your option) any 8 * later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, see <http://www.gnu.org/licenses/>. 17 * 18 * Author: 19 * Wei WANG <wei_wang@realsil.com.cn> 20 */ 21 22 #ifndef __RTSX_PCR_H 23 #define __RTSX_PCR_H 24 25 #include <linux/rtsx_pci.h> 26 27 #define MIN_DIV_N_PCR 80 28 #define MAX_DIV_N_PCR 208 29 30 #define RTS522A_PM_CTRL3 0xFF7E 31 32 #define RTS524A_PME_FORCE_CTL 0xFF78 33 #define RTS524A_PM_CTRL3 0xFF7E 34 35 #define LTR_ACTIVE_LATENCY_DEF 0x883C 36 #define LTR_IDLE_LATENCY_DEF 0x892C 37 #define LTR_L1OFF_LATENCY_DEF 0x9003 38 #define L1_SNOOZE_DELAY_DEF 1 39 #define LTR_L1OFF_SSPWRGATE_5249_DEF 0xAF 40 #define LTR_L1OFF_SSPWRGATE_5250_DEF 0xFF 41 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC 42 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8 43 #define CMD_TIMEOUT_DEF 100 44 #define ASPM_MASK_NEG 0xFC 45 #define MASK_8_BIT_DEF 0xFF 46 47 #define SSC_CLOCK_STABLE_WAIT 130 48 49 #define RTS524A_OCP_THD_800 0x04 50 #define RTS525A_OCP_THD_800 0x05 51 #define RTS522A_OCP_THD_800 0x06 52 53 54 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val); 55 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val); 56 57 void rts5209_init_params(struct rtsx_pcr *pcr); 58 void rts5229_init_params(struct rtsx_pcr *pcr); 59 void rtl8411_init_params(struct rtsx_pcr *pcr); 60 void rtl8402_init_params(struct rtsx_pcr *pcr); 61 void rts5227_init_params(struct rtsx_pcr *pcr); 62 void rts522a_init_params(struct rtsx_pcr *pcr); 63 void rts5249_init_params(struct rtsx_pcr *pcr); 64 void rts524a_init_params(struct rtsx_pcr *pcr); 65 void rts525a_init_params(struct rtsx_pcr *pcr); 66 void rtl8411b_init_params(struct rtsx_pcr *pcr); 67 void rts5260_init_params(struct rtsx_pcr *pcr); 68 69 static inline u8 map_sd_drive(int idx) 70 { 71 u8 sd_drive[4] = { 72 0x01, /* Type D */ 73 0x02, /* Type C */ 74 0x05, /* Type A */ 75 0x03 /* Type B */ 76 }; 77 78 return sd_drive[idx]; 79 } 80 81 #define rtsx_vendor_setting_valid(reg) (!((reg) & 0x1000000)) 82 #define rts5209_vendor_setting1_valid(reg) (!((reg) & 0x80)) 83 #define rts5209_vendor_setting2_valid(reg) ((reg) & 0x80) 84 85 #define rtsx_reg_to_aspm(reg) (((reg) >> 28) & 0x03) 86 #define rtsx_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 26) & 0x03) 87 #define rtsx_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x03) 88 #define rtsx_reg_to_card_drive_sel(reg) ((((reg) >> 25) & 0x01) << 6) 89 #define rtsx_reg_check_reverse_socket(reg) ((reg) & 0x4000) 90 #define rts5209_reg_to_aspm(reg) (((reg) >> 5) & 0x03) 91 #define rts5209_reg_check_ms_pmos(reg) (!((reg) & 0x08)) 92 #define rts5209_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 3) & 0x07) 93 #define rts5209_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x07) 94 #define rts5209_reg_to_card_drive_sel(reg) ((reg) >> 8) 95 #define rtl8411_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x07) 96 #define rtl8411b_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x03) 97 98 #define set_pull_ctrl_tables(pcr, __device) \ 99 do { \ 100 pcr->sd_pull_ctl_enable_tbl = __device##_sd_pull_ctl_enable_tbl; \ 101 pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \ 102 pcr->ms_pull_ctl_enable_tbl = __device##_ms_pull_ctl_enable_tbl; \ 103 pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \ 104 } while (0) 105 106 /* generic operations */ 107 int rtsx_gops_pm_reset(struct rtsx_pcr *pcr); 108 int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency); 109 int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val); 110 void rtsx_pci_init_ocp(struct rtsx_pcr *pcr); 111 void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr); 112 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr); 113 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val); 114 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr); 115 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr); 116 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr); 117 118 #endif 119