1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2018-2020 Broadcom. 4 */ 5 6 #include <linux/delay.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/firmware.h> 9 #include <linux/fs.h> 10 #include <linux/idr.h> 11 #include <linux/interrupt.h> 12 #include <linux/kref.h> 13 #include <linux/module.h> 14 #include <linux/mutex.h> 15 #include <linux/pci.h> 16 #include <linux/pci_regs.h> 17 #include <uapi/linux/misc/bcm_vk.h> 18 19 #include "bcm_vk.h" 20 21 #define PCI_DEVICE_ID_VALKYRIE 0x5e87 22 #define PCI_DEVICE_ID_VIPER 0x5e88 23 24 static DEFINE_IDA(bcm_vk_ida); 25 26 enum soc_idx { 27 VALKYRIE_A0 = 0, 28 VALKYRIE_B0, 29 VIPER, 30 VK_IDX_INVALID 31 }; 32 33 enum img_idx { 34 IMG_PRI = 0, 35 IMG_SEC, 36 IMG_PER_TYPE_MAX 37 }; 38 39 struct load_image_entry { 40 const u32 image_type; 41 const char *image_name[IMG_PER_TYPE_MAX]; 42 }; 43 44 #define NUM_BOOT_STAGES 2 45 /* default firmware images names */ 46 static const struct load_image_entry image_tab[][NUM_BOOT_STAGES] = { 47 [VALKYRIE_A0] = { 48 {VK_IMAGE_TYPE_BOOT1, {"vk_a0-boot1.bin", "vk-boot1.bin"}}, 49 {VK_IMAGE_TYPE_BOOT2, {"vk_a0-boot2.bin", "vk-boot2.bin"}} 50 }, 51 [VALKYRIE_B0] = { 52 {VK_IMAGE_TYPE_BOOT1, {"vk_b0-boot1.bin", "vk-boot1.bin"}}, 53 {VK_IMAGE_TYPE_BOOT2, {"vk_b0-boot2.bin", "vk-boot2.bin"}} 54 }, 55 56 [VIPER] = { 57 {VK_IMAGE_TYPE_BOOT1, {"vp-boot1.bin", ""}}, 58 {VK_IMAGE_TYPE_BOOT2, {"vp-boot2.bin", ""}} 59 }, 60 }; 61 62 /* Location of memory base addresses of interest in BAR1 */ 63 /* Load Boot1 to start of ITCM */ 64 #define BAR1_CODEPUSH_BASE_BOOT1 0x100000 65 66 /* Allow minimum 1s for Load Image timeout responses */ 67 #define LOAD_IMAGE_TIMEOUT_MS (1 * MSEC_PER_SEC) 68 69 /* Image startup timeouts */ 70 #define BOOT1_STARTUP_TIMEOUT_MS (5 * MSEC_PER_SEC) 71 #define BOOT2_STARTUP_TIMEOUT_MS (10 * MSEC_PER_SEC) 72 73 /* 1ms wait for checking the transfer complete status */ 74 #define TXFR_COMPLETE_TIMEOUT_MS 1 75 76 /* MSIX usages */ 77 #define VK_MSIX_MSGQ_MAX 3 78 #define VK_MSIX_NOTF_MAX 1 79 #define VK_MSIX_TTY_MAX BCM_VK_NUM_TTY 80 #define VK_MSIX_IRQ_MAX (VK_MSIX_MSGQ_MAX + VK_MSIX_NOTF_MAX + \ 81 VK_MSIX_TTY_MAX) 82 #define VK_MSIX_IRQ_MIN_REQ (VK_MSIX_MSGQ_MAX + VK_MSIX_NOTF_MAX) 83 84 /* Number of bits set in DMA mask*/ 85 #define BCM_VK_DMA_BITS 64 86 87 /* Ucode boot wait time */ 88 #define BCM_VK_UCODE_BOOT_US (100 * USEC_PER_MSEC) 89 /* 50% margin */ 90 #define BCM_VK_UCODE_BOOT_MAX_US ((BCM_VK_UCODE_BOOT_US * 3) >> 1) 91 92 /* deinit time for the card os after receiving doorbell */ 93 #define BCM_VK_DEINIT_TIME_MS (2 * MSEC_PER_SEC) 94 95 /* 96 * module parameters 97 */ 98 static bool auto_load = true; 99 module_param(auto_load, bool, 0444); 100 MODULE_PARM_DESC(auto_load, 101 "Load images automatically at PCIe probe time.\n"); 102 static uint nr_scratch_pages = VK_BAR1_SCRATCH_DEF_NR_PAGES; 103 module_param(nr_scratch_pages, uint, 0444); 104 MODULE_PARM_DESC(nr_scratch_pages, 105 "Number of pre allocated DMAable coherent pages.\n"); 106 static uint nr_ib_sgl_blk = BCM_VK_DEF_IB_SGL_BLK_LEN; 107 module_param(nr_ib_sgl_blk, uint, 0444); 108 MODULE_PARM_DESC(nr_ib_sgl_blk, 109 "Number of in-band msg blks for short SGL.\n"); 110 111 /* 112 * alerts that could be generated from peer 113 */ 114 const struct bcm_vk_entry bcm_vk_peer_err[BCM_VK_PEER_ERR_NUM] = { 115 {ERR_LOG_UECC, ERR_LOG_UECC, "uecc"}, 116 {ERR_LOG_SSIM_BUSY, ERR_LOG_SSIM_BUSY, "ssim_busy"}, 117 {ERR_LOG_AFBC_BUSY, ERR_LOG_AFBC_BUSY, "afbc_busy"}, 118 {ERR_LOG_HIGH_TEMP_ERR, ERR_LOG_HIGH_TEMP_ERR, "high_temp"}, 119 {ERR_LOG_WDOG_TIMEOUT, ERR_LOG_WDOG_TIMEOUT, "wdog_timeout"}, 120 {ERR_LOG_SYS_FAULT, ERR_LOG_SYS_FAULT, "sys_fault"}, 121 {ERR_LOG_RAMDUMP, ERR_LOG_RAMDUMP, "ramdump"}, 122 {ERR_LOG_COP_WDOG_TIMEOUT, ERR_LOG_COP_WDOG_TIMEOUT, 123 "cop_wdog_timeout"}, 124 {ERR_LOG_MEM_ALLOC_FAIL, ERR_LOG_MEM_ALLOC_FAIL, "malloc_fail warn"}, 125 {ERR_LOG_LOW_TEMP_WARN, ERR_LOG_LOW_TEMP_WARN, "low_temp warn"}, 126 {ERR_LOG_ECC, ERR_LOG_ECC, "ecc"}, 127 {ERR_LOG_IPC_DWN, ERR_LOG_IPC_DWN, "ipc_down"}, 128 }; 129 130 /* alerts detected by the host */ 131 const struct bcm_vk_entry bcm_vk_host_err[BCM_VK_HOST_ERR_NUM] = { 132 {ERR_LOG_HOST_PCIE_DWN, ERR_LOG_HOST_PCIE_DWN, "PCIe_down"}, 133 {ERR_LOG_HOST_HB_FAIL, ERR_LOG_HOST_HB_FAIL, "hb_fail"}, 134 {ERR_LOG_HOST_INTF_V_FAIL, ERR_LOG_HOST_INTF_V_FAIL, "intf_ver_fail"}, 135 }; 136 137 irqreturn_t bcm_vk_notf_irqhandler(int irq, void *dev_id) 138 { 139 struct bcm_vk *vk = dev_id; 140 141 if (!bcm_vk_drv_access_ok(vk)) { 142 dev_err(&vk->pdev->dev, 143 "Interrupt %d received when msgq not inited\n", irq); 144 goto skip_schedule_work; 145 } 146 147 /* if notification is not pending, set bit and schedule work */ 148 if (test_and_set_bit(BCM_VK_WQ_NOTF_PEND, vk->wq_offload) == 0) 149 queue_work(vk->wq_thread, &vk->wq_work); 150 151 skip_schedule_work: 152 return IRQ_HANDLED; 153 } 154 155 static int bcm_vk_intf_ver_chk(struct bcm_vk *vk) 156 { 157 struct device *dev = &vk->pdev->dev; 158 u32 reg; 159 u16 major, minor; 160 int ret = 0; 161 162 /* read interface register */ 163 reg = vkread32(vk, BAR_0, BAR_INTF_VER); 164 major = (reg >> BAR_INTF_VER_MAJOR_SHIFT) & BAR_INTF_VER_MASK; 165 minor = reg & BAR_INTF_VER_MASK; 166 167 /* 168 * if major number is 0, it is pre-release and it would be allowed 169 * to continue, else, check versions accordingly 170 */ 171 if (!major) { 172 dev_warn(dev, "Pre-release major.minor=%d.%d - drv %d.%d\n", 173 major, minor, SEMANTIC_MAJOR, SEMANTIC_MINOR); 174 } else if (major != SEMANTIC_MAJOR) { 175 dev_err(dev, 176 "Intf major.minor=%d.%d rejected - drv %d.%d\n", 177 major, minor, SEMANTIC_MAJOR, SEMANTIC_MINOR); 178 bcm_vk_set_host_alert(vk, ERR_LOG_HOST_INTF_V_FAIL); 179 ret = -EPFNOSUPPORT; 180 } else { 181 dev_dbg(dev, 182 "Intf major.minor=%d.%d passed - drv %d.%d\n", 183 major, minor, SEMANTIC_MAJOR, SEMANTIC_MINOR); 184 } 185 return ret; 186 } 187 188 static void bcm_vk_log_notf(struct bcm_vk *vk, 189 struct bcm_vk_alert *alert, 190 struct bcm_vk_entry const *entry_tab, 191 const u32 table_size) 192 { 193 u32 i; 194 u32 masked_val, latched_val; 195 struct bcm_vk_entry const *entry; 196 u32 reg; 197 u16 ecc_mem_err, uecc_mem_err; 198 struct device *dev = &vk->pdev->dev; 199 200 for (i = 0; i < table_size; i++) { 201 entry = &entry_tab[i]; 202 masked_val = entry->mask & alert->notfs; 203 latched_val = entry->mask & alert->flags; 204 205 if (masked_val == ERR_LOG_UECC) { 206 /* 207 * if there is difference between stored cnt and it 208 * is greater than threshold, log it. 209 */ 210 reg = vkread32(vk, BAR_0, BAR_CARD_ERR_MEM); 211 BCM_VK_EXTRACT_FIELD(uecc_mem_err, reg, 212 BCM_VK_MEM_ERR_FIELD_MASK, 213 BCM_VK_UECC_MEM_ERR_SHIFT); 214 if ((uecc_mem_err != vk->alert_cnts.uecc) && 215 (uecc_mem_err >= BCM_VK_UECC_THRESHOLD)) 216 dev_info(dev, 217 "ALERT! %s.%d uecc RAISED - ErrCnt %d\n", 218 DRV_MODULE_NAME, vk->devid, 219 uecc_mem_err); 220 vk->alert_cnts.uecc = uecc_mem_err; 221 } else if (masked_val == ERR_LOG_ECC) { 222 reg = vkread32(vk, BAR_0, BAR_CARD_ERR_MEM); 223 BCM_VK_EXTRACT_FIELD(ecc_mem_err, reg, 224 BCM_VK_MEM_ERR_FIELD_MASK, 225 BCM_VK_ECC_MEM_ERR_SHIFT); 226 if ((ecc_mem_err != vk->alert_cnts.ecc) && 227 (ecc_mem_err >= BCM_VK_ECC_THRESHOLD)) 228 dev_info(dev, "ALERT! %s.%d ecc RAISED - ErrCnt %d\n", 229 DRV_MODULE_NAME, vk->devid, 230 ecc_mem_err); 231 vk->alert_cnts.ecc = ecc_mem_err; 232 } else if (masked_val != latched_val) { 233 /* print a log as info */ 234 dev_info(dev, "ALERT! %s.%d %s %s\n", 235 DRV_MODULE_NAME, vk->devid, entry->str, 236 masked_val ? "RAISED" : "CLEARED"); 237 } 238 } 239 } 240 241 static void bcm_vk_dump_peer_log(struct bcm_vk *vk) 242 { 243 struct bcm_vk_peer_log log; 244 struct bcm_vk_peer_log *log_info = &vk->peerlog_info; 245 char loc_buf[BCM_VK_PEER_LOG_LINE_MAX]; 246 int cnt; 247 struct device *dev = &vk->pdev->dev; 248 unsigned int data_offset; 249 250 memcpy_fromio(&log, vk->bar[BAR_2] + vk->peerlog_off, sizeof(log)); 251 252 dev_dbg(dev, "Peer PANIC: Size 0x%x(0x%x), [Rd Wr] = [%d %d]\n", 253 log.buf_size, log.mask, log.rd_idx, log.wr_idx); 254 255 if (!log_info->buf_size) { 256 dev_err(dev, "Peer log dump disabled - skipped!\n"); 257 return; 258 } 259 260 /* perform range checking for rd/wr idx */ 261 if ((log.rd_idx > log_info->mask) || 262 (log.wr_idx > log_info->mask) || 263 (log.buf_size != log_info->buf_size) || 264 (log.mask != log_info->mask)) { 265 dev_err(dev, 266 "Corrupted Ptrs: Size 0x%x(0x%x) Mask 0x%x(0x%x) [Rd Wr] = [%d %d], skip log dump.\n", 267 log_info->buf_size, log.buf_size, 268 log_info->mask, log.mask, 269 log.rd_idx, log.wr_idx); 270 return; 271 } 272 273 cnt = 0; 274 data_offset = vk->peerlog_off + sizeof(struct bcm_vk_peer_log); 275 loc_buf[BCM_VK_PEER_LOG_LINE_MAX - 1] = '\0'; 276 while (log.rd_idx != log.wr_idx) { 277 loc_buf[cnt] = vkread8(vk, BAR_2, data_offset + log.rd_idx); 278 279 if ((loc_buf[cnt] == '\0') || 280 (cnt == (BCM_VK_PEER_LOG_LINE_MAX - 1))) { 281 dev_err(dev, "%s", loc_buf); 282 cnt = 0; 283 } else { 284 cnt++; 285 } 286 log.rd_idx = (log.rd_idx + 1) & log.mask; 287 } 288 /* update rd idx at the end */ 289 vkwrite32(vk, log.rd_idx, BAR_2, 290 vk->peerlog_off + offsetof(struct bcm_vk_peer_log, rd_idx)); 291 } 292 293 void bcm_vk_handle_notf(struct bcm_vk *vk) 294 { 295 u32 reg; 296 struct bcm_vk_alert alert; 297 bool intf_down; 298 unsigned long flags; 299 300 /* handle peer alerts and then locally detected ones */ 301 reg = vkread32(vk, BAR_0, BAR_CARD_ERR_LOG); 302 intf_down = BCM_VK_INTF_IS_DOWN(reg); 303 if (!intf_down) { 304 vk->peer_alert.notfs = reg; 305 bcm_vk_log_notf(vk, &vk->peer_alert, bcm_vk_peer_err, 306 ARRAY_SIZE(bcm_vk_peer_err)); 307 vk->peer_alert.flags = vk->peer_alert.notfs; 308 } else { 309 /* turn off access */ 310 bcm_vk_blk_drv_access(vk); 311 } 312 313 /* check and make copy of alert with lock and then free lock */ 314 spin_lock_irqsave(&vk->host_alert_lock, flags); 315 if (intf_down) 316 vk->host_alert.notfs |= ERR_LOG_HOST_PCIE_DWN; 317 318 alert = vk->host_alert; 319 vk->host_alert.flags = vk->host_alert.notfs; 320 spin_unlock_irqrestore(&vk->host_alert_lock, flags); 321 322 /* call display with copy */ 323 bcm_vk_log_notf(vk, &alert, bcm_vk_host_err, 324 ARRAY_SIZE(bcm_vk_host_err)); 325 326 /* 327 * If it is a sys fault or heartbeat timeout, we would like extract 328 * log msg from the card so that we would know what is the last fault 329 */ 330 if (!intf_down && 331 ((vk->host_alert.flags & ERR_LOG_HOST_HB_FAIL) || 332 (vk->peer_alert.flags & ERR_LOG_SYS_FAULT))) 333 bcm_vk_dump_peer_log(vk); 334 } 335 336 static inline int bcm_vk_wait(struct bcm_vk *vk, enum pci_barno bar, 337 u64 offset, u32 mask, u32 value, 338 unsigned long timeout_ms) 339 { 340 struct device *dev = &vk->pdev->dev; 341 unsigned long start_time; 342 unsigned long timeout; 343 u32 rd_val, boot_status; 344 345 start_time = jiffies; 346 timeout = start_time + msecs_to_jiffies(timeout_ms); 347 348 do { 349 rd_val = vkread32(vk, bar, offset); 350 dev_dbg(dev, "BAR%d Offset=0x%llx: 0x%x\n", 351 bar, offset, rd_val); 352 353 /* check for any boot err condition */ 354 boot_status = vkread32(vk, BAR_0, BAR_BOOT_STATUS); 355 if (boot_status & BOOT_ERR_MASK) { 356 dev_err(dev, "Boot Err 0x%x, progress 0x%x after %d ms\n", 357 (boot_status & BOOT_ERR_MASK) >> BOOT_ERR_SHIFT, 358 boot_status & BOOT_PROG_MASK, 359 jiffies_to_msecs(jiffies - start_time)); 360 return -EFAULT; 361 } 362 363 if (time_after(jiffies, timeout)) 364 return -ETIMEDOUT; 365 366 cpu_relax(); 367 cond_resched(); 368 } while ((rd_val & mask) != value); 369 370 return 0; 371 } 372 373 static void bcm_vk_get_card_info(struct bcm_vk *vk) 374 { 375 struct device *dev = &vk->pdev->dev; 376 u32 offset; 377 int i; 378 u8 *dst; 379 struct bcm_vk_card_info *info = &vk->card_info; 380 381 /* first read the offset from spare register */ 382 offset = vkread32(vk, BAR_0, BAR_CARD_STATIC_INFO); 383 offset &= (pci_resource_len(vk->pdev, BAR_2 * 2) - 1); 384 385 /* based on the offset, read info to internal card info structure */ 386 dst = (u8 *)info; 387 for (i = 0; i < sizeof(*info); i++) 388 *dst++ = vkread8(vk, BAR_2, offset++); 389 390 #define CARD_INFO_LOG_FMT "version : %x\n" \ 391 "os_tag : %s\n" \ 392 "cmpt_tag : %s\n" \ 393 "cpu_freq : %d MHz\n" \ 394 "cpu_scale : %d full, %d lowest\n" \ 395 "ddr_freq : %d MHz\n" \ 396 "ddr_size : %d MB\n" \ 397 "video_freq: %d MHz\n" 398 dev_dbg(dev, CARD_INFO_LOG_FMT, info->version, info->os_tag, 399 info->cmpt_tag, info->cpu_freq_mhz, info->cpu_scale[0], 400 info->cpu_scale[MAX_OPP - 1], info->ddr_freq_mhz, 401 info->ddr_size_MB, info->video_core_freq_mhz); 402 403 /* 404 * get the peer log pointer, only need the offset, and get record 405 * of the log buffer information which would be used for checking 406 * before dump, in case the BAR2 memory has been corrupted. 407 */ 408 vk->peerlog_off = offset; 409 memcpy_fromio(&vk->peerlog_info, vk->bar[BAR_2] + vk->peerlog_off, 410 sizeof(vk->peerlog_info)); 411 412 /* 413 * Do a range checking and if out of bound, the record will be zeroed 414 * which guarantees that nothing would be dumped. In other words, 415 * peer dump is disabled. 416 */ 417 if ((vk->peerlog_info.buf_size > BCM_VK_PEER_LOG_BUF_MAX) || 418 (vk->peerlog_info.mask != (vk->peerlog_info.buf_size - 1)) || 419 (vk->peerlog_info.rd_idx > vk->peerlog_info.mask) || 420 (vk->peerlog_info.wr_idx > vk->peerlog_info.mask)) { 421 dev_err(dev, "Peer log disabled - range error: Size 0x%x(0x%x), [Rd Wr] = [%d %d]\n", 422 vk->peerlog_info.buf_size, 423 vk->peerlog_info.mask, 424 vk->peerlog_info.rd_idx, 425 vk->peerlog_info.wr_idx); 426 memset(&vk->peerlog_info, 0, sizeof(vk->peerlog_info)); 427 } else { 428 dev_dbg(dev, "Peer log: Size 0x%x(0x%x), [Rd Wr] = [%d %d]\n", 429 vk->peerlog_info.buf_size, 430 vk->peerlog_info.mask, 431 vk->peerlog_info.rd_idx, 432 vk->peerlog_info.wr_idx); 433 } 434 } 435 436 static void bcm_vk_get_proc_mon_info(struct bcm_vk *vk) 437 { 438 struct device *dev = &vk->pdev->dev; 439 struct bcm_vk_proc_mon_info *mon = &vk->proc_mon_info; 440 u32 num, entry_size, offset, buf_size; 441 u8 *dst; 442 443 /* calculate offset which is based on peerlog offset */ 444 buf_size = vkread32(vk, BAR_2, 445 vk->peerlog_off 446 + offsetof(struct bcm_vk_peer_log, buf_size)); 447 offset = vk->peerlog_off + sizeof(struct bcm_vk_peer_log) 448 + buf_size; 449 450 /* first read the num and entry size */ 451 num = vkread32(vk, BAR_2, offset); 452 entry_size = vkread32(vk, BAR_2, offset + sizeof(num)); 453 454 /* check for max allowed */ 455 if (num > BCM_VK_PROC_MON_MAX) { 456 dev_err(dev, "Processing monitoring entry %d exceeds max %d\n", 457 num, BCM_VK_PROC_MON_MAX); 458 return; 459 } 460 mon->num = num; 461 mon->entry_size = entry_size; 462 463 vk->proc_mon_off = offset; 464 465 /* read it once that will capture those static info */ 466 dst = (u8 *)&mon->entries[0]; 467 offset += sizeof(num) + sizeof(entry_size); 468 memcpy_fromio(dst, vk->bar[BAR_2] + offset, num * entry_size); 469 } 470 471 static int bcm_vk_sync_card_info(struct bcm_vk *vk) 472 { 473 u32 rdy_marker = vkread32(vk, BAR_1, VK_BAR1_MSGQ_DEF_RDY); 474 475 /* check for marker, but allow diags mode to skip sync */ 476 if (!bcm_vk_msgq_marker_valid(vk)) 477 return (rdy_marker == VK_BAR1_DIAG_RDY_MARKER ? 0 : -EINVAL); 478 479 /* 480 * Write down scratch addr which is used for DMA. For 481 * signed part, BAR1 is accessible only after boot2 has come 482 * up 483 */ 484 if (vk->tdma_addr) { 485 vkwrite32(vk, (u64)vk->tdma_addr >> 32, BAR_1, 486 VK_BAR1_SCRATCH_OFF_HI); 487 vkwrite32(vk, (u32)vk->tdma_addr, BAR_1, 488 VK_BAR1_SCRATCH_OFF_LO); 489 vkwrite32(vk, nr_scratch_pages * PAGE_SIZE, BAR_1, 490 VK_BAR1_SCRATCH_SZ_ADDR); 491 } 492 493 /* get static card info, only need to read once */ 494 bcm_vk_get_card_info(vk); 495 496 /* get the proc mon info once */ 497 bcm_vk_get_proc_mon_info(vk); 498 499 return 0; 500 } 501 502 void bcm_vk_blk_drv_access(struct bcm_vk *vk) 503 { 504 int i; 505 506 /* 507 * kill all the apps except for the process that is resetting. 508 * If not called during reset, reset_pid will be 0, and all will be 509 * killed. 510 */ 511 spin_lock(&vk->ctx_lock); 512 513 /* set msgq_inited to 0 so that all rd/wr will be blocked */ 514 atomic_set(&vk->msgq_inited, 0); 515 516 for (i = 0; i < VK_PID_HT_SZ; i++) { 517 struct bcm_vk_ctx *ctx; 518 519 list_for_each_entry(ctx, &vk->pid_ht[i].head, node) { 520 if (ctx->pid != vk->reset_pid) { 521 dev_dbg(&vk->pdev->dev, 522 "Send kill signal to pid %d\n", 523 ctx->pid); 524 kill_pid(find_vpid(ctx->pid), SIGKILL, 1); 525 } 526 } 527 } 528 spin_unlock(&vk->ctx_lock); 529 } 530 531 static void bcm_vk_buf_notify(struct bcm_vk *vk, void *bufp, 532 dma_addr_t host_buf_addr, u32 buf_size) 533 { 534 /* update the dma address to the card */ 535 vkwrite32(vk, (u64)host_buf_addr >> 32, BAR_1, 536 VK_BAR1_DMA_BUF_OFF_HI); 537 vkwrite32(vk, (u32)host_buf_addr, BAR_1, 538 VK_BAR1_DMA_BUF_OFF_LO); 539 vkwrite32(vk, buf_size, BAR_1, VK_BAR1_DMA_BUF_SZ); 540 } 541 542 static int bcm_vk_load_image_by_type(struct bcm_vk *vk, u32 load_type, 543 const char *filename) 544 { 545 struct device *dev = &vk->pdev->dev; 546 const struct firmware *fw = NULL; 547 void *bufp = NULL; 548 size_t max_buf, offset; 549 int ret; 550 u64 offset_codepush; 551 u32 codepush; 552 u32 value; 553 dma_addr_t boot_dma_addr; 554 bool is_stdalone; 555 556 if (load_type == VK_IMAGE_TYPE_BOOT1) { 557 /* 558 * After POR, enable VK soft BOOTSRC so bootrom do not clear 559 * the pushed image (the TCM memories). 560 */ 561 value = vkread32(vk, BAR_0, BAR_BOOTSRC_SELECT); 562 value |= BOOTSRC_SOFT_ENABLE; 563 vkwrite32(vk, value, BAR_0, BAR_BOOTSRC_SELECT); 564 565 codepush = CODEPUSH_BOOTSTART + CODEPUSH_BOOT1_ENTRY; 566 offset_codepush = BAR_CODEPUSH_SBL; 567 568 /* Write a 1 to request SRAM open bit */ 569 vkwrite32(vk, CODEPUSH_BOOTSTART, BAR_0, offset_codepush); 570 571 /* Wait for VK to respond */ 572 ret = bcm_vk_wait(vk, BAR_0, BAR_BOOT_STATUS, SRAM_OPEN, 573 SRAM_OPEN, LOAD_IMAGE_TIMEOUT_MS); 574 if (ret < 0) { 575 dev_err(dev, "boot1 wait SRAM err - ret(%d)\n", ret); 576 goto err_buf_out; 577 } 578 579 max_buf = SZ_256K; 580 bufp = dma_alloc_coherent(dev, 581 max_buf, 582 &boot_dma_addr, GFP_KERNEL); 583 if (!bufp) { 584 dev_err(dev, "Error allocating 0x%zx\n", max_buf); 585 ret = -ENOMEM; 586 goto err_buf_out; 587 } 588 } else if (load_type == VK_IMAGE_TYPE_BOOT2) { 589 codepush = CODEPUSH_BOOT2_ENTRY; 590 offset_codepush = BAR_CODEPUSH_SBI; 591 592 /* Wait for VK to respond */ 593 ret = bcm_vk_wait(vk, BAR_0, BAR_BOOT_STATUS, DDR_OPEN, 594 DDR_OPEN, LOAD_IMAGE_TIMEOUT_MS); 595 if (ret < 0) { 596 dev_err(dev, "boot2 wait DDR open error - ret(%d)\n", 597 ret); 598 goto err_buf_out; 599 } 600 601 max_buf = SZ_4M; 602 bufp = dma_alloc_coherent(dev, 603 max_buf, 604 &boot_dma_addr, GFP_KERNEL); 605 if (!bufp) { 606 dev_err(dev, "Error allocating 0x%zx\n", max_buf); 607 ret = -ENOMEM; 608 goto err_buf_out; 609 } 610 611 bcm_vk_buf_notify(vk, bufp, boot_dma_addr, max_buf); 612 } else { 613 dev_err(dev, "Error invalid image type 0x%x\n", load_type); 614 ret = -EINVAL; 615 goto err_buf_out; 616 } 617 618 offset = 0; 619 ret = request_partial_firmware_into_buf(&fw, filename, dev, 620 bufp, max_buf, offset); 621 if (ret) { 622 dev_err(dev, "Error %d requesting firmware file: %s\n", 623 ret, filename); 624 goto err_firmware_out; 625 } 626 dev_dbg(dev, "size=0x%zx\n", fw->size); 627 if (load_type == VK_IMAGE_TYPE_BOOT1) 628 memcpy_toio(vk->bar[BAR_1] + BAR1_CODEPUSH_BASE_BOOT1, 629 bufp, 630 fw->size); 631 632 dev_dbg(dev, "Signaling 0x%x to 0x%llx\n", codepush, offset_codepush); 633 vkwrite32(vk, codepush, BAR_0, offset_codepush); 634 635 if (load_type == VK_IMAGE_TYPE_BOOT1) { 636 u32 boot_status; 637 638 /* wait until done */ 639 ret = bcm_vk_wait(vk, BAR_0, BAR_BOOT_STATUS, 640 BOOT1_RUNNING, 641 BOOT1_RUNNING, 642 BOOT1_STARTUP_TIMEOUT_MS); 643 644 boot_status = vkread32(vk, BAR_0, BAR_BOOT_STATUS); 645 is_stdalone = !BCM_VK_INTF_IS_DOWN(boot_status) && 646 (boot_status & BOOT_STDALONE_RUNNING); 647 if (ret && !is_stdalone) { 648 dev_err(dev, 649 "Timeout %ld ms waiting for boot1 to come up - ret(%d)\n", 650 BOOT1_STARTUP_TIMEOUT_MS, ret); 651 goto err_firmware_out; 652 } else if (is_stdalone) { 653 u32 reg; 654 655 reg = vkread32(vk, BAR_0, BAR_BOOT1_STDALONE_PROGRESS); 656 if ((reg & BOOT1_STDALONE_PROGRESS_MASK) == 657 BOOT1_STDALONE_SUCCESS) { 658 dev_info(dev, "Boot1 standalone success\n"); 659 ret = 0; 660 } else { 661 dev_err(dev, "Timeout %ld ms - Boot1 standalone failure\n", 662 BOOT1_STARTUP_TIMEOUT_MS); 663 ret = -EINVAL; 664 goto err_firmware_out; 665 } 666 } 667 } else if (load_type == VK_IMAGE_TYPE_BOOT2) { 668 unsigned long timeout; 669 670 timeout = jiffies + msecs_to_jiffies(LOAD_IMAGE_TIMEOUT_MS); 671 672 /* To send more data to VK than max_buf allowed at a time */ 673 do { 674 /* 675 * Check for ack from card. when Ack is received, 676 * it means all the data is received by card. 677 * Exit the loop after ack is received. 678 */ 679 ret = bcm_vk_wait(vk, BAR_0, BAR_BOOT_STATUS, 680 FW_LOADER_ACK_RCVD_ALL_DATA, 681 FW_LOADER_ACK_RCVD_ALL_DATA, 682 TXFR_COMPLETE_TIMEOUT_MS); 683 if (ret == 0) { 684 dev_dbg(dev, "Exit boot2 download\n"); 685 break; 686 } else if (ret == -EFAULT) { 687 dev_err(dev, "Error detected during ACK waiting"); 688 goto err_firmware_out; 689 } 690 691 /* exit the loop, if there is no response from card */ 692 if (time_after(jiffies, timeout)) { 693 dev_err(dev, "Error. No reply from card\n"); 694 ret = -ETIMEDOUT; 695 goto err_firmware_out; 696 } 697 698 /* Wait for VK to open BAR space to copy new data */ 699 ret = bcm_vk_wait(vk, BAR_0, offset_codepush, 700 codepush, 0, 701 TXFR_COMPLETE_TIMEOUT_MS); 702 if (ret == 0) { 703 offset += max_buf; 704 ret = request_partial_firmware_into_buf 705 (&fw, 706 filename, 707 dev, bufp, 708 max_buf, 709 offset); 710 if (ret) { 711 dev_err(dev, 712 "Error %d requesting firmware file: %s offset: 0x%zx\n", 713 ret, filename, offset); 714 goto err_firmware_out; 715 } 716 dev_dbg(dev, "size=0x%zx\n", fw->size); 717 dev_dbg(dev, "Signaling 0x%x to 0x%llx\n", 718 codepush, offset_codepush); 719 vkwrite32(vk, codepush, BAR_0, offset_codepush); 720 /* reload timeout after every codepush */ 721 timeout = jiffies + 722 msecs_to_jiffies(LOAD_IMAGE_TIMEOUT_MS); 723 } else if (ret == -EFAULT) { 724 dev_err(dev, "Error detected waiting for transfer\n"); 725 goto err_firmware_out; 726 } 727 } while (1); 728 729 /* wait for fw status bits to indicate app ready */ 730 ret = bcm_vk_wait(vk, BAR_0, VK_BAR_FWSTS, 731 VK_FWSTS_READY, 732 VK_FWSTS_READY, 733 BOOT2_STARTUP_TIMEOUT_MS); 734 if (ret < 0) { 735 dev_err(dev, "Boot2 not ready - ret(%d)\n", ret); 736 goto err_firmware_out; 737 } 738 739 is_stdalone = vkread32(vk, BAR_0, BAR_BOOT_STATUS) & 740 BOOT_STDALONE_RUNNING; 741 if (!is_stdalone) { 742 ret = bcm_vk_intf_ver_chk(vk); 743 if (ret) { 744 dev_err(dev, "failure in intf version check\n"); 745 goto err_firmware_out; 746 } 747 748 /* 749 * Next, initialize Message Q if we are loading boot2. 750 * Do a force sync 751 */ 752 ret = bcm_vk_sync_msgq(vk, true); 753 if (ret) { 754 dev_err(dev, "Boot2 Error reading comm msg Q info\n"); 755 ret = -EIO; 756 goto err_firmware_out; 757 } 758 759 /* sync & channel other info */ 760 ret = bcm_vk_sync_card_info(vk); 761 if (ret) { 762 dev_err(dev, "Syncing Card Info failure\n"); 763 goto err_firmware_out; 764 } 765 } 766 } 767 768 err_firmware_out: 769 release_firmware(fw); 770 771 err_buf_out: 772 if (bufp) 773 dma_free_coherent(dev, max_buf, bufp, boot_dma_addr); 774 775 return ret; 776 } 777 778 static u32 bcm_vk_next_boot_image(struct bcm_vk *vk) 779 { 780 u32 boot_status; 781 u32 fw_status; 782 u32 load_type = 0; /* default for unknown */ 783 784 boot_status = vkread32(vk, BAR_0, BAR_BOOT_STATUS); 785 fw_status = vkread32(vk, BAR_0, VK_BAR_FWSTS); 786 787 if (!BCM_VK_INTF_IS_DOWN(boot_status) && (boot_status & SRAM_OPEN)) 788 load_type = VK_IMAGE_TYPE_BOOT1; 789 else if (boot_status == BOOT1_RUNNING) 790 load_type = VK_IMAGE_TYPE_BOOT2; 791 792 /* Log status so that we know different stages */ 793 dev_info(&vk->pdev->dev, 794 "boot-status value for next image: 0x%x : fw-status 0x%x\n", 795 boot_status, fw_status); 796 797 return load_type; 798 } 799 800 static enum soc_idx get_soc_idx(struct bcm_vk *vk) 801 { 802 struct pci_dev *pdev = vk->pdev; 803 enum soc_idx idx = VK_IDX_INVALID; 804 u32 rev; 805 static enum soc_idx const vk_soc_tab[] = { VALKYRIE_A0, VALKYRIE_B0 }; 806 807 switch (pdev->device) { 808 case PCI_DEVICE_ID_VALKYRIE: 809 /* get the chip id to decide sub-class */ 810 rev = MAJOR_SOC_REV(vkread32(vk, BAR_0, BAR_CHIP_ID)); 811 if (rev < ARRAY_SIZE(vk_soc_tab)) { 812 idx = vk_soc_tab[rev]; 813 } else { 814 /* Default to A0 firmware for all other chip revs */ 815 idx = VALKYRIE_A0; 816 dev_warn(&pdev->dev, 817 "Rev %d not in image lookup table, default to idx=%d\n", 818 rev, idx); 819 } 820 break; 821 822 case PCI_DEVICE_ID_VIPER: 823 idx = VIPER; 824 break; 825 826 default: 827 dev_err(&pdev->dev, "no images for 0x%x\n", pdev->device); 828 } 829 return idx; 830 } 831 832 static const char *get_load_fw_name(struct bcm_vk *vk, 833 const struct load_image_entry *entry) 834 { 835 const struct firmware *fw; 836 struct device *dev = &vk->pdev->dev; 837 int ret; 838 unsigned long dummy; 839 int i; 840 841 for (i = 0; i < IMG_PER_TYPE_MAX; i++) { 842 fw = NULL; 843 ret = request_partial_firmware_into_buf(&fw, 844 entry->image_name[i], 845 dev, &dummy, 846 sizeof(dummy), 847 0); 848 release_firmware(fw); 849 if (!ret) 850 return entry->image_name[i]; 851 } 852 return NULL; 853 } 854 855 int bcm_vk_auto_load_all_images(struct bcm_vk *vk) 856 { 857 int i, ret = -1; 858 enum soc_idx idx; 859 struct device *dev = &vk->pdev->dev; 860 u32 curr_type; 861 const char *curr_name; 862 863 idx = get_soc_idx(vk); 864 if (idx == VK_IDX_INVALID) 865 goto auto_load_all_exit; 866 867 /* log a message to know the relative loading order */ 868 dev_dbg(dev, "Load All for device %d\n", vk->devid); 869 870 for (i = 0; i < NUM_BOOT_STAGES; i++) { 871 curr_type = image_tab[idx][i].image_type; 872 if (bcm_vk_next_boot_image(vk) == curr_type) { 873 curr_name = get_load_fw_name(vk, &image_tab[idx][i]); 874 if (!curr_name) { 875 dev_err(dev, "No suitable firmware exists for type %d", 876 curr_type); 877 ret = -ENOENT; 878 goto auto_load_all_exit; 879 } 880 ret = bcm_vk_load_image_by_type(vk, curr_type, 881 curr_name); 882 dev_info(dev, "Auto load %s, ret %d\n", 883 curr_name, ret); 884 885 if (ret) { 886 dev_err(dev, "Error loading default %s\n", 887 curr_name); 888 goto auto_load_all_exit; 889 } 890 } 891 } 892 893 auto_load_all_exit: 894 return ret; 895 } 896 897 static int bcm_vk_trigger_autoload(struct bcm_vk *vk) 898 { 899 if (test_and_set_bit(BCM_VK_WQ_DWNLD_PEND, vk->wq_offload) != 0) 900 return -EPERM; 901 902 set_bit(BCM_VK_WQ_DWNLD_AUTO, vk->wq_offload); 903 queue_work(vk->wq_thread, &vk->wq_work); 904 905 return 0; 906 } 907 908 /* 909 * deferred work queue for draining and auto download. 910 */ 911 static void bcm_vk_wq_handler(struct work_struct *work) 912 { 913 struct bcm_vk *vk = container_of(work, struct bcm_vk, wq_work); 914 struct device *dev = &vk->pdev->dev; 915 s32 ret; 916 917 /* check wq offload bit map to perform various operations */ 918 if (test_bit(BCM_VK_WQ_NOTF_PEND, vk->wq_offload)) { 919 /* clear bit right the way for notification */ 920 clear_bit(BCM_VK_WQ_NOTF_PEND, vk->wq_offload); 921 bcm_vk_handle_notf(vk); 922 } 923 if (test_bit(BCM_VK_WQ_DWNLD_AUTO, vk->wq_offload)) { 924 bcm_vk_auto_load_all_images(vk); 925 926 /* 927 * at the end of operation, clear AUTO bit and pending 928 * bit 929 */ 930 clear_bit(BCM_VK_WQ_DWNLD_AUTO, vk->wq_offload); 931 clear_bit(BCM_VK_WQ_DWNLD_PEND, vk->wq_offload); 932 } 933 934 /* next, try to drain */ 935 ret = bcm_to_h_msg_dequeue(vk); 936 937 if (ret == 0) 938 dev_dbg(dev, "Spurious trigger for workqueue\n"); 939 else if (ret < 0) 940 bcm_vk_blk_drv_access(vk); 941 } 942 943 static long bcm_vk_load_image(struct bcm_vk *vk, 944 const struct vk_image __user *arg) 945 { 946 struct device *dev = &vk->pdev->dev; 947 const char *image_name; 948 struct vk_image image; 949 u32 next_loadable; 950 enum soc_idx idx; 951 int image_idx; 952 int ret = -EPERM; 953 954 if (copy_from_user(&image, arg, sizeof(image))) 955 return -EACCES; 956 957 if ((image.type != VK_IMAGE_TYPE_BOOT1) && 958 (image.type != VK_IMAGE_TYPE_BOOT2)) { 959 dev_err(dev, "invalid image.type %u\n", image.type); 960 return ret; 961 } 962 963 next_loadable = bcm_vk_next_boot_image(vk); 964 if (next_loadable != image.type) { 965 dev_err(dev, "Next expected image %u, Loading %u\n", 966 next_loadable, image.type); 967 return ret; 968 } 969 970 /* 971 * if something is pending download already. This could only happen 972 * for now when the driver is being loaded, or if someone has issued 973 * another download command in another shell. 974 */ 975 if (test_and_set_bit(BCM_VK_WQ_DWNLD_PEND, vk->wq_offload) != 0) { 976 dev_err(dev, "Download operation already pending.\n"); 977 return ret; 978 } 979 980 image_name = image.filename; 981 if (image_name[0] == '\0') { 982 /* Use default image name if NULL */ 983 idx = get_soc_idx(vk); 984 if (idx == VK_IDX_INVALID) 985 goto err_idx; 986 987 /* Image idx starts with boot1 */ 988 image_idx = image.type - VK_IMAGE_TYPE_BOOT1; 989 image_name = get_load_fw_name(vk, &image_tab[idx][image_idx]); 990 if (!image_name) { 991 dev_err(dev, "No suitable image found for type %d", 992 image.type); 993 ret = -ENOENT; 994 goto err_idx; 995 } 996 } else { 997 /* Ensure filename is NULL terminated */ 998 image.filename[sizeof(image.filename) - 1] = '\0'; 999 } 1000 ret = bcm_vk_load_image_by_type(vk, image.type, image_name); 1001 dev_info(dev, "Load %s, ret %d\n", image_name, ret); 1002 err_idx: 1003 clear_bit(BCM_VK_WQ_DWNLD_PEND, vk->wq_offload); 1004 1005 return ret; 1006 } 1007 1008 static int bcm_vk_reset_successful(struct bcm_vk *vk) 1009 { 1010 struct device *dev = &vk->pdev->dev; 1011 u32 fw_status, reset_reason; 1012 int ret = -EAGAIN; 1013 1014 /* 1015 * Reset could be triggered when the card in several state: 1016 * i) in bootROM 1017 * ii) after boot1 1018 * iii) boot2 running 1019 * 1020 * i) & ii) - no status bits will be updated. If vkboot1 1021 * runs automatically after reset, it will update the reason 1022 * to be unknown reason 1023 * iii) - reboot reason match + deinit done. 1024 */ 1025 fw_status = vkread32(vk, BAR_0, VK_BAR_FWSTS); 1026 /* immediate exit if interface goes down */ 1027 if (BCM_VK_INTF_IS_DOWN(fw_status)) { 1028 dev_err(dev, "PCIe Intf Down!\n"); 1029 goto reset_exit; 1030 } 1031 1032 reset_reason = (fw_status & VK_FWSTS_RESET_REASON_MASK); 1033 if ((reset_reason == VK_FWSTS_RESET_MBOX_DB) || 1034 (reset_reason == VK_FWSTS_RESET_UNKNOWN)) 1035 ret = 0; 1036 1037 /* 1038 * if some of the deinit bits are set, but done 1039 * bit is not, this is a failure if triggered while boot2 is running 1040 */ 1041 if ((fw_status & VK_FWSTS_DEINIT_TRIGGERED) && 1042 !(fw_status & VK_FWSTS_RESET_DONE)) 1043 ret = -EAGAIN; 1044 1045 reset_exit: 1046 dev_dbg(dev, "FW status = 0x%x ret %d\n", fw_status, ret); 1047 1048 return ret; 1049 } 1050 1051 static void bcm_to_v_reset_doorbell(struct bcm_vk *vk, u32 db_val) 1052 { 1053 vkwrite32(vk, db_val, BAR_0, VK_BAR0_RESET_DB_BASE); 1054 } 1055 1056 static int bcm_vk_trigger_reset(struct bcm_vk *vk) 1057 { 1058 u32 i; 1059 u32 value, boot_status; 1060 bool is_stdalone, is_boot2; 1061 static const u32 bar0_reg_clr_list[] = { BAR_OS_UPTIME, 1062 BAR_INTF_VER, 1063 BAR_CARD_VOLTAGE, 1064 BAR_CARD_TEMPERATURE, 1065 BAR_CARD_PWR_AND_THRE }; 1066 1067 /* clean up before pressing the door bell */ 1068 bcm_vk_drain_msg_on_reset(vk); 1069 vkwrite32(vk, 0, BAR_1, VK_BAR1_MSGQ_DEF_RDY); 1070 /* make tag '\0' terminated */ 1071 vkwrite32(vk, 0, BAR_1, VK_BAR1_BOOT1_VER_TAG); 1072 1073 for (i = 0; i < VK_BAR1_DAUTH_MAX; i++) { 1074 vkwrite32(vk, 0, BAR_1, VK_BAR1_DAUTH_STORE_ADDR(i)); 1075 vkwrite32(vk, 0, BAR_1, VK_BAR1_DAUTH_VALID_ADDR(i)); 1076 } 1077 for (i = 0; i < VK_BAR1_SOTP_REVID_MAX; i++) 1078 vkwrite32(vk, 0, BAR_1, VK_BAR1_SOTP_REVID_ADDR(i)); 1079 1080 memset(&vk->card_info, 0, sizeof(vk->card_info)); 1081 memset(&vk->peerlog_info, 0, sizeof(vk->peerlog_info)); 1082 memset(&vk->proc_mon_info, 0, sizeof(vk->proc_mon_info)); 1083 memset(&vk->alert_cnts, 0, sizeof(vk->alert_cnts)); 1084 1085 /* 1086 * When boot request fails, the CODE_PUSH_OFFSET stays persistent. 1087 * Allowing us to debug the failure. When we call reset, 1088 * we should clear CODE_PUSH_OFFSET so ROM does not execute 1089 * boot again (and fails again) and instead waits for a new 1090 * codepush. And, if previous boot has encountered error, need 1091 * to clear the entry values 1092 */ 1093 boot_status = vkread32(vk, BAR_0, BAR_BOOT_STATUS); 1094 if (boot_status & BOOT_ERR_MASK) { 1095 dev_info(&vk->pdev->dev, 1096 "Card in boot error 0x%x, clear CODEPUSH val\n", 1097 boot_status); 1098 value = 0; 1099 } else { 1100 value = vkread32(vk, BAR_0, BAR_CODEPUSH_SBL); 1101 value &= CODEPUSH_MASK; 1102 } 1103 vkwrite32(vk, value, BAR_0, BAR_CODEPUSH_SBL); 1104 1105 /* special reset handling */ 1106 is_stdalone = boot_status & BOOT_STDALONE_RUNNING; 1107 is_boot2 = (boot_status & BOOT_STATE_MASK) == BOOT2_RUNNING; 1108 if (vk->peer_alert.flags & ERR_LOG_RAMDUMP) { 1109 /* 1110 * if card is in ramdump mode, it is hitting an error. Don't 1111 * reset the reboot reason as it will contain valid info that 1112 * is important - simply use special reset 1113 */ 1114 vkwrite32(vk, VK_BAR0_RESET_RAMPDUMP, BAR_0, VK_BAR_FWSTS); 1115 return VK_BAR0_RESET_RAMPDUMP; 1116 } else if (is_stdalone && !is_boot2) { 1117 dev_info(&vk->pdev->dev, "Hard reset on Standalone mode"); 1118 bcm_to_v_reset_doorbell(vk, VK_BAR0_RESET_DB_HARD); 1119 return VK_BAR0_RESET_DB_HARD; 1120 } 1121 1122 /* reset fw_status with proper reason, and press db */ 1123 vkwrite32(vk, VK_FWSTS_RESET_MBOX_DB, BAR_0, VK_BAR_FWSTS); 1124 bcm_to_v_reset_doorbell(vk, VK_BAR0_RESET_DB_SOFT); 1125 1126 /* clear other necessary registers and alert records */ 1127 for (i = 0; i < ARRAY_SIZE(bar0_reg_clr_list); i++) 1128 vkwrite32(vk, 0, BAR_0, bar0_reg_clr_list[i]); 1129 memset(&vk->host_alert, 0, sizeof(vk->host_alert)); 1130 memset(&vk->peer_alert, 0, sizeof(vk->peer_alert)); 1131 /* clear 4096 bits of bitmap */ 1132 bitmap_clear(vk->bmap, 0, VK_MSG_ID_BITMAP_SIZE); 1133 1134 return 0; 1135 } 1136 1137 static long bcm_vk_reset(struct bcm_vk *vk, struct vk_reset __user *arg) 1138 { 1139 struct device *dev = &vk->pdev->dev; 1140 struct vk_reset reset; 1141 int ret = 0; 1142 u32 ramdump_reset; 1143 int special_reset; 1144 1145 if (copy_from_user(&reset, arg, sizeof(struct vk_reset))) 1146 return -EFAULT; 1147 1148 /* check if any download is in-progress, if so return error */ 1149 if (test_and_set_bit(BCM_VK_WQ_DWNLD_PEND, vk->wq_offload) != 0) { 1150 dev_err(dev, "Download operation pending - skip reset.\n"); 1151 return -EPERM; 1152 } 1153 1154 ramdump_reset = vk->peer_alert.flags & ERR_LOG_RAMDUMP; 1155 dev_info(dev, "Issue Reset %s\n", 1156 ramdump_reset ? "in ramdump mode" : ""); 1157 1158 /* 1159 * The following is the sequence of reset: 1160 * - send card level graceful shut down 1161 * - wait enough time for VK to handle its business, stopping DMA etc 1162 * - kill host apps 1163 * - Trigger interrupt with DB 1164 */ 1165 bcm_vk_send_shutdown_msg(vk, VK_SHUTDOWN_GRACEFUL, 0, 0); 1166 1167 spin_lock(&vk->ctx_lock); 1168 if (!vk->reset_pid) { 1169 vk->reset_pid = task_pid_nr(current); 1170 } else { 1171 dev_err(dev, "Reset already launched by process pid %d\n", 1172 vk->reset_pid); 1173 ret = -EACCES; 1174 } 1175 spin_unlock(&vk->ctx_lock); 1176 if (ret) 1177 goto err_exit; 1178 1179 bcm_vk_blk_drv_access(vk); 1180 special_reset = bcm_vk_trigger_reset(vk); 1181 1182 /* 1183 * Wait enough time for card os to deinit 1184 * and populate the reset reason. 1185 */ 1186 msleep(BCM_VK_DEINIT_TIME_MS); 1187 1188 if (special_reset) { 1189 /* if it is special ramdump reset, return the type to user */ 1190 reset.arg2 = special_reset; 1191 if (copy_to_user(arg, &reset, sizeof(reset))) 1192 ret = -EFAULT; 1193 } else { 1194 ret = bcm_vk_reset_successful(vk); 1195 } 1196 1197 err_exit: 1198 clear_bit(BCM_VK_WQ_DWNLD_PEND, vk->wq_offload); 1199 return ret; 1200 } 1201 1202 static long bcm_vk_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1203 { 1204 long ret = -EINVAL; 1205 struct bcm_vk_ctx *ctx = file->private_data; 1206 struct bcm_vk *vk = container_of(ctx->miscdev, struct bcm_vk, miscdev); 1207 void __user *argp = (void __user *)arg; 1208 1209 dev_dbg(&vk->pdev->dev, 1210 "ioctl, cmd=0x%02x, arg=0x%02lx\n", 1211 cmd, arg); 1212 1213 mutex_lock(&vk->mutex); 1214 1215 switch (cmd) { 1216 case VK_IOCTL_LOAD_IMAGE: 1217 ret = bcm_vk_load_image(vk, argp); 1218 break; 1219 1220 case VK_IOCTL_RESET: 1221 ret = bcm_vk_reset(vk, argp); 1222 break; 1223 1224 default: 1225 break; 1226 } 1227 1228 mutex_unlock(&vk->mutex); 1229 1230 return ret; 1231 } 1232 1233 static const struct file_operations bcm_vk_fops = { 1234 .owner = THIS_MODULE, 1235 .open = bcm_vk_open, 1236 .read = bcm_vk_read, 1237 .write = bcm_vk_write, 1238 .poll = bcm_vk_poll, 1239 .release = bcm_vk_release, 1240 .unlocked_ioctl = bcm_vk_ioctl, 1241 }; 1242 1243 static int bcm_vk_on_panic(struct notifier_block *nb, 1244 unsigned long e, void *p) 1245 { 1246 struct bcm_vk *vk = container_of(nb, struct bcm_vk, panic_nb); 1247 1248 bcm_to_v_reset_doorbell(vk, VK_BAR0_RESET_DB_HARD); 1249 1250 return 0; 1251 } 1252 1253 static int bcm_vk_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1254 { 1255 int err; 1256 int i; 1257 int id; 1258 int irq; 1259 char name[20]; 1260 struct bcm_vk *vk; 1261 struct device *dev = &pdev->dev; 1262 struct miscdevice *misc_device; 1263 u32 boot_status; 1264 1265 /* allocate vk structure which is tied to kref for freeing */ 1266 vk = kzalloc(sizeof(*vk), GFP_KERNEL); 1267 if (!vk) 1268 return -ENOMEM; 1269 1270 kref_init(&vk->kref); 1271 if (nr_ib_sgl_blk > BCM_VK_IB_SGL_BLK_MAX) { 1272 dev_warn(dev, "Inband SGL blk %d limited to max %d\n", 1273 nr_ib_sgl_blk, BCM_VK_IB_SGL_BLK_MAX); 1274 nr_ib_sgl_blk = BCM_VK_IB_SGL_BLK_MAX; 1275 } 1276 vk->ib_sgl_size = nr_ib_sgl_blk * VK_MSGQ_BLK_SIZE; 1277 mutex_init(&vk->mutex); 1278 1279 err = pci_enable_device(pdev); 1280 if (err) { 1281 dev_err(dev, "Cannot enable PCI device\n"); 1282 goto err_free_exit; 1283 } 1284 vk->pdev = pci_dev_get(pdev); 1285 1286 err = pci_request_regions(pdev, DRV_MODULE_NAME); 1287 if (err) { 1288 dev_err(dev, "Cannot obtain PCI resources\n"); 1289 goto err_disable_pdev; 1290 } 1291 1292 /* make sure DMA is good */ 1293 err = dma_set_mask_and_coherent(&pdev->dev, 1294 DMA_BIT_MASK(BCM_VK_DMA_BITS)); 1295 if (err) { 1296 dev_err(dev, "failed to set DMA mask\n"); 1297 goto err_disable_pdev; 1298 } 1299 1300 /* The tdma is a scratch area for some DMA testings. */ 1301 if (nr_scratch_pages) { 1302 vk->tdma_vaddr = dma_alloc_coherent 1303 (dev, 1304 nr_scratch_pages * PAGE_SIZE, 1305 &vk->tdma_addr, GFP_KERNEL); 1306 if (!vk->tdma_vaddr) { 1307 err = -ENOMEM; 1308 goto err_disable_pdev; 1309 } 1310 } 1311 1312 pci_set_master(pdev); 1313 pci_set_drvdata(pdev, vk); 1314 1315 irq = pci_alloc_irq_vectors(pdev, 1316 1, 1317 VK_MSIX_IRQ_MAX, 1318 PCI_IRQ_MSI | PCI_IRQ_MSIX); 1319 1320 if (irq < VK_MSIX_IRQ_MIN_REQ) { 1321 dev_err(dev, "failed to get min %d MSIX interrupts, irq(%d)\n", 1322 VK_MSIX_IRQ_MIN_REQ, irq); 1323 err = (irq >= 0) ? -EINVAL : irq; 1324 goto err_disable_pdev; 1325 } 1326 1327 if (irq != VK_MSIX_IRQ_MAX) 1328 dev_warn(dev, "Number of IRQs %d allocated - requested(%d).\n", 1329 irq, VK_MSIX_IRQ_MAX); 1330 1331 for (i = 0; i < MAX_BAR; i++) { 1332 /* multiple by 2 for 64 bit BAR mapping */ 1333 vk->bar[i] = pci_ioremap_bar(pdev, i * 2); 1334 if (!vk->bar[i]) { 1335 dev_err(dev, "failed to remap BAR%d\n", i); 1336 goto err_iounmap; 1337 } 1338 } 1339 1340 for (vk->num_irqs = 0; 1341 vk->num_irqs < VK_MSIX_MSGQ_MAX; 1342 vk->num_irqs++) { 1343 err = devm_request_irq(dev, pci_irq_vector(pdev, vk->num_irqs), 1344 bcm_vk_msgq_irqhandler, 1345 IRQF_SHARED, DRV_MODULE_NAME, vk); 1346 if (err) { 1347 dev_err(dev, "failed to request msgq IRQ %d for MSIX %d\n", 1348 pdev->irq + vk->num_irqs, vk->num_irqs + 1); 1349 goto err_irq; 1350 } 1351 } 1352 /* one irq for notification from VK */ 1353 err = devm_request_irq(dev, pci_irq_vector(pdev, vk->num_irqs), 1354 bcm_vk_notf_irqhandler, 1355 IRQF_SHARED, DRV_MODULE_NAME, vk); 1356 if (err) { 1357 dev_err(dev, "failed to request notf IRQ %d for MSIX %d\n", 1358 pdev->irq + vk->num_irqs, vk->num_irqs + 1); 1359 goto err_irq; 1360 } 1361 vk->num_irqs++; 1362 1363 id = ida_simple_get(&bcm_vk_ida, 0, 0, GFP_KERNEL); 1364 if (id < 0) { 1365 err = id; 1366 dev_err(dev, "unable to get id\n"); 1367 goto err_irq; 1368 } 1369 1370 vk->devid = id; 1371 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id); 1372 misc_device = &vk->miscdev; 1373 misc_device->minor = MISC_DYNAMIC_MINOR; 1374 misc_device->name = kstrdup(name, GFP_KERNEL); 1375 if (!misc_device->name) { 1376 err = -ENOMEM; 1377 goto err_ida_remove; 1378 } 1379 misc_device->fops = &bcm_vk_fops, 1380 1381 err = misc_register(misc_device); 1382 if (err) { 1383 dev_err(dev, "failed to register device\n"); 1384 goto err_kfree_name; 1385 } 1386 1387 INIT_WORK(&vk->wq_work, bcm_vk_wq_handler); 1388 1389 /* create dedicated workqueue */ 1390 vk->wq_thread = create_singlethread_workqueue(name); 1391 if (!vk->wq_thread) { 1392 dev_err(dev, "Fail to create workqueue thread\n"); 1393 err = -ENOMEM; 1394 goto err_misc_deregister; 1395 } 1396 1397 err = bcm_vk_msg_init(vk); 1398 if (err) { 1399 dev_err(dev, "failed to init msg queue info\n"); 1400 goto err_destroy_workqueue; 1401 } 1402 1403 /* sync other info */ 1404 bcm_vk_sync_card_info(vk); 1405 1406 /* register for panic notifier */ 1407 vk->panic_nb.notifier_call = bcm_vk_on_panic; 1408 err = atomic_notifier_chain_register(&panic_notifier_list, 1409 &vk->panic_nb); 1410 if (err) { 1411 dev_err(dev, "Fail to register panic notifier\n"); 1412 goto err_destroy_workqueue; 1413 } 1414 1415 /* 1416 * lets trigger an auto download. We don't want to do it serially here 1417 * because at probing time, it is not supposed to block for a long time. 1418 */ 1419 boot_status = vkread32(vk, BAR_0, BAR_BOOT_STATUS); 1420 if (auto_load) { 1421 if ((boot_status & BOOT_STATE_MASK) == BROM_RUNNING) { 1422 if (bcm_vk_trigger_autoload(vk)) 1423 goto err_unregister_panic_notifier; 1424 } else { 1425 dev_err(dev, 1426 "Auto-load skipped - BROM not in proper state (0x%x)\n", 1427 boot_status); 1428 } 1429 } 1430 1431 /* enable hb */ 1432 bcm_vk_hb_init(vk); 1433 1434 dev_dbg(dev, "BCM-VK:%u created\n", id); 1435 1436 return 0; 1437 1438 err_unregister_panic_notifier: 1439 atomic_notifier_chain_unregister(&panic_notifier_list, 1440 &vk->panic_nb); 1441 1442 err_destroy_workqueue: 1443 destroy_workqueue(vk->wq_thread); 1444 1445 err_misc_deregister: 1446 misc_deregister(misc_device); 1447 1448 err_kfree_name: 1449 kfree(misc_device->name); 1450 misc_device->name = NULL; 1451 1452 err_ida_remove: 1453 ida_simple_remove(&bcm_vk_ida, id); 1454 1455 err_irq: 1456 for (i = 0; i < vk->num_irqs; i++) 1457 devm_free_irq(dev, pci_irq_vector(pdev, i), vk); 1458 1459 pci_disable_msix(pdev); 1460 pci_disable_msi(pdev); 1461 1462 err_iounmap: 1463 for (i = 0; i < MAX_BAR; i++) { 1464 if (vk->bar[i]) 1465 pci_iounmap(pdev, vk->bar[i]); 1466 } 1467 pci_release_regions(pdev); 1468 1469 err_disable_pdev: 1470 if (vk->tdma_vaddr) 1471 dma_free_coherent(&pdev->dev, nr_scratch_pages * PAGE_SIZE, 1472 vk->tdma_vaddr, vk->tdma_addr); 1473 1474 pci_free_irq_vectors(pdev); 1475 pci_disable_device(pdev); 1476 pci_dev_put(pdev); 1477 1478 err_free_exit: 1479 kfree(vk); 1480 1481 return err; 1482 } 1483 1484 void bcm_vk_release_data(struct kref *kref) 1485 { 1486 struct bcm_vk *vk = container_of(kref, struct bcm_vk, kref); 1487 struct pci_dev *pdev = vk->pdev; 1488 1489 dev_dbg(&pdev->dev, "BCM-VK:%d release data 0x%p\n", vk->devid, vk); 1490 pci_dev_put(pdev); 1491 kfree(vk); 1492 } 1493 1494 static void bcm_vk_remove(struct pci_dev *pdev) 1495 { 1496 int i; 1497 struct bcm_vk *vk = pci_get_drvdata(pdev); 1498 struct miscdevice *misc_device = &vk->miscdev; 1499 1500 bcm_vk_hb_deinit(vk); 1501 1502 /* 1503 * Trigger a reset to card and wait enough time for UCODE to rerun, 1504 * which re-initialize the card into its default state. 1505 * This ensures when driver is re-enumerated it will start from 1506 * a completely clean state. 1507 */ 1508 bcm_vk_trigger_reset(vk); 1509 usleep_range(BCM_VK_UCODE_BOOT_US, BCM_VK_UCODE_BOOT_MAX_US); 1510 1511 /* unregister panic notifier */ 1512 atomic_notifier_chain_unregister(&panic_notifier_list, 1513 &vk->panic_nb); 1514 1515 if (vk->tdma_vaddr) 1516 dma_free_coherent(&pdev->dev, nr_scratch_pages * PAGE_SIZE, 1517 vk->tdma_vaddr, vk->tdma_addr); 1518 1519 /* remove if name is set which means misc dev registered */ 1520 if (misc_device->name) { 1521 misc_deregister(misc_device); 1522 kfree(misc_device->name); 1523 ida_simple_remove(&bcm_vk_ida, vk->devid); 1524 } 1525 for (i = 0; i < vk->num_irqs; i++) 1526 devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i), vk); 1527 1528 pci_disable_msix(pdev); 1529 pci_disable_msi(pdev); 1530 1531 cancel_work_sync(&vk->wq_work); 1532 destroy_workqueue(vk->wq_thread); 1533 1534 for (i = 0; i < MAX_BAR; i++) { 1535 if (vk->bar[i]) 1536 pci_iounmap(pdev, vk->bar[i]); 1537 } 1538 1539 dev_dbg(&pdev->dev, "BCM-VK:%d released\n", vk->devid); 1540 1541 pci_release_regions(pdev); 1542 pci_free_irq_vectors(pdev); 1543 pci_disable_device(pdev); 1544 1545 kref_put(&vk->kref, bcm_vk_release_data); 1546 } 1547 1548 static void bcm_vk_shutdown(struct pci_dev *pdev) 1549 { 1550 struct bcm_vk *vk = pci_get_drvdata(pdev); 1551 u32 reg, boot_stat; 1552 1553 reg = vkread32(vk, BAR_0, BAR_BOOT_STATUS); 1554 boot_stat = reg & BOOT_STATE_MASK; 1555 1556 if (boot_stat == BOOT1_RUNNING) { 1557 /* simply trigger a reset interrupt to park it */ 1558 bcm_vk_trigger_reset(vk); 1559 } else if (boot_stat == BROM_NOT_RUN) { 1560 int err; 1561 u16 lnksta; 1562 1563 /* 1564 * The boot status only reflects boot condition since last reset 1565 * As ucode will run only once to configure pcie, if multiple 1566 * resets happen, we lost track if ucode has run or not. 1567 * Here, read the current link speed and use that to 1568 * sync up the bootstatus properly so that on reboot-back-up, 1569 * it has the proper state to start with autoload 1570 */ 1571 err = pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnksta); 1572 if (!err && 1573 (lnksta & PCI_EXP_LNKSTA_CLS) != PCI_EXP_LNKSTA_CLS_2_5GB) { 1574 reg |= BROM_STATUS_COMPLETE; 1575 vkwrite32(vk, reg, BAR_0, BAR_BOOT_STATUS); 1576 } 1577 } 1578 } 1579 1580 static const struct pci_device_id bcm_vk_ids[] = { 1581 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_VALKYRIE), }, 1582 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_VIPER), }, 1583 { } 1584 }; 1585 MODULE_DEVICE_TABLE(pci, bcm_vk_ids); 1586 1587 static struct pci_driver pci_driver = { 1588 .name = DRV_MODULE_NAME, 1589 .id_table = bcm_vk_ids, 1590 .probe = bcm_vk_probe, 1591 .remove = bcm_vk_remove, 1592 .shutdown = bcm_vk_shutdown, 1593 }; 1594 module_pci_driver(pci_driver); 1595 1596 MODULE_DESCRIPTION("Broadcom VK Host Driver"); 1597 MODULE_AUTHOR("Scott Branden <scott.branden@broadcom.com>"); 1598 MODULE_LICENSE("GPL v2"); 1599 MODULE_VERSION("1.0"); 1600