xref: /linux/drivers/mfd/wm8994-irq.c (revision 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3)
1 /*
2  * wm8994-irq.c  --  Interrupt controller support for Wolfson WM8994
3  *
4  * Copyright 2010 Wolfson Microelectronics PLC.
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14 
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/irq.h>
20 #include <linux/mfd/core.h>
21 #include <linux/interrupt.h>
22 #include <linux/irqdomain.h>
23 #include <linux/regmap.h>
24 
25 #include <linux/mfd/wm8994/core.h>
26 #include <linux/mfd/wm8994/pdata.h>
27 #include <linux/mfd/wm8994/registers.h>
28 
29 #include <linux/delay.h>
30 
31 static const struct regmap_irq wm8994_irqs[] = {
32 	[WM8994_IRQ_TEMP_SHUT] = {
33 		.reg_offset = 1,
34 		.mask = WM8994_TEMP_SHUT_EINT,
35 	},
36 	[WM8994_IRQ_MIC1_DET] = {
37 		.reg_offset = 1,
38 		.mask = WM8994_MIC1_DET_EINT,
39 	},
40 	[WM8994_IRQ_MIC1_SHRT] = {
41 		.reg_offset = 1,
42 		.mask = WM8994_MIC1_SHRT_EINT,
43 	},
44 	[WM8994_IRQ_MIC2_DET] = {
45 		.reg_offset = 1,
46 		.mask = WM8994_MIC2_DET_EINT,
47 	},
48 	[WM8994_IRQ_MIC2_SHRT] = {
49 		.reg_offset = 1,
50 		.mask = WM8994_MIC2_SHRT_EINT,
51 	},
52 	[WM8994_IRQ_FLL1_LOCK] = {
53 		.reg_offset = 1,
54 		.mask = WM8994_FLL1_LOCK_EINT,
55 	},
56 	[WM8994_IRQ_FLL2_LOCK] = {
57 		.reg_offset = 1,
58 		.mask = WM8994_FLL2_LOCK_EINT,
59 	},
60 	[WM8994_IRQ_SRC1_LOCK] = {
61 		.reg_offset = 1,
62 		.mask = WM8994_SRC1_LOCK_EINT,
63 	},
64 	[WM8994_IRQ_SRC2_LOCK] = {
65 		.reg_offset = 1,
66 		.mask = WM8994_SRC2_LOCK_EINT,
67 	},
68 	[WM8994_IRQ_AIF1DRC1_SIG_DET] = {
69 		.reg_offset = 1,
70 		.mask = WM8994_AIF1DRC1_SIG_DET,
71 	},
72 	[WM8994_IRQ_AIF1DRC2_SIG_DET] = {
73 		.reg_offset = 1,
74 		.mask = WM8994_AIF1DRC2_SIG_DET_EINT,
75 	},
76 	[WM8994_IRQ_AIF2DRC_SIG_DET] = {
77 		.reg_offset = 1,
78 		.mask = WM8994_AIF2DRC_SIG_DET_EINT,
79 	},
80 	[WM8994_IRQ_FIFOS_ERR] = {
81 		.reg_offset = 1,
82 		.mask = WM8994_FIFOS_ERR_EINT,
83 	},
84 	[WM8994_IRQ_WSEQ_DONE] = {
85 		.reg_offset = 1,
86 		.mask = WM8994_WSEQ_DONE_EINT,
87 	},
88 	[WM8994_IRQ_DCS_DONE] = {
89 		.reg_offset = 1,
90 		.mask = WM8994_DCS_DONE_EINT,
91 	},
92 	[WM8994_IRQ_TEMP_WARN] = {
93 		.reg_offset = 1,
94 		.mask = WM8994_TEMP_WARN_EINT,
95 	},
96 	[WM8994_IRQ_GPIO(1)] = {
97 		.mask = WM8994_GP1_EINT,
98 	},
99 	[WM8994_IRQ_GPIO(2)] = {
100 		.mask = WM8994_GP2_EINT,
101 	},
102 	[WM8994_IRQ_GPIO(3)] = {
103 		.mask = WM8994_GP3_EINT,
104 	},
105 	[WM8994_IRQ_GPIO(4)] = {
106 		.mask = WM8994_GP4_EINT,
107 	},
108 	[WM8994_IRQ_GPIO(5)] = {
109 		.mask = WM8994_GP5_EINT,
110 	},
111 	[WM8994_IRQ_GPIO(6)] = {
112 		.mask = WM8994_GP6_EINT,
113 	},
114 	[WM8994_IRQ_GPIO(7)] = {
115 		.mask = WM8994_GP7_EINT,
116 	},
117 	[WM8994_IRQ_GPIO(8)] = {
118 		.mask = WM8994_GP8_EINT,
119 	},
120 	[WM8994_IRQ_GPIO(9)] = {
121 		.mask = WM8994_GP8_EINT,
122 	},
123 	[WM8994_IRQ_GPIO(10)] = {
124 		.mask = WM8994_GP10_EINT,
125 	},
126 	[WM8994_IRQ_GPIO(11)] = {
127 		.mask = WM8994_GP11_EINT,
128 	},
129 };
130 
131 static const struct regmap_irq_chip wm8994_irq_chip = {
132 	.name = "wm8994",
133 	.irqs = wm8994_irqs,
134 	.num_irqs = ARRAY_SIZE(wm8994_irqs),
135 
136 	.num_regs = 2,
137 	.status_base = WM8994_INTERRUPT_STATUS_1,
138 	.mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
139 	.ack_base = WM8994_INTERRUPT_STATUS_1,
140 	.runtime_pm = true,
141 };
142 
143 static void wm8994_edge_irq_enable(struct irq_data *data)
144 {
145 }
146 
147 static void wm8994_edge_irq_disable(struct irq_data *data)
148 {
149 }
150 
151 static struct irq_chip wm8994_edge_irq_chip = {
152 	.name			= "wm8994_edge",
153 	.irq_disable		= wm8994_edge_irq_disable,
154 	.irq_enable		= wm8994_edge_irq_enable,
155 };
156 
157 static irqreturn_t wm8994_edge_irq(int irq, void *data)
158 {
159 	struct wm8994 *wm8994 = data;
160 
161 	while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
162 		handle_nested_irq(irq_create_mapping(wm8994->edge_irq, 0));
163 
164 	return IRQ_HANDLED;
165 }
166 
167 static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
168 			       irq_hw_number_t hw)
169 {
170 	struct wm8994 *wm8994 = h->host_data;
171 
172 	irq_set_chip_data(virq, wm8994);
173 	irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
174 	irq_set_nested_thread(virq, 1);
175 
176 	/* ARM needs us to explicitly flag the IRQ as valid
177 	 * and will set them noprobe when we do so. */
178 #ifdef CONFIG_ARM
179 	set_irq_flags(virq, IRQF_VALID);
180 #else
181 	irq_set_noprobe(virq);
182 #endif
183 
184 	return 0;
185 }
186 
187 static const struct irq_domain_ops wm8994_edge_irq_ops = {
188 	.map	= wm8994_edge_irq_map,
189 	.xlate	= irq_domain_xlate_twocell,
190 };
191 
192 int wm8994_irq_init(struct wm8994 *wm8994)
193 {
194 	int ret;
195 	unsigned long irqflags;
196 	struct wm8994_pdata *pdata = dev_get_platdata(wm8994->dev);
197 
198 	if (!wm8994->irq) {
199 		dev_warn(wm8994->dev,
200 			 "No interrupt specified, no interrupts\n");
201 		wm8994->irq_base = 0;
202 		return 0;
203 	}
204 
205 	/* select user or default irq flags */
206 	irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
207 	if (pdata->irq_flags)
208 		irqflags = pdata->irq_flags;
209 
210 	/* use a GPIO for edge triggered controllers */
211 	if (irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
212 		if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
213 			dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
214 				 wm8994->irq, pdata->irq_gpio,
215 				 gpio_to_irq(pdata->irq_gpio));
216 			wm8994->irq = gpio_to_irq(pdata->irq_gpio);
217 		}
218 
219 		ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
220 					    GPIOF_IN, "WM8994 IRQ");
221 
222 		if (ret != 0) {
223 			dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
224 				ret);
225 			return ret;
226 		}
227 
228 		wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
229 							 &wm8994_edge_irq_ops,
230 							 wm8994);
231 
232 		ret = regmap_add_irq_chip(wm8994->regmap,
233 					  irq_create_mapping(wm8994->edge_irq,
234 							     0),
235 					  IRQF_ONESHOT,
236 					  wm8994->irq_base, &wm8994_irq_chip,
237 					  &wm8994->irq_data);
238 		if (ret != 0) {
239 			dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
240 				ret);
241 			return ret;
242 		}
243 
244 		ret = request_threaded_irq(wm8994->irq,
245 					   NULL, wm8994_edge_irq,
246 					   irqflags,
247 					   "WM8994 edge", wm8994);
248 	} else {
249 		ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
250 					  irqflags,
251 					  wm8994->irq_base, &wm8994_irq_chip,
252 					  &wm8994->irq_data);
253 	}
254 
255 	if (ret != 0) {
256 		dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
257 		return ret;
258 	}
259 
260 	/* Enable top level interrupt if it was masked */
261 	wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
262 
263 	return 0;
264 }
265 EXPORT_SYMBOL(wm8994_irq_init);
266 
267 void wm8994_irq_exit(struct wm8994 *wm8994)
268 {
269 	regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
270 }
271 EXPORT_SYMBOL(wm8994_irq_exit);
272