xref: /linux/drivers/mfd/wm8400-core.c (revision 50eeef5d3cea5afcced17a0410e8b0bf88997845)
11d9f9f04SMark Brown /*
21d9f9f04SMark Brown  * Core driver for WM8400.
31d9f9f04SMark Brown  *
41d9f9f04SMark Brown  * Copyright 2008 Wolfson Microelectronics PLC.
51d9f9f04SMark Brown  *
61d9f9f04SMark Brown  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
71d9f9f04SMark Brown  *
81d9f9f04SMark Brown  * This program is free software; you can redistribute it and/or
91d9f9f04SMark Brown  * modify it under the terms of the GNU General Public License as
101d9f9f04SMark Brown  * published by the Free Software Foundation; either version 2 of the
111d9f9f04SMark Brown  * License, or (at your option) any later version.
121d9f9f04SMark Brown  *
131d9f9f04SMark Brown  */
141d9f9f04SMark Brown 
151d9f9f04SMark Brown #include <linux/bug.h>
16*50eeef5dSMark Brown #include <linux/err.h>
171d9f9f04SMark Brown #include <linux/i2c.h>
181d9f9f04SMark Brown #include <linux/kernel.h>
19b8380c1aSMark Brown #include <linux/mfd/core.h>
201d9f9f04SMark Brown #include <linux/mfd/wm8400-private.h>
211d9f9f04SMark Brown #include <linux/mfd/wm8400-audio.h>
22*50eeef5dSMark Brown #include <linux/regmap.h>
235a0e3ad6STejun Heo #include <linux/slab.h>
241d9f9f04SMark Brown 
251d9f9f04SMark Brown static struct {
261d9f9f04SMark Brown 	u16  readable;    /* Mask of readable bits */
271d9f9f04SMark Brown 	u16  writable;    /* Mask of writable bits */
281d9f9f04SMark Brown 	u16  vol;         /* Mask of volatile bits */
291d9f9f04SMark Brown 	int  is_codec;    /* Register controlled by codec reset */
301d9f9f04SMark Brown 	u16  default_val; /* Value on reset */
311d9f9f04SMark Brown } reg_data[] = {
321d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
331d9f9f04SMark Brown 	{ 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
341d9f9f04SMark Brown 	{ 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
351d9f9f04SMark Brown 	{ 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
361d9f9f04SMark Brown 	{ 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4  */
371d9f9f04SMark Brown 	{ 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5  */
381d9f9f04SMark Brown 	{ 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6  */
391d9f9f04SMark Brown 	{ 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7  */
401d9f9f04SMark Brown 	{ 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8  */
411d9f9f04SMark Brown 	{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9  */
421d9f9f04SMark Brown 	{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
431d9f9f04SMark Brown 	{ 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
441d9f9f04SMark Brown 	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
451d9f9f04SMark Brown 	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
461d9f9f04SMark Brown 	{ 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
471d9f9f04SMark Brown 	{ 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
481d9f9f04SMark Brown 	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
491d9f9f04SMark Brown 	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
501d9f9f04SMark Brown 	{ 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
511d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
521d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
531d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
541d9f9f04SMark Brown 	{ 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
551d9f9f04SMark Brown 	{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
561d9f9f04SMark Brown 	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
571d9f9f04SMark Brown 	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
581d9f9f04SMark Brown 	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
591d9f9f04SMark Brown 	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
601d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
611d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
621d9f9f04SMark Brown 	{ 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
631d9f9f04SMark Brown 	{ 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
641d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
651d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
661d9f9f04SMark Brown 	{ 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
671d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
681d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
691d9f9f04SMark Brown 	{ 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
701d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
711d9f9f04SMark Brown 	{ 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
721d9f9f04SMark Brown 	{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
731d9f9f04SMark Brown 	{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
741d9f9f04SMark Brown 	{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
751d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
761d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
771d9f9f04SMark Brown 	{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
781d9f9f04SMark Brown 	{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
791d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
801d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
811d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
821d9f9f04SMark Brown 	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
831d9f9f04SMark Brown 	{ 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
841d9f9f04SMark Brown 	{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
851d9f9f04SMark Brown 	{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
861d9f9f04SMark Brown 	{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
871d9f9f04SMark Brown 	{ 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
881d9f9f04SMark Brown 	{ 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
891d9f9f04SMark Brown 	{ 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
901d9f9f04SMark Brown 	{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
911d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
921d9f9f04SMark Brown 	{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
931d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
941d9f9f04SMark Brown 	{ 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
951d9f9f04SMark Brown 	{ 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
961d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
971d9f9f04SMark Brown 	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
981d9f9f04SMark Brown 	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
991d9f9f04SMark Brown 	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
1001d9f9f04SMark Brown 	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
1011d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
1021d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
1031d9f9f04SMark Brown 	{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
1041d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
1051d9f9f04SMark Brown 	{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
1061d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
1071d9f9f04SMark Brown 	{ 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
1081d9f9f04SMark Brown 	{ 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
1091d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
1101d9f9f04SMark Brown 	{ 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
1111d9f9f04SMark Brown 	{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
1121d9f9f04SMark Brown 	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
1131d9f9f04SMark Brown 	{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
1141d9f9f04SMark Brown 	{ 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
1151d9f9f04SMark Brown 	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
1161d9f9f04SMark Brown 	{ 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
1171d9f9f04SMark Brown };
1181d9f9f04SMark Brown 
1191d9f9f04SMark Brown static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
1201d9f9f04SMark Brown {
1211d9f9f04SMark Brown 	int i, ret = 0;
1221d9f9f04SMark Brown 
123fffba64cSPhil Carmody 	BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
1241d9f9f04SMark Brown 
1251d9f9f04SMark Brown 	/* If there are any volatile reads then read back the entire block */
1261d9f9f04SMark Brown 	for (i = reg; i < reg + num_regs; i++)
1271d9f9f04SMark Brown 		if (reg_data[i].vol) {
128*50eeef5dSMark Brown 			ret = regmap_bulk_read(wm8400->regmap, reg, dest,
129*50eeef5dSMark Brown 					       num_regs);
1301d9f9f04SMark Brown 			return ret;
1311d9f9f04SMark Brown 		}
1321d9f9f04SMark Brown 
1331d9f9f04SMark Brown 	/* Otherwise use the cache */
1341d9f9f04SMark Brown 	memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
1351d9f9f04SMark Brown 
1361d9f9f04SMark Brown 	return 0;
1371d9f9f04SMark Brown }
1381d9f9f04SMark Brown 
1391d9f9f04SMark Brown static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
1401d9f9f04SMark Brown 			u16 *src)
1411d9f9f04SMark Brown {
1421d9f9f04SMark Brown 	int ret, i;
1431d9f9f04SMark Brown 
144fffba64cSPhil Carmody 	BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
1451d9f9f04SMark Brown 
1461d9f9f04SMark Brown 	for (i = 0; i < num_regs; i++) {
1471d9f9f04SMark Brown 		BUG_ON(!reg_data[reg + i].writable);
1481d9f9f04SMark Brown 		wm8400->reg_cache[reg + i] = src[i];
149*50eeef5dSMark Brown 		ret = regmap_write(wm8400->regmap, reg, src[i]);
1501d9f9f04SMark Brown 		if (ret != 0)
151*50eeef5dSMark Brown 			return ret;
152*50eeef5dSMark Brown 	}
1531d9f9f04SMark Brown 
1541d9f9f04SMark Brown 	return 0;
1551d9f9f04SMark Brown }
1561d9f9f04SMark Brown 
1571d9f9f04SMark Brown /**
1581d9f9f04SMark Brown  * wm8400_reg_read - Single register read
1591d9f9f04SMark Brown  *
1601d9f9f04SMark Brown  * @wm8400: Pointer to wm8400 control structure
1611d9f9f04SMark Brown  * @reg:    Register to read
1621d9f9f04SMark Brown  *
1631d9f9f04SMark Brown  * @return  Read value
1641d9f9f04SMark Brown  */
1651d9f9f04SMark Brown u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
1661d9f9f04SMark Brown {
1671d9f9f04SMark Brown 	u16 val;
1681d9f9f04SMark Brown 
1691d9f9f04SMark Brown 	mutex_lock(&wm8400->io_lock);
1701d9f9f04SMark Brown 
1711d9f9f04SMark Brown 	wm8400_read(wm8400, reg, 1, &val);
1721d9f9f04SMark Brown 
1731d9f9f04SMark Brown 	mutex_unlock(&wm8400->io_lock);
1741d9f9f04SMark Brown 
1751d9f9f04SMark Brown 	return val;
1761d9f9f04SMark Brown }
1771d9f9f04SMark Brown EXPORT_SYMBOL_GPL(wm8400_reg_read);
1781d9f9f04SMark Brown 
1791d9f9f04SMark Brown int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
1801d9f9f04SMark Brown {
1811d9f9f04SMark Brown 	int ret;
1821d9f9f04SMark Brown 
1831d9f9f04SMark Brown 	mutex_lock(&wm8400->io_lock);
1841d9f9f04SMark Brown 
1851d9f9f04SMark Brown 	ret = wm8400_read(wm8400, reg, count, data);
1861d9f9f04SMark Brown 
1871d9f9f04SMark Brown 	mutex_unlock(&wm8400->io_lock);
1881d9f9f04SMark Brown 
1891d9f9f04SMark Brown 	return ret;
1901d9f9f04SMark Brown }
1911d9f9f04SMark Brown EXPORT_SYMBOL_GPL(wm8400_block_read);
1921d9f9f04SMark Brown 
1931d9f9f04SMark Brown /**
1941d9f9f04SMark Brown  * wm8400_set_bits - Bitmask write
1951d9f9f04SMark Brown  *
1961d9f9f04SMark Brown  * @wm8400: Pointer to wm8400 control structure
1971d9f9f04SMark Brown  * @reg:    Register to access
1981d9f9f04SMark Brown  * @mask:   Mask of bits to change
1991d9f9f04SMark Brown  * @val:    Value to set for masked bits
2001d9f9f04SMark Brown  */
2011d9f9f04SMark Brown int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
2021d9f9f04SMark Brown {
2031d9f9f04SMark Brown 	u16 tmp;
2041d9f9f04SMark Brown 	int ret;
2051d9f9f04SMark Brown 
2061d9f9f04SMark Brown 	mutex_lock(&wm8400->io_lock);
2071d9f9f04SMark Brown 
2081d9f9f04SMark Brown 	ret = wm8400_read(wm8400, reg, 1, &tmp);
2091d9f9f04SMark Brown 	tmp = (tmp & ~mask) | val;
2101d9f9f04SMark Brown 	if (ret == 0)
2111d9f9f04SMark Brown 		ret = wm8400_write(wm8400, reg, 1, &tmp);
2121d9f9f04SMark Brown 
2131d9f9f04SMark Brown 	mutex_unlock(&wm8400->io_lock);
2141d9f9f04SMark Brown 
2151d9f9f04SMark Brown 	return ret;
2161d9f9f04SMark Brown }
2171d9f9f04SMark Brown EXPORT_SYMBOL_GPL(wm8400_set_bits);
2181d9f9f04SMark Brown 
2191d9f9f04SMark Brown /**
2201d9f9f04SMark Brown  * wm8400_reset_codec_reg_cache - Reset cached codec registers to
2211d9f9f04SMark Brown  * their default values.
2221d9f9f04SMark Brown  */
2231d9f9f04SMark Brown void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
2241d9f9f04SMark Brown {
2251d9f9f04SMark Brown 	int i;
2261d9f9f04SMark Brown 
2271d9f9f04SMark Brown 	mutex_lock(&wm8400->io_lock);
2281d9f9f04SMark Brown 
2291d9f9f04SMark Brown 	/* Reset all codec registers to their initial value */
2301d9f9f04SMark Brown 	for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
2311d9f9f04SMark Brown 		if (reg_data[i].is_codec)
2321d9f9f04SMark Brown 			wm8400->reg_cache[i] = reg_data[i].default_val;
2331d9f9f04SMark Brown 
2341d9f9f04SMark Brown 	mutex_unlock(&wm8400->io_lock);
2351d9f9f04SMark Brown }
2361d9f9f04SMark Brown EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
2371d9f9f04SMark Brown 
238b8380c1aSMark Brown static int wm8400_register_codec(struct wm8400 *wm8400)
239b8380c1aSMark Brown {
240b8380c1aSMark Brown 	struct mfd_cell cell = {
241b8380c1aSMark Brown 		.name = "wm8400-codec",
242e45be4b5SSamuel Ortiz 		.platform_data = wm8400,
243e45be4b5SSamuel Ortiz 		.pdata_size = sizeof(*wm8400),
244b8380c1aSMark Brown 	};
245b8380c1aSMark Brown 
246b8380c1aSMark Brown 	return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
247b8380c1aSMark Brown }
248b8380c1aSMark Brown 
2491d9f9f04SMark Brown /*
2501d9f9f04SMark Brown  * wm8400_init - Generic initialisation
2511d9f9f04SMark Brown  *
2521d9f9f04SMark Brown  * The WM8400 can be configured as either an I2C or SPI device.  Probe
2531d9f9f04SMark Brown  * functions for each bus set up the accessors then call into this to
2541d9f9f04SMark Brown  * set up the device itself.
2551d9f9f04SMark Brown  */
2561d9f9f04SMark Brown static int wm8400_init(struct wm8400 *wm8400,
2571d9f9f04SMark Brown 		       struct wm8400_platform_data *pdata)
2581d9f9f04SMark Brown {
2591d9f9f04SMark Brown 	u16 reg;
2601d9f9f04SMark Brown 	int ret, i;
2611d9f9f04SMark Brown 
2621d9f9f04SMark Brown 	mutex_init(&wm8400->io_lock);
2631d9f9f04SMark Brown 
2641902a9e6SGreg Kroah-Hartman 	dev_set_drvdata(wm8400->dev, wm8400);
2651d9f9f04SMark Brown 
2661d9f9f04SMark Brown 	/* Check that this is actually a WM8400 */
267*50eeef5dSMark Brown 	ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, &i);
2681d9f9f04SMark Brown 	if (ret != 0) {
2691d9f9f04SMark Brown 		dev_err(wm8400->dev, "Chip ID register read failed\n");
2701d9f9f04SMark Brown 		return -EIO;
2711d9f9f04SMark Brown 	}
272*50eeef5dSMark Brown 	if (i != reg_data[WM8400_RESET_ID].default_val) {
2731d9f9f04SMark Brown 		dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
274*50eeef5dSMark Brown 			reg);
2751d9f9f04SMark Brown 		return -ENODEV;
2761d9f9f04SMark Brown 	}
2771d9f9f04SMark Brown 
2781d9f9f04SMark Brown 	/* We don't know what state the hardware is in and since this
2791d9f9f04SMark Brown 	 * is a PMIC we can't reset it safely so initialise the register
2801d9f9f04SMark Brown 	 * cache from the hardware.
2811d9f9f04SMark Brown 	 */
282*50eeef5dSMark Brown 	ret = regmap_raw_read(wm8400->regmap, 0, wm8400->reg_cache,
283*50eeef5dSMark Brown 			      ARRAY_SIZE(wm8400->reg_cache));
2841d9f9f04SMark Brown 	if (ret != 0) {
2851d9f9f04SMark Brown 		dev_err(wm8400->dev, "Register cache read failed\n");
2861d9f9f04SMark Brown 		return -EIO;
2871d9f9f04SMark Brown 	}
2881d9f9f04SMark Brown 	for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
2891d9f9f04SMark Brown 		wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
2901d9f9f04SMark Brown 
2911d9f9f04SMark Brown 	/* If the codec is in reset use hard coded values */
2921d9f9f04SMark Brown 	if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
2931d9f9f04SMark Brown 		for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
2941d9f9f04SMark Brown 			if (reg_data[i].is_codec)
2951d9f9f04SMark Brown 				wm8400->reg_cache[i] = reg_data[i].default_val;
2961d9f9f04SMark Brown 
2971d9f9f04SMark Brown 	ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
2981d9f9f04SMark Brown 	if (ret != 0) {
2991d9f9f04SMark Brown 		dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
3001d9f9f04SMark Brown 		return ret;
3011d9f9f04SMark Brown 	}
3021d9f9f04SMark Brown 	reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
3031d9f9f04SMark Brown 	dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
3041d9f9f04SMark Brown 
305b8380c1aSMark Brown 	ret = wm8400_register_codec(wm8400);
306b8380c1aSMark Brown 	if (ret != 0) {
307b8380c1aSMark Brown 		dev_err(wm8400->dev, "Failed to register codec\n");
308b8380c1aSMark Brown 		goto err_children;
309b8380c1aSMark Brown 	}
310b8380c1aSMark Brown 
3111d9f9f04SMark Brown 	if (pdata && pdata->platform_init) {
3121d9f9f04SMark Brown 		ret = pdata->platform_init(wm8400->dev);
313b8380c1aSMark Brown 		if (ret != 0) {
3141d9f9f04SMark Brown 			dev_err(wm8400->dev, "Platform init failed: %d\n",
3151d9f9f04SMark Brown 				ret);
316b8380c1aSMark Brown 			goto err_children;
317b8380c1aSMark Brown 		}
3181d9f9f04SMark Brown 	} else
3191d9f9f04SMark Brown 		dev_warn(wm8400->dev, "No platform initialisation supplied\n");
3201d9f9f04SMark Brown 
321b8380c1aSMark Brown 	return 0;
322b8380c1aSMark Brown 
323b8380c1aSMark Brown err_children:
324b8380c1aSMark Brown 	mfd_remove_devices(wm8400->dev);
3251d9f9f04SMark Brown 	return ret;
3261d9f9f04SMark Brown }
3271d9f9f04SMark Brown 
3281d9f9f04SMark Brown static void wm8400_release(struct wm8400 *wm8400)
3291d9f9f04SMark Brown {
330b8380c1aSMark Brown 	mfd_remove_devices(wm8400->dev);
3311d9f9f04SMark Brown }
3321d9f9f04SMark Brown 
333*50eeef5dSMark Brown static const struct regmap_config wm8400_regmap_config = {
334*50eeef5dSMark Brown 	.reg_bits = 8,
335*50eeef5dSMark Brown 	.val_bits = 16,
336*50eeef5dSMark Brown 	.max_register = WM8400_REGISTER_COUNT - 1,
337*50eeef5dSMark Brown };
338*50eeef5dSMark Brown 
3391d9f9f04SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
3401d9f9f04SMark Brown static int wm8400_i2c_probe(struct i2c_client *i2c,
3411d9f9f04SMark Brown 			    const struct i2c_device_id *id)
3421d9f9f04SMark Brown {
3431d9f9f04SMark Brown 	struct wm8400 *wm8400;
3441d9f9f04SMark Brown 	int ret;
3451d9f9f04SMark Brown 
3461d9f9f04SMark Brown 	wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
3471d9f9f04SMark Brown 	if (wm8400 == NULL) {
3481d9f9f04SMark Brown 		ret = -ENOMEM;
3491d9f9f04SMark Brown 		goto err;
3501d9f9f04SMark Brown 	}
3511d9f9f04SMark Brown 
352*50eeef5dSMark Brown 	wm8400->regmap = regmap_init_i2c(i2c, &wm8400_regmap_config);
353*50eeef5dSMark Brown 	if (IS_ERR(wm8400->regmap)) {
354*50eeef5dSMark Brown 		ret = PTR_ERR(wm8400->regmap);
355*50eeef5dSMark Brown 		goto struct_err;
356*50eeef5dSMark Brown 	}
357*50eeef5dSMark Brown 
3581d9f9f04SMark Brown 	wm8400->dev = &i2c->dev;
3591d9f9f04SMark Brown 	i2c_set_clientdata(i2c, wm8400);
3601d9f9f04SMark Brown 
3611d9f9f04SMark Brown 	ret = wm8400_init(wm8400, i2c->dev.platform_data);
3621d9f9f04SMark Brown 	if (ret != 0)
363*50eeef5dSMark Brown 		goto map_err;
3641d9f9f04SMark Brown 
3651d9f9f04SMark Brown 	return 0;
3661d9f9f04SMark Brown 
367*50eeef5dSMark Brown map_err:
368*50eeef5dSMark Brown 	regmap_exit(wm8400->regmap);
3691d9f9f04SMark Brown struct_err:
3701d9f9f04SMark Brown 	kfree(wm8400);
3711d9f9f04SMark Brown err:
3721d9f9f04SMark Brown 	return ret;
3731d9f9f04SMark Brown }
3741d9f9f04SMark Brown 
3751d9f9f04SMark Brown static int wm8400_i2c_remove(struct i2c_client *i2c)
3761d9f9f04SMark Brown {
3771d9f9f04SMark Brown 	struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
3781d9f9f04SMark Brown 
3791d9f9f04SMark Brown 	wm8400_release(wm8400);
380*50eeef5dSMark Brown 	regmap_exit(wm8400->regmap);
3811d9f9f04SMark Brown 	kfree(wm8400);
3821d9f9f04SMark Brown 
3831d9f9f04SMark Brown 	return 0;
3841d9f9f04SMark Brown }
3851d9f9f04SMark Brown 
3861d9f9f04SMark Brown static const struct i2c_device_id wm8400_i2c_id[] = {
3871d9f9f04SMark Brown        { "wm8400", 0 },
3881d9f9f04SMark Brown        { }
3891d9f9f04SMark Brown };
3901d9f9f04SMark Brown MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
3911d9f9f04SMark Brown 
3921d9f9f04SMark Brown static struct i2c_driver wm8400_i2c_driver = {
3931d9f9f04SMark Brown 	.driver = {
3941d9f9f04SMark Brown 		.name = "WM8400",
3951d9f9f04SMark Brown 		.owner = THIS_MODULE,
3961d9f9f04SMark Brown 	},
3971d9f9f04SMark Brown 	.probe    = wm8400_i2c_probe,
3981d9f9f04SMark Brown 	.remove   = wm8400_i2c_remove,
3991d9f9f04SMark Brown 	.id_table = wm8400_i2c_id,
4001d9f9f04SMark Brown };
4011d9f9f04SMark Brown #endif
4021d9f9f04SMark Brown 
4031d9f9f04SMark Brown static int __init wm8400_module_init(void)
4041d9f9f04SMark Brown {
4051d9f9f04SMark Brown 	int ret = -ENODEV;
4061d9f9f04SMark Brown 
4071d9f9f04SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
4081d9f9f04SMark Brown 	ret = i2c_add_driver(&wm8400_i2c_driver);
4091d9f9f04SMark Brown 	if (ret != 0)
4101d9f9f04SMark Brown 		pr_err("Failed to register I2C driver: %d\n", ret);
4111d9f9f04SMark Brown #endif
4121d9f9f04SMark Brown 
4131d9f9f04SMark Brown 	return ret;
4141d9f9f04SMark Brown }
4152021de87SSamuel Ortiz subsys_initcall(wm8400_module_init);
4161d9f9f04SMark Brown 
4171d9f9f04SMark Brown static void __exit wm8400_module_exit(void)
4181d9f9f04SMark Brown {
4191d9f9f04SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
4201d9f9f04SMark Brown 	i2c_del_driver(&wm8400_i2c_driver);
4211d9f9f04SMark Brown #endif
4221d9f9f04SMark Brown }
4231d9f9f04SMark Brown module_exit(wm8400_module_exit);
4241d9f9f04SMark Brown 
4251d9f9f04SMark Brown MODULE_LICENSE("GPL");
4261d9f9f04SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
427