xref: /linux/drivers/mfd/tps65910.c (revision da257efa8787be2594baf08ed84461d71d6a6d23)
127c6750eSGraeme Gregory /*
227c6750eSGraeme Gregory  * tps65910.c  --  TI TPS6591x
327c6750eSGraeme Gregory  *
427c6750eSGraeme Gregory  * Copyright 2010 Texas Instruments Inc.
527c6750eSGraeme Gregory  *
627c6750eSGraeme Gregory  * Author: Graeme Gregory <gg@slimlogic.co.uk>
727c6750eSGraeme Gregory  * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
827c6750eSGraeme Gregory  *
927c6750eSGraeme Gregory  *  This program is free software; you can redistribute it and/or modify it
1027c6750eSGraeme Gregory  *  under  the terms of the GNU General  Public License as published by the
1127c6750eSGraeme Gregory  *  Free Software Foundation;  either version 2 of the License, or (at your
1227c6750eSGraeme Gregory  *  option) any later version.
1327c6750eSGraeme Gregory  *
1427c6750eSGraeme Gregory  */
1527c6750eSGraeme Gregory 
1627c6750eSGraeme Gregory #include <linux/module.h>
1727c6750eSGraeme Gregory #include <linux/moduleparam.h>
1827c6750eSGraeme Gregory #include <linux/init.h>
19dc9913a0SLaxman Dewangan #include <linux/err.h>
2027c6750eSGraeme Gregory #include <linux/slab.h>
2127c6750eSGraeme Gregory #include <linux/i2c.h>
224aab3fadSLaxman Dewangan #include <linux/interrupt.h>
234aab3fadSLaxman Dewangan #include <linux/irq.h>
244aab3fadSLaxman Dewangan #include <linux/irqdomain.h>
2527c6750eSGraeme Gregory #include <linux/mfd/core.h>
26dc9913a0SLaxman Dewangan #include <linux/regmap.h>
2727c6750eSGraeme Gregory #include <linux/mfd/tps65910.h>
281fead3f3SSachin Kamat #include <linux/of.h>
29cd4209ceSRhyland Klein #include <linux/of_device.h>
3027c6750eSGraeme Gregory 
315863eabbSVenu Byravarasu static struct resource rtc_resources[] = {
325863eabbSVenu Byravarasu 	{
335863eabbSVenu Byravarasu 		.start  = TPS65910_IRQ_RTC_ALARM,
345863eabbSVenu Byravarasu 		.end    = TPS65910_IRQ_RTC_ALARM,
355863eabbSVenu Byravarasu 		.flags  = IORESOURCE_IRQ,
365863eabbSVenu Byravarasu 	}
375863eabbSVenu Byravarasu };
385863eabbSVenu Byravarasu 
3930fe2b5bSGeert Uytterhoeven static const struct mfd_cell tps65910s[] = {
4027c6750eSGraeme Gregory 	{
4132df986eSLaxman Dewangan 		.name = "tps65910-gpio",
4232df986eSLaxman Dewangan 	},
4332df986eSLaxman Dewangan 	{
4427c6750eSGraeme Gregory 		.name = "tps65910-pmic",
4527c6750eSGraeme Gregory 	},
4627c6750eSGraeme Gregory 	{
4727c6750eSGraeme Gregory 		.name = "tps65910-rtc",
485863eabbSVenu Byravarasu 		.num_resources = ARRAY_SIZE(rtc_resources),
495863eabbSVenu Byravarasu 		.resources = &rtc_resources[0],
5027c6750eSGraeme Gregory 	},
5127c6750eSGraeme Gregory 	{
5227c6750eSGraeme Gregory 		.name = "tps65910-power",
5327c6750eSGraeme Gregory 	},
5427c6750eSGraeme Gregory };
5527c6750eSGraeme Gregory 
5627c6750eSGraeme Gregory 
574aab3fadSLaxman Dewangan static const struct regmap_irq tps65911_irqs[] = {
584aab3fadSLaxman Dewangan 	/* INT_STS */
594aab3fadSLaxman Dewangan 	[TPS65911_IRQ_PWRHOLD_F] = {
604aab3fadSLaxman Dewangan 		.mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
614aab3fadSLaxman Dewangan 		.reg_offset = 0,
624aab3fadSLaxman Dewangan 	},
634aab3fadSLaxman Dewangan 	[TPS65911_IRQ_VBAT_VMHI] = {
644aab3fadSLaxman Dewangan 		.mask = INT_MSK_VMBHI_IT_MSK_MASK,
654aab3fadSLaxman Dewangan 		.reg_offset = 0,
664aab3fadSLaxman Dewangan 	},
674aab3fadSLaxman Dewangan 	[TPS65911_IRQ_PWRON] = {
684aab3fadSLaxman Dewangan 		.mask = INT_MSK_PWRON_IT_MSK_MASK,
694aab3fadSLaxman Dewangan 		.reg_offset = 0,
704aab3fadSLaxman Dewangan 	},
714aab3fadSLaxman Dewangan 	[TPS65911_IRQ_PWRON_LP] = {
724aab3fadSLaxman Dewangan 		.mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
734aab3fadSLaxman Dewangan 		.reg_offset = 0,
744aab3fadSLaxman Dewangan 	},
754aab3fadSLaxman Dewangan 	[TPS65911_IRQ_PWRHOLD_R] = {
764aab3fadSLaxman Dewangan 		.mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
774aab3fadSLaxman Dewangan 		.reg_offset = 0,
784aab3fadSLaxman Dewangan 	},
794aab3fadSLaxman Dewangan 	[TPS65911_IRQ_HOTDIE] = {
804aab3fadSLaxman Dewangan 		.mask = INT_MSK_HOTDIE_IT_MSK_MASK,
814aab3fadSLaxman Dewangan 		.reg_offset = 0,
824aab3fadSLaxman Dewangan 	},
834aab3fadSLaxman Dewangan 	[TPS65911_IRQ_RTC_ALARM] = {
844aab3fadSLaxman Dewangan 		.mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
854aab3fadSLaxman Dewangan 		.reg_offset = 0,
864aab3fadSLaxman Dewangan 	},
874aab3fadSLaxman Dewangan 	[TPS65911_IRQ_RTC_PERIOD] = {
884aab3fadSLaxman Dewangan 		.mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
894aab3fadSLaxman Dewangan 		.reg_offset = 0,
904aab3fadSLaxman Dewangan 	},
914aab3fadSLaxman Dewangan 
924aab3fadSLaxman Dewangan 	/* INT_STS2 */
934aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO0_R] = {
944aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
954aab3fadSLaxman Dewangan 		.reg_offset = 1,
964aab3fadSLaxman Dewangan 	},
974aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO0_F] = {
984aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
994aab3fadSLaxman Dewangan 		.reg_offset = 1,
1004aab3fadSLaxman Dewangan 	},
1014aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO1_R] = {
1024aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO1_R_IT_MSK_MASK,
1034aab3fadSLaxman Dewangan 		.reg_offset = 1,
1044aab3fadSLaxman Dewangan 	},
1054aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO1_F] = {
1064aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO1_F_IT_MSK_MASK,
1074aab3fadSLaxman Dewangan 		.reg_offset = 1,
1084aab3fadSLaxman Dewangan 	},
1094aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO2_R] = {
1104aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO2_R_IT_MSK_MASK,
1114aab3fadSLaxman Dewangan 		.reg_offset = 1,
1124aab3fadSLaxman Dewangan 	},
1134aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO2_F] = {
1144aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO2_F_IT_MSK_MASK,
1154aab3fadSLaxman Dewangan 		.reg_offset = 1,
1164aab3fadSLaxman Dewangan 	},
1174aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO3_R] = {
1184aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO3_R_IT_MSK_MASK,
1194aab3fadSLaxman Dewangan 		.reg_offset = 1,
1204aab3fadSLaxman Dewangan 	},
1214aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO3_F] = {
1224aab3fadSLaxman Dewangan 		.mask = INT_MSK2_GPIO3_F_IT_MSK_MASK,
1234aab3fadSLaxman Dewangan 		.reg_offset = 1,
1244aab3fadSLaxman Dewangan 	},
1254aab3fadSLaxman Dewangan 
1264aab3fadSLaxman Dewangan 	/* INT_STS2 */
1274aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO4_R] = {
1284aab3fadSLaxman Dewangan 		.mask = INT_MSK3_GPIO4_R_IT_MSK_MASK,
1294aab3fadSLaxman Dewangan 		.reg_offset = 2,
1304aab3fadSLaxman Dewangan 	},
1314aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO4_F] = {
1324aab3fadSLaxman Dewangan 		.mask = INT_MSK3_GPIO4_F_IT_MSK_MASK,
1334aab3fadSLaxman Dewangan 		.reg_offset = 2,
1344aab3fadSLaxman Dewangan 	},
1354aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO5_R] = {
1364aab3fadSLaxman Dewangan 		.mask = INT_MSK3_GPIO5_R_IT_MSK_MASK,
1374aab3fadSLaxman Dewangan 		.reg_offset = 2,
1384aab3fadSLaxman Dewangan 	},
1394aab3fadSLaxman Dewangan 	[TPS65911_IRQ_GPIO5_F] = {
1404aab3fadSLaxman Dewangan 		.mask = INT_MSK3_GPIO5_F_IT_MSK_MASK,
1414aab3fadSLaxman Dewangan 		.reg_offset = 2,
1424aab3fadSLaxman Dewangan 	},
1434aab3fadSLaxman Dewangan 	[TPS65911_IRQ_WTCHDG] = {
1444aab3fadSLaxman Dewangan 		.mask = INT_MSK3_WTCHDG_IT_MSK_MASK,
1454aab3fadSLaxman Dewangan 		.reg_offset = 2,
1464aab3fadSLaxman Dewangan 	},
1474aab3fadSLaxman Dewangan 	[TPS65911_IRQ_VMBCH2_H] = {
1484aab3fadSLaxman Dewangan 		.mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK,
1494aab3fadSLaxman Dewangan 		.reg_offset = 2,
1504aab3fadSLaxman Dewangan 	},
1514aab3fadSLaxman Dewangan 	[TPS65911_IRQ_VMBCH2_L] = {
1524aab3fadSLaxman Dewangan 		.mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK,
1534aab3fadSLaxman Dewangan 		.reg_offset = 2,
1544aab3fadSLaxman Dewangan 	},
1554aab3fadSLaxman Dewangan 	[TPS65911_IRQ_PWRDN] = {
1564aab3fadSLaxman Dewangan 		.mask = INT_MSK3_PWRDN_IT_MSK_MASK,
1574aab3fadSLaxman Dewangan 		.reg_offset = 2,
1584aab3fadSLaxman Dewangan 	},
1594aab3fadSLaxman Dewangan };
1604aab3fadSLaxman Dewangan 
1614aab3fadSLaxman Dewangan static const struct regmap_irq tps65910_irqs[] = {
1624aab3fadSLaxman Dewangan 	/* INT_STS */
1634aab3fadSLaxman Dewangan 	[TPS65910_IRQ_VBAT_VMBDCH] = {
1644aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK,
1654aab3fadSLaxman Dewangan 		.reg_offset = 0,
1664aab3fadSLaxman Dewangan 	},
1674aab3fadSLaxman Dewangan 	[TPS65910_IRQ_VBAT_VMHI] = {
1684aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK,
1694aab3fadSLaxman Dewangan 		.reg_offset = 0,
1704aab3fadSLaxman Dewangan 	},
1714aab3fadSLaxman Dewangan 	[TPS65910_IRQ_PWRON] = {
1724aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK,
1734aab3fadSLaxman Dewangan 		.reg_offset = 0,
1744aab3fadSLaxman Dewangan 	},
1754aab3fadSLaxman Dewangan 	[TPS65910_IRQ_PWRON_LP] = {
1764aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK,
1774aab3fadSLaxman Dewangan 		.reg_offset = 0,
1784aab3fadSLaxman Dewangan 	},
1794aab3fadSLaxman Dewangan 	[TPS65910_IRQ_PWRHOLD] = {
1804aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK,
1814aab3fadSLaxman Dewangan 		.reg_offset = 0,
1824aab3fadSLaxman Dewangan 	},
1834aab3fadSLaxman Dewangan 	[TPS65910_IRQ_HOTDIE] = {
1844aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK,
1854aab3fadSLaxman Dewangan 		.reg_offset = 0,
1864aab3fadSLaxman Dewangan 	},
1874aab3fadSLaxman Dewangan 	[TPS65910_IRQ_RTC_ALARM] = {
1884aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK,
1894aab3fadSLaxman Dewangan 		.reg_offset = 0,
1904aab3fadSLaxman Dewangan 	},
1914aab3fadSLaxman Dewangan 	[TPS65910_IRQ_RTC_PERIOD] = {
1924aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK,
1934aab3fadSLaxman Dewangan 		.reg_offset = 0,
1944aab3fadSLaxman Dewangan 	},
1954aab3fadSLaxman Dewangan 
1964aab3fadSLaxman Dewangan 	/* INT_STS2 */
1974aab3fadSLaxman Dewangan 	[TPS65910_IRQ_GPIO_R] = {
1984aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK,
1994aab3fadSLaxman Dewangan 		.reg_offset = 1,
2004aab3fadSLaxman Dewangan 	},
2014aab3fadSLaxman Dewangan 	[TPS65910_IRQ_GPIO_F] = {
2024aab3fadSLaxman Dewangan 		.mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK,
2034aab3fadSLaxman Dewangan 		.reg_offset = 1,
2044aab3fadSLaxman Dewangan 	},
2054aab3fadSLaxman Dewangan };
2064aab3fadSLaxman Dewangan 
2074aab3fadSLaxman Dewangan static struct regmap_irq_chip tps65911_irq_chip = {
2084aab3fadSLaxman Dewangan 	.name = "tps65910",
2094aab3fadSLaxman Dewangan 	.irqs = tps65911_irqs,
2104aab3fadSLaxman Dewangan 	.num_irqs = ARRAY_SIZE(tps65911_irqs),
2114aab3fadSLaxman Dewangan 	.num_regs = 3,
2124aab3fadSLaxman Dewangan 	.irq_reg_stride = 2,
2134aab3fadSLaxman Dewangan 	.status_base = TPS65910_INT_STS,
2144aab3fadSLaxman Dewangan 	.mask_base = TPS65910_INT_MSK,
2150582c0faSKim, Milo 	.ack_base = TPS65910_INT_STS,
2164aab3fadSLaxman Dewangan };
2174aab3fadSLaxman Dewangan 
2184aab3fadSLaxman Dewangan static struct regmap_irq_chip tps65910_irq_chip = {
2194aab3fadSLaxman Dewangan 	.name = "tps65910",
2204aab3fadSLaxman Dewangan 	.irqs = tps65910_irqs,
2214aab3fadSLaxman Dewangan 	.num_irqs = ARRAY_SIZE(tps65910_irqs),
2224aab3fadSLaxman Dewangan 	.num_regs = 2,
2234aab3fadSLaxman Dewangan 	.irq_reg_stride = 2,
2244aab3fadSLaxman Dewangan 	.status_base = TPS65910_INT_STS,
2254aab3fadSLaxman Dewangan 	.mask_base = TPS65910_INT_MSK,
2260582c0faSKim, Milo 	.ack_base = TPS65910_INT_STS,
2274aab3fadSLaxman Dewangan };
2284aab3fadSLaxman Dewangan 
2294aab3fadSLaxman Dewangan static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
2304aab3fadSLaxman Dewangan 		    struct tps65910_platform_data *pdata)
2314aab3fadSLaxman Dewangan {
232dae3be36SMarkus Elfring 	int ret;
2334aab3fadSLaxman Dewangan 	static struct regmap_irq_chip *tps6591x_irqs_chip;
2344aab3fadSLaxman Dewangan 
2354aab3fadSLaxman Dewangan 	if (!irq) {
2364aab3fadSLaxman Dewangan 		dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
2374aab3fadSLaxman Dewangan 		return -EINVAL;
2384aab3fadSLaxman Dewangan 	}
2394aab3fadSLaxman Dewangan 
2404aab3fadSLaxman Dewangan 	if (!pdata) {
2414aab3fadSLaxman Dewangan 		dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
2424aab3fadSLaxman Dewangan 		return -EINVAL;
2434aab3fadSLaxman Dewangan 	}
2444aab3fadSLaxman Dewangan 
2454aab3fadSLaxman Dewangan 	switch (tps65910_chip_id(tps65910)) {
2464aab3fadSLaxman Dewangan 	case TPS65910:
2474aab3fadSLaxman Dewangan 		tps6591x_irqs_chip = &tps65910_irq_chip;
2484aab3fadSLaxman Dewangan 		break;
2494aab3fadSLaxman Dewangan 	case TPS65911:
2504aab3fadSLaxman Dewangan 		tps6591x_irqs_chip = &tps65911_irq_chip;
2514aab3fadSLaxman Dewangan 		break;
2524aab3fadSLaxman Dewangan 	}
2534aab3fadSLaxman Dewangan 
2544aab3fadSLaxman Dewangan 	tps65910->chip_irq = irq;
2556167c5bcSLaxman Dewangan 	ret = devm_regmap_add_irq_chip(tps65910->dev, tps65910->regmap,
2566167c5bcSLaxman Dewangan 				       tps65910->chip_irq,
2574aab3fadSLaxman Dewangan 				       IRQF_ONESHOT, pdata->irq_base,
2584aab3fadSLaxman Dewangan 				       tps6591x_irqs_chip, &tps65910->irq_data);
259483e2dfdSKrzysztof Kozlowski 	if (ret < 0) {
2604aab3fadSLaxman Dewangan 		dev_warn(tps65910->dev, "Failed to add irq_chip %d\n", ret);
261483e2dfdSKrzysztof Kozlowski 		tps65910->chip_irq = 0;
262483e2dfdSKrzysztof Kozlowski 	}
2634aab3fadSLaxman Dewangan 	return ret;
2644aab3fadSLaxman Dewangan }
2654aab3fadSLaxman Dewangan 
266dc9913a0SLaxman Dewangan static bool is_volatile_reg(struct device *dev, unsigned int reg)
267dc9913a0SLaxman Dewangan {
268dc9913a0SLaxman Dewangan 	struct tps65910 *tps65910 = dev_get_drvdata(dev);
269dc9913a0SLaxman Dewangan 
270dc9913a0SLaxman Dewangan 	/*
271dc9913a0SLaxman Dewangan 	 * Caching all regulator registers.
272dc9913a0SLaxman Dewangan 	 * All regualator register address range is same for
273dc9913a0SLaxman Dewangan 	 * TPS65910 and TPS65911
274dc9913a0SLaxman Dewangan 	 */
275dc9913a0SLaxman Dewangan 	if ((reg >= TPS65910_VIO) && (reg <= TPS65910_VDAC)) {
276dc9913a0SLaxman Dewangan 		/* Check for non-existing register */
277dc9913a0SLaxman Dewangan 		if (tps65910_chip_id(tps65910) == TPS65910)
278dc9913a0SLaxman Dewangan 			if ((reg == TPS65911_VDDCTRL_OP) ||
279dc9913a0SLaxman Dewangan 				(reg == TPS65911_VDDCTRL_SR))
280dc9913a0SLaxman Dewangan 				return true;
281dc9913a0SLaxman Dewangan 		return false;
282dc9913a0SLaxman Dewangan 	}
283dc9913a0SLaxman Dewangan 	return true;
284dc9913a0SLaxman Dewangan }
285dc9913a0SLaxman Dewangan 
28639ecb037SLaxman Dewangan static const struct regmap_config tps65910_regmap_config = {
287dc9913a0SLaxman Dewangan 	.reg_bits = 8,
288dc9913a0SLaxman Dewangan 	.val_bits = 8,
289dc9913a0SLaxman Dewangan 	.volatile_reg = is_volatile_reg,
2903bf6bf9bSLaxman Dewangan 	.max_register = TPS65910_MAX_REGISTER - 1,
291dc9913a0SLaxman Dewangan 	.cache_type = REGCACHE_RBTREE,
292dc9913a0SLaxman Dewangan };
293dc9913a0SLaxman Dewangan 
294f791be49SBill Pemberton static int tps65910_ck32k_init(struct tps65910 *tps65910,
295712db99dSJohan Hovold 					struct tps65910_board *pmic_pdata)
296712db99dSJohan Hovold {
297712db99dSJohan Hovold 	int ret;
298712db99dSJohan Hovold 
299d02e83cbSJohan Hovold 	if (!pmic_pdata->en_ck32k_xtal)
300d02e83cbSJohan Hovold 		return 0;
301d02e83cbSJohan Hovold 
302d02e83cbSJohan Hovold 	ret = tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
303712db99dSJohan Hovold 						DEVCTRL_CK32K_CTRL_MASK);
304712db99dSJohan Hovold 	if (ret < 0) {
305d02e83cbSJohan Hovold 		dev_err(tps65910->dev, "clear ck32k_ctrl failed: %d\n", ret);
306712db99dSJohan Hovold 		return ret;
307712db99dSJohan Hovold 	}
308712db99dSJohan Hovold 
309712db99dSJohan Hovold 	return 0;
310712db99dSJohan Hovold }
311712db99dSJohan Hovold 
312f791be49SBill Pemberton static int tps65910_sleepinit(struct tps65910 *tps65910,
313201cf052SLaxman Dewangan 		struct tps65910_board *pmic_pdata)
314201cf052SLaxman Dewangan {
315*da257efaSMarkus Elfring 	struct device *dev;
316dae3be36SMarkus Elfring 	int ret;
317201cf052SLaxman Dewangan 
318201cf052SLaxman Dewangan 	dev = tps65910->dev;
319201cf052SLaxman Dewangan 
320201cf052SLaxman Dewangan 	if (!pmic_pdata->en_dev_slp)
321201cf052SLaxman Dewangan 		return 0;
322201cf052SLaxman Dewangan 
323201cf052SLaxman Dewangan 	/* enabling SLEEP device state */
3243f7e8275SRhyland Klein 	ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
325201cf052SLaxman Dewangan 				DEVCTRL_DEV_SLP_MASK);
326201cf052SLaxman Dewangan 	if (ret < 0) {
327201cf052SLaxman Dewangan 		dev_err(dev, "set dev_slp failed: %d\n", ret);
328201cf052SLaxman Dewangan 		goto err_sleep_init;
329201cf052SLaxman Dewangan 	}
330201cf052SLaxman Dewangan 
331a9bc67deSMichał Mirosław 	if (pmic_pdata->slp_keepon.therm_keepon) {
3323f7e8275SRhyland Klein 		ret = tps65910_reg_set_bits(tps65910,
3333f7e8275SRhyland Klein 				TPS65910_SLEEP_KEEP_RES_ON,
334201cf052SLaxman Dewangan 				SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);
335201cf052SLaxman Dewangan 		if (ret < 0) {
336201cf052SLaxman Dewangan 			dev_err(dev, "set therm_keepon failed: %d\n", ret);
337201cf052SLaxman Dewangan 			goto disable_dev_slp;
338201cf052SLaxman Dewangan 		}
339201cf052SLaxman Dewangan 	}
340201cf052SLaxman Dewangan 
341a9bc67deSMichał Mirosław 	if (pmic_pdata->slp_keepon.clkout32k_keepon) {
3423f7e8275SRhyland Klein 		ret = tps65910_reg_set_bits(tps65910,
3433f7e8275SRhyland Klein 				TPS65910_SLEEP_KEEP_RES_ON,
344201cf052SLaxman Dewangan 				SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
345201cf052SLaxman Dewangan 		if (ret < 0) {
346201cf052SLaxman Dewangan 			dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);
347201cf052SLaxman Dewangan 			goto disable_dev_slp;
348201cf052SLaxman Dewangan 		}
349201cf052SLaxman Dewangan 	}
350201cf052SLaxman Dewangan 
351a9bc67deSMichał Mirosław 	if (pmic_pdata->slp_keepon.i2chs_keepon) {
3523f7e8275SRhyland Klein 		ret = tps65910_reg_set_bits(tps65910,
3533f7e8275SRhyland Klein 				TPS65910_SLEEP_KEEP_RES_ON,
354201cf052SLaxman Dewangan 				SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);
355201cf052SLaxman Dewangan 		if (ret < 0) {
356201cf052SLaxman Dewangan 			dev_err(dev, "set i2chs_keepon failed: %d\n", ret);
357201cf052SLaxman Dewangan 			goto disable_dev_slp;
358201cf052SLaxman Dewangan 		}
359201cf052SLaxman Dewangan 	}
360201cf052SLaxman Dewangan 
361201cf052SLaxman Dewangan 	return 0;
362201cf052SLaxman Dewangan 
363201cf052SLaxman Dewangan disable_dev_slp:
3643f7e8275SRhyland Klein 	tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
3653f7e8275SRhyland Klein 				DEVCTRL_DEV_SLP_MASK);
366201cf052SLaxman Dewangan 
367201cf052SLaxman Dewangan err_sleep_init:
368201cf052SLaxman Dewangan 	return ret;
369201cf052SLaxman Dewangan }
370201cf052SLaxman Dewangan 
371cd4209ceSRhyland Klein #ifdef CONFIG_OF
372c0dfbfe2SJingoo Han static const struct of_device_id tps65910_of_match[] = {
373cd4209ceSRhyland Klein 	{ .compatible = "ti,tps65910", .data = (void *)TPS65910},
374cd4209ceSRhyland Klein 	{ .compatible = "ti,tps65911", .data = (void *)TPS65911},
375cd4209ceSRhyland Klein 	{ },
376cd4209ceSRhyland Klein };
377cd4209ceSRhyland Klein MODULE_DEVICE_TABLE(of, tps65910_of_match);
378cd4209ceSRhyland Klein 
379cd4209ceSRhyland Klein static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
38001a0f4aaSLee Jones 						unsigned long *chip_id)
381cd4209ceSRhyland Klein {
382cd4209ceSRhyland Klein 	struct device_node *np = client->dev.of_node;
383cd4209ceSRhyland Klein 	struct tps65910_board *board_info;
384cd4209ceSRhyland Klein 	unsigned int prop;
385cd4209ceSRhyland Klein 	const struct of_device_id *match;
386dae3be36SMarkus Elfring 	int ret;
387cd4209ceSRhyland Klein 
388cd4209ceSRhyland Klein 	match = of_match_device(tps65910_of_match, &client->dev);
389cd4209ceSRhyland Klein 	if (!match) {
390cd4209ceSRhyland Klein 		dev_err(&client->dev, "Failed to find matching dt id\n");
391cd4209ceSRhyland Klein 		return NULL;
392cd4209ceSRhyland Klein 	}
393cd4209ceSRhyland Klein 
39401a0f4aaSLee Jones 	*chip_id  = (unsigned long)match->data;
395cd4209ceSRhyland Klein 
396cd4209ceSRhyland Klein 	board_info = devm_kzalloc(&client->dev, sizeof(*board_info),
397cd4209ceSRhyland Klein 			GFP_KERNEL);
39893e879efSMarkus Elfring 	if (!board_info)
399cd4209ceSRhyland Klein 		return NULL;
400cd4209ceSRhyland Klein 
401cd4209ceSRhyland Klein 	ret = of_property_read_u32(np, "ti,vmbch-threshold", &prop);
402cd4209ceSRhyland Klein 	if (!ret)
403cd4209ceSRhyland Klein 		board_info->vmbch_threshold = prop;
404cd4209ceSRhyland Klein 
405cd4209ceSRhyland Klein 	ret = of_property_read_u32(np, "ti,vmbch2-threshold", &prop);
406cd4209ceSRhyland Klein 	if (!ret)
407cd4209ceSRhyland Klein 		board_info->vmbch2_threshold = prop;
408cd4209ceSRhyland Klein 
409bcc1dd4cSJohan Hovold 	prop = of_property_read_bool(np, "ti,en-ck32k-xtal");
410bcc1dd4cSJohan Hovold 	board_info->en_ck32k_xtal = prop;
411bcc1dd4cSJohan Hovold 
412a9bc67deSMichał Mirosław 	prop = of_property_read_bool(np, "ti,sleep-enable");
413a9bc67deSMichał Mirosław 	board_info->en_dev_slp = prop;
414a9bc67deSMichał Mirosław 
415a9bc67deSMichał Mirosław 	prop = of_property_read_bool(np, "ti,sleep-keep-therm");
416a9bc67deSMichał Mirosław 	board_info->slp_keepon.therm_keepon = prop;
417a9bc67deSMichał Mirosław 
418a9bc67deSMichał Mirosław 	prop = of_property_read_bool(np, "ti,sleep-keep-ck32k");
419a9bc67deSMichał Mirosław 	board_info->slp_keepon.clkout32k_keepon = prop;
420a9bc67deSMichał Mirosław 
421a9bc67deSMichał Mirosław 	prop = of_property_read_bool(np, "ti,sleep-keep-hsclk");
422a9bc67deSMichał Mirosław 	board_info->slp_keepon.i2chs_keepon = prop;
423a9bc67deSMichał Mirosław 
424cd4209ceSRhyland Klein 	board_info->irq = client->irq;
425cd4209ceSRhyland Klein 	board_info->irq_base = -1;
426b079fa72SBill Huang 	board_info->pm_off = of_property_read_bool(np,
427b079fa72SBill Huang 			"ti,system-power-controller");
428cd4209ceSRhyland Klein 
429cd4209ceSRhyland Klein 	return board_info;
430cd4209ceSRhyland Klein }
431cd4209ceSRhyland Klein #else
4327f65f74cSSamuel Ortiz static inline
4337f65f74cSSamuel Ortiz struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
43401a0f4aaSLee Jones 					 unsigned long *chip_id)
435cd4209ceSRhyland Klein {
436cd4209ceSRhyland Klein 	return NULL;
437cd4209ceSRhyland Klein }
438cd4209ceSRhyland Klein #endif
439201cf052SLaxman Dewangan 
440b079fa72SBill Huang static struct i2c_client *tps65910_i2c_client;
441b079fa72SBill Huang static void tps65910_power_off(void)
442b079fa72SBill Huang {
443b079fa72SBill Huang 	struct tps65910 *tps65910;
444b079fa72SBill Huang 
445b079fa72SBill Huang 	tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev);
446b079fa72SBill Huang 
447b079fa72SBill Huang 	if (tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
448b079fa72SBill Huang 			DEVCTRL_PWR_OFF_MASK) < 0)
449b079fa72SBill Huang 		return;
450b079fa72SBill Huang 
451b079fa72SBill Huang 	tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
452b079fa72SBill Huang 			DEVCTRL_DEV_ON_MASK);
453b079fa72SBill Huang }
454b079fa72SBill Huang 
455f791be49SBill Pemberton static int tps65910_i2c_probe(struct i2c_client *i2c,
45627c6750eSGraeme Gregory 			      const struct i2c_device_id *id)
45727c6750eSGraeme Gregory {
45827c6750eSGraeme Gregory 	struct tps65910 *tps65910;
4592537df72SGraeme Gregory 	struct tps65910_board *pmic_plat_data;
460cb8d8654SLaxman Dewangan 	struct tps65910_board *of_pmic_plat_data = NULL;
461e3471bdcSGraeme Gregory 	struct tps65910_platform_data *init_data;
46201a0f4aaSLee Jones 	unsigned long chip_id = id->driver_data;
463dae3be36SMarkus Elfring 	int ret;
46427c6750eSGraeme Gregory 
4652537df72SGraeme Gregory 	pmic_plat_data = dev_get_platdata(&i2c->dev);
466cd4209ceSRhyland Klein 
467cb8d8654SLaxman Dewangan 	if (!pmic_plat_data && i2c->dev.of_node) {
468cd4209ceSRhyland Klein 		pmic_plat_data = tps65910_parse_dt(i2c, &chip_id);
469cb8d8654SLaxman Dewangan 		of_pmic_plat_data = pmic_plat_data;
470cb8d8654SLaxman Dewangan 	}
471cd4209ceSRhyland Klein 
4722537df72SGraeme Gregory 	if (!pmic_plat_data)
4732537df72SGraeme Gregory 		return -EINVAL;
4742537df72SGraeme Gregory 
47563fe7deeSLaxman Dewangan 	init_data = devm_kzalloc(&i2c->dev, sizeof(*init_data), GFP_KERNEL);
476e3471bdcSGraeme Gregory 	if (init_data == NULL)
477e3471bdcSGraeme Gregory 		return -ENOMEM;
478e3471bdcSGraeme Gregory 
47963fe7deeSLaxman Dewangan 	tps65910 = devm_kzalloc(&i2c->dev, sizeof(*tps65910), GFP_KERNEL);
48063fe7deeSLaxman Dewangan 	if (tps65910 == NULL)
48127c6750eSGraeme Gregory 		return -ENOMEM;
48227c6750eSGraeme Gregory 
483cb8d8654SLaxman Dewangan 	tps65910->of_plat_data = of_pmic_plat_data;
48427c6750eSGraeme Gregory 	i2c_set_clientdata(i2c, tps65910);
48527c6750eSGraeme Gregory 	tps65910->dev = &i2c->dev;
48627c6750eSGraeme Gregory 	tps65910->i2c_client = i2c;
487cd4209ceSRhyland Klein 	tps65910->id = chip_id;
48827c6750eSGraeme Gregory 
489be1c7700SArnout Vandecappelle (Essensium/Mind) 	/* Work around silicon erratum SWCZ010: the tps65910 may miss the
490be1c7700SArnout Vandecappelle (Essensium/Mind) 	 * first I2C transfer. So issue a dummy transfer before the first
491be1c7700SArnout Vandecappelle (Essensium/Mind) 	 * real transfer.
492be1c7700SArnout Vandecappelle (Essensium/Mind) 	 */
493be1c7700SArnout Vandecappelle (Essensium/Mind) 	i2c_master_send(i2c, "", 1);
49463fe7deeSLaxman Dewangan 	tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config);
495dc9913a0SLaxman Dewangan 	if (IS_ERR(tps65910->regmap)) {
496dc9913a0SLaxman Dewangan 		ret = PTR_ERR(tps65910->regmap);
497dc9913a0SLaxman Dewangan 		dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret);
49863fe7deeSLaxman Dewangan 		return ret;
499dc9913a0SLaxman Dewangan 	}
500dc9913a0SLaxman Dewangan 
501b1224cd1SJesper Juhl 	init_data->irq = pmic_plat_data->irq;
5021773140fSLaxman Dewangan 	init_data->irq_base = pmic_plat_data->irq_base;
503b1224cd1SJesper Juhl 
5041e351a95SAfzal Mohammed 	tps65910_irq_init(tps65910, init_data->irq, init_data);
505d02e83cbSJohan Hovold 	tps65910_ck32k_init(tps65910, pmic_plat_data);
506201cf052SLaxman Dewangan 	tps65910_sleepinit(tps65910, pmic_plat_data);
507201cf052SLaxman Dewangan 
508b079fa72SBill Huang 	if (pmic_plat_data->pm_off && !pm_power_off) {
509b079fa72SBill Huang 		tps65910_i2c_client = i2c;
510b079fa72SBill Huang 		pm_power_off = tps65910_power_off;
511b079fa72SBill Huang 	}
512b079fa72SBill Huang 
513f3466e77SLaxman Dewangan 	ret = devm_mfd_add_devices(tps65910->dev, -1,
51410ecb80eSLaxman Dewangan 				   tps65910s, ARRAY_SIZE(tps65910s),
51517143e38SLaxman Dewangan 				   NULL, 0,
51617143e38SLaxman Dewangan 				   regmap_irq_get_domain(tps65910->irq_data));
51710ecb80eSLaxman Dewangan 	if (ret < 0) {
51810ecb80eSLaxman Dewangan 		dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret);
51910ecb80eSLaxman Dewangan 		return ret;
52010ecb80eSLaxman Dewangan 	}
52110ecb80eSLaxman Dewangan 
52227c6750eSGraeme Gregory 	return ret;
52327c6750eSGraeme Gregory }
52427c6750eSGraeme Gregory 
52527c6750eSGraeme Gregory static const struct i2c_device_id tps65910_i2c_id[] = {
52679557056SJorge Eduardo Candelaria        { "tps65910", TPS65910 },
52779557056SJorge Eduardo Candelaria        { "tps65911", TPS65911 },
52827c6750eSGraeme Gregory        { }
52927c6750eSGraeme Gregory };
53027c6750eSGraeme Gregory MODULE_DEVICE_TABLE(i2c, tps65910_i2c_id);
53127c6750eSGraeme Gregory 
53227c6750eSGraeme Gregory 
53327c6750eSGraeme Gregory static struct i2c_driver tps65910_i2c_driver = {
53427c6750eSGraeme Gregory 	.driver = {
53527c6750eSGraeme Gregory 		   .name = "tps65910",
536cd4209ceSRhyland Klein 		   .of_match_table = of_match_ptr(tps65910_of_match),
53727c6750eSGraeme Gregory 	},
53827c6750eSGraeme Gregory 	.probe = tps65910_i2c_probe,
53927c6750eSGraeme Gregory 	.id_table = tps65910_i2c_id,
54027c6750eSGraeme Gregory };
54127c6750eSGraeme Gregory 
54227c6750eSGraeme Gregory static int __init tps65910_i2c_init(void)
54327c6750eSGraeme Gregory {
54427c6750eSGraeme Gregory 	return i2c_add_driver(&tps65910_i2c_driver);
54527c6750eSGraeme Gregory }
54627c6750eSGraeme Gregory /* init early so consumer devices can complete system boot */
54727c6750eSGraeme Gregory subsys_initcall(tps65910_i2c_init);
54827c6750eSGraeme Gregory 
54927c6750eSGraeme Gregory static void __exit tps65910_i2c_exit(void)
55027c6750eSGraeme Gregory {
55127c6750eSGraeme Gregory 	i2c_del_driver(&tps65910_i2c_driver);
55227c6750eSGraeme Gregory }
55327c6750eSGraeme Gregory module_exit(tps65910_i2c_exit);
55427c6750eSGraeme Gregory 
55527c6750eSGraeme Gregory MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
55627c6750eSGraeme Gregory MODULE_AUTHOR("Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>");
55727c6750eSGraeme Gregory MODULE_DESCRIPTION("TPS6591x chip family multi-function driver");
55827c6750eSGraeme Gregory MODULE_LICENSE("GPL");
559