1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Driver for TPS65214/TPS65215/TPS65219 Power Management Integrated Chips 4 // 5 // Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ 6 // Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 7 8 #include <linux/i2c.h> 9 #include <linux/reboot.h> 10 #include <linux/regmap.h> 11 12 #include <linux/mfd/core.h> 13 #include <linux/mfd/tps65219.h> 14 15 static int tps65219_warm_reset(struct tps65219 *tps) 16 { 17 return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL, 18 TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK, 19 TPS65219_MFP_WARM_RESET_I2C_CTRL_MASK); 20 } 21 22 static int tps65219_cold_reset(struct tps65219 *tps) 23 { 24 return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL, 25 TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK, 26 TPS65219_MFP_COLD_RESET_I2C_CTRL_MASK); 27 } 28 29 static int tps65219_soft_shutdown(struct tps65219 *tps) 30 { 31 return regmap_update_bits(tps->regmap, TPS65219_REG_MFP_CTRL, 32 TPS65219_MFP_I2C_OFF_REQ_MASK, 33 TPS65219_MFP_I2C_OFF_REQ_MASK); 34 } 35 36 static int tps65219_power_off_handler(struct sys_off_data *data) 37 { 38 tps65219_soft_shutdown(data->cb_data); 39 return NOTIFY_DONE; 40 } 41 42 static int tps65219_restart(struct tps65219 *tps, unsigned long reboot_mode) 43 { 44 if (reboot_mode == REBOOT_WARM) 45 tps65219_warm_reset(tps); 46 else 47 tps65219_cold_reset(tps); 48 49 return NOTIFY_DONE; 50 } 51 52 static int tps65219_restart_handler(struct sys_off_data *data) 53 { 54 tps65219_restart(data->cb_data, data->mode); 55 return NOTIFY_DONE; 56 } 57 58 static const struct resource tps65219_pwrbutton_resources[] = { 59 DEFINE_RES_IRQ_NAMED(TPS65219_INT_PB_FALLING_EDGE_DETECT, "falling"), 60 DEFINE_RES_IRQ_NAMED(TPS65219_INT_PB_RISING_EDGE_DETECT, "rising"), 61 }; 62 63 static const struct resource tps65214_regulator_resources[] = { 64 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_SCG, "LDO1_SCG"), 65 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_OC, "LDO1_OC"), 66 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_UV, "LDO1_UV"), 67 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_SCG, "LDO2_SCG"), 68 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_OC, "LDO2_OC"), 69 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_UV, "LDO2_UV"), 70 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_SCG, "BUCK3_SCG"), 71 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_OC, "BUCK3_OC"), 72 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_NEG_OC, "BUCK3_NEG_OC"), 73 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_UV, "BUCK3_UV"), 74 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_SCG, "BUCK1_SCG"), 75 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_OC, "BUCK1_OC"), 76 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_NEG_OC, "BUCK1_NEG_OC"), 77 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_UV, "BUCK1_UV"), 78 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_SCG, "BUCK2_SCG"), 79 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_OC, "BUCK2_OC"), 80 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_NEG_OC, "BUCK2_NEG_OC"), 81 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_UV, "BUCK2_UV"), 82 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV, "BUCK1_RV"), 83 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV, "BUCK2_RV"), 84 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV, "BUCK3_RV"), 85 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV, "LDO1_RV"), 86 DEFINE_RES_IRQ_NAMED(TPS65214_INT_LDO2_RV, "LDO2_RV"), 87 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV_SD, "BUCK1_RV_SD"), 88 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV_SD, "BUCK2_RV_SD"), 89 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV_SD, "BUCK3_RV_SD"), 90 DEFINE_RES_IRQ_NAMED(TPS65214_INT_LDO1_RV_SD, "LDO1_RV_SD"), 91 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV_SD, "LDO2_RV_SD"), 92 DEFINE_RES_IRQ_NAMED(TPS65219_INT_TIMEOUT, "TIMEOUT"), 93 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_WARM, "SENSOR_2_WARM"), 94 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_WARM, "SENSOR_1_WARM"), 95 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_WARM, "SENSOR_0_WARM"), 96 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_HOT, "SENSOR_2_HOT"), 97 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_HOT, "SENSOR_1_HOT"), 98 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_HOT, "SENSOR_0_HOT"), 99 }; 100 101 static const struct resource tps65215_regulator_resources[] = { 102 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO1_SCG, "LDO1_SCG"), 103 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO1_OC, "LDO1_OC"), 104 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO1_UV, "LDO1_UV"), 105 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO2_SCG, "LDO2_SCG"), 106 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO2_OC, "LDO2_OC"), 107 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO2_UV, "LDO2_UV"), 108 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_SCG, "BUCK3_SCG"), 109 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_OC, "BUCK3_OC"), 110 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_NEG_OC, "BUCK3_NEG_OC"), 111 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_UV, "BUCK3_UV"), 112 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_SCG, "BUCK1_SCG"), 113 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_OC, "BUCK1_OC"), 114 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_NEG_OC, "BUCK1_NEG_OC"), 115 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_UV, "BUCK1_UV"), 116 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_SCG, "BUCK2_SCG"), 117 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_OC, "BUCK2_OC"), 118 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_NEG_OC, "BUCK2_NEG_OC"), 119 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_UV, "BUCK2_UV"), 120 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV, "BUCK1_RV"), 121 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV, "BUCK2_RV"), 122 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV, "BUCK3_RV"), 123 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV, "LDO1_RV"), 124 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO2_RV, "LDO2_RV"), 125 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV_SD, "BUCK1_RV_SD"), 126 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV_SD, "BUCK2_RV_SD"), 127 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV_SD, "BUCK3_RV_SD"), 128 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV_SD, "LDO1_RV_SD"), 129 DEFINE_RES_IRQ_NAMED(TPS65215_INT_LDO2_RV_SD, "LDO2_RV_SD"), 130 DEFINE_RES_IRQ_NAMED(TPS65219_INT_TIMEOUT, "TIMEOUT"), 131 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_WARM, "SENSOR_3_WARM"), 132 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_WARM, "SENSOR_2_WARM"), 133 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_WARM, "SENSOR_1_WARM"), 134 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_WARM, "SENSOR_0_WARM"), 135 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_HOT, "SENSOR_3_HOT"), 136 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_HOT, "SENSOR_2_HOT"), 137 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_HOT, "SENSOR_1_HOT"), 138 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_HOT, "SENSOR_0_HOT"), 139 }; 140 141 static const struct resource tps65219_regulator_resources[] = { 142 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_SCG, "LDO3_SCG"), 143 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_OC, "LDO3_OC"), 144 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_UV, "LDO3_UV"), 145 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_SCG, "LDO4_SCG"), 146 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_OC, "LDO4_OC"), 147 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_UV, "LDO4_UV"), 148 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_SCG, "LDO1_SCG"), 149 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_OC, "LDO1_OC"), 150 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_UV, "LDO1_UV"), 151 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_SCG, "LDO2_SCG"), 152 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_OC, "LDO2_OC"), 153 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_UV, "LDO2_UV"), 154 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_SCG, "BUCK3_SCG"), 155 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_OC, "BUCK3_OC"), 156 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_NEG_OC, "BUCK3_NEG_OC"), 157 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_UV, "BUCK3_UV"), 158 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_SCG, "BUCK1_SCG"), 159 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_OC, "BUCK1_OC"), 160 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_NEG_OC, "BUCK1_NEG_OC"), 161 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_UV, "BUCK1_UV"), 162 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_SCG, "BUCK2_SCG"), 163 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_OC, "BUCK2_OC"), 164 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_NEG_OC, "BUCK2_NEG_OC"), 165 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_UV, "BUCK2_UV"), 166 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV, "BUCK1_RV"), 167 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV, "BUCK2_RV"), 168 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV, "BUCK3_RV"), 169 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV, "LDO1_RV"), 170 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV, "LDO2_RV"), 171 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_RV, "LDO3_RV"), 172 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_RV, "LDO4_RV"), 173 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK1_RV_SD, "BUCK1_RV_SD"), 174 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK2_RV_SD, "BUCK2_RV_SD"), 175 DEFINE_RES_IRQ_NAMED(TPS65219_INT_BUCK3_RV_SD, "BUCK3_RV_SD"), 176 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO1_RV_SD, "LDO1_RV_SD"), 177 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO2_RV_SD, "LDO2_RV_SD"), 178 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO3_RV_SD, "LDO3_RV_SD"), 179 DEFINE_RES_IRQ_NAMED(TPS65219_INT_LDO4_RV_SD, "LDO4_RV_SD"), 180 DEFINE_RES_IRQ_NAMED(TPS65219_INT_TIMEOUT, "TIMEOUT"), 181 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_WARM, "SENSOR_3_WARM"), 182 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_WARM, "SENSOR_2_WARM"), 183 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_WARM, "SENSOR_1_WARM"), 184 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_WARM, "SENSOR_0_WARM"), 185 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_3_HOT, "SENSOR_3_HOT"), 186 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_2_HOT, "SENSOR_2_HOT"), 187 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_1_HOT, "SENSOR_1_HOT"), 188 DEFINE_RES_IRQ_NAMED(TPS65219_INT_SENSOR_0_HOT, "SENSOR_0_HOT"), 189 }; 190 191 static const struct mfd_cell tps65214_cells[] = { 192 MFD_CELL_RES("tps65214-regulator", tps65214_regulator_resources), 193 MFD_CELL_NAME("tps65215-gpio"), 194 }; 195 196 static const struct mfd_cell tps65215_cells[] = { 197 MFD_CELL_RES("tps65215-regulator", tps65215_regulator_resources), 198 MFD_CELL_NAME("tps65215-gpio"), 199 }; 200 201 static const struct mfd_cell tps65219_cells[] = { 202 MFD_CELL_RES("tps65219-regulator", tps65219_regulator_resources), 203 MFD_CELL_NAME("tps65219-gpio"), 204 }; 205 206 static const struct mfd_cell tps65219_pwrbutton_cell = 207 MFD_CELL_RES("tps65219-pwrbutton", tps65219_pwrbutton_resources); 208 209 static const struct regmap_config tps65219_regmap_config = { 210 .reg_bits = 8, 211 .val_bits = 8, 212 .max_register = TPS65219_REG_FACTORY_CONFIG_2, 213 }; 214 215 /* 216 * Mapping of main IRQ register bits to sub-IRQ register offsets so that we can 217 * access corect sub-IRQ registers based on bits that are set in main IRQ 218 * register. 219 */ 220 /* Timeout Residual Voltage Shutdown */ 221 static unsigned int bit0_offsets[] = { TPS65219_REG_INT_TO_RV_POS }; 222 static unsigned int bit1_offsets[] = { TPS65219_REG_INT_RV_POS }; /* Residual Voltage */ 223 static unsigned int bit2_offsets[] = { TPS65219_REG_INT_SYS_POS }; /* System */ 224 static unsigned int bit3_offsets[] = { TPS65219_REG_INT_BUCK_1_2_POS }; /* Buck 1-2 */ 225 static unsigned int bit4_offsets[] = { TPS65219_REG_INT_BUCK_3_POS }; /* Buck 3 */ 226 static unsigned int bit5_offsets[] = { TPS65219_REG_INT_LDO_1_2_POS }; /* LDO 1-2 */ 227 static unsigned int bit6_offsets[] = { TPS65219_REG_INT_LDO_3_4_POS }; /* LDO 3-4 */ 228 static unsigned int tps65215_bit5_offsets[] = { TPS65215_REG_INT_LDO_1_POS }; 229 static unsigned int tps65215_bit6_offsets[] = { TPS65215_REG_INT_LDO_2_POS }; 230 static unsigned int bit7_offsets[] = { TPS65219_REG_INT_PB_POS }; /* Power Button */ 231 232 /* TPS65214 INT_SOURCE bit 6 is 'RESERVED'*/ 233 static unsigned int tps65214_bit0_offsets[] = { TPS65214_REG_INT_TO_RV_POS }; 234 static unsigned int tps65214_bit1_offsets[] = { TPS65214_REG_INT_RV_POS }; 235 static unsigned int tps65214_bit2_offsets[] = { TPS65214_REG_INT_SYS_POS }; 236 static unsigned int tps65214_bit3_offsets[] = { TPS65214_REG_INT_BUCK_1_2_POS }; 237 static unsigned int tps65214_bit4_offsets[] = { TPS65214_REG_INT_BUCK_3_POS }; 238 static unsigned int tps65214_bit5_offsets[] = { TPS65214_REG_INT_LDO_1_2_POS }; 239 static unsigned int tps65214_bit7_offsets[] = { TPS65214_REG_INT_PB_POS }; 240 241 static struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = { 242 REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets), 243 REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets), 244 REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets), 245 REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets), 246 REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets), 247 REGMAP_IRQ_MAIN_REG_OFFSET(bit5_offsets), 248 REGMAP_IRQ_MAIN_REG_OFFSET(bit6_offsets), 249 REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets), 250 }; 251 252 static struct regmap_irq_sub_irq_map tps65215_sub_irq_offsets[] = { 253 REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets), 254 REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets), 255 REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets), 256 REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets), 257 REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets), 258 REGMAP_IRQ_MAIN_REG_OFFSET(tps65215_bit5_offsets), 259 REGMAP_IRQ_MAIN_REG_OFFSET(tps65215_bit6_offsets), 260 REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets), 261 }; 262 263 static struct regmap_irq_sub_irq_map tps65214_sub_irq_offsets[] = { 264 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit0_offsets), 265 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit1_offsets), 266 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit2_offsets), 267 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit3_offsets), 268 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit4_offsets), 269 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit5_offsets), 270 REGMAP_IRQ_MAIN_REG_OFFSET(tps65214_bit7_offsets), 271 }; 272 273 #define TPS65219_REGMAP_IRQ_REG(int_name, register_position) \ 274 REGMAP_IRQ_REG(int_name, register_position, int_name##_MASK) 275 276 static const struct regmap_irq tps65214_irqs[] = { 277 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_SCG, TPS65214_REG_INT_LDO_1_2_POS), 278 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_OC, TPS65214_REG_INT_LDO_1_2_POS), 279 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_UV, TPS65214_REG_INT_LDO_1_2_POS), 280 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_SCG, TPS65214_REG_INT_LDO_1_2_POS), 281 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_OC, TPS65214_REG_INT_LDO_1_2_POS), 282 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_UV, TPS65214_REG_INT_LDO_1_2_POS), 283 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_SCG, TPS65214_REG_INT_BUCK_3_POS), 284 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_OC, TPS65214_REG_INT_BUCK_3_POS), 285 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_NEG_OC, TPS65214_REG_INT_BUCK_3_POS), 286 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_UV, TPS65214_REG_INT_BUCK_3_POS), 287 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_SCG, TPS65214_REG_INT_BUCK_1_2_POS), 288 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_OC, TPS65214_REG_INT_BUCK_1_2_POS), 289 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_NEG_OC, TPS65214_REG_INT_BUCK_1_2_POS), 290 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_UV, TPS65214_REG_INT_BUCK_1_2_POS), 291 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_SCG, TPS65214_REG_INT_BUCK_1_2_POS), 292 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_OC, TPS65214_REG_INT_BUCK_1_2_POS), 293 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_NEG_OC, TPS65214_REG_INT_BUCK_1_2_POS), 294 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_UV, TPS65214_REG_INT_BUCK_1_2_POS), 295 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_WARM, TPS65214_REG_INT_SYS_POS), 296 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_WARM, TPS65214_REG_INT_SYS_POS), 297 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_WARM, TPS65214_REG_INT_SYS_POS), 298 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_HOT, TPS65214_REG_INT_SYS_POS), 299 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_HOT, TPS65214_REG_INT_SYS_POS), 300 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_HOT, TPS65214_REG_INT_SYS_POS), 301 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV, TPS65214_REG_INT_RV_POS), 302 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV, TPS65214_REG_INT_RV_POS), 303 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV, TPS65214_REG_INT_RV_POS), 304 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV, TPS65214_REG_INT_RV_POS), 305 TPS65219_REGMAP_IRQ_REG(TPS65214_INT_LDO2_RV, TPS65214_REG_INT_RV_POS), 306 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV_SD, TPS65214_REG_INT_TO_RV_POS), 307 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV_SD, TPS65214_REG_INT_TO_RV_POS), 308 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV_SD, TPS65214_REG_INT_TO_RV_POS), 309 TPS65219_REGMAP_IRQ_REG(TPS65214_INT_LDO1_RV_SD, TPS65214_REG_INT_TO_RV_POS), 310 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV_SD, TPS65214_REG_INT_TO_RV_POS), 311 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_TIMEOUT, TPS65214_REG_INT_TO_RV_POS), 312 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_FALLING_EDGE_DETECT, TPS65214_REG_INT_PB_POS), 313 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_RISING_EDGE_DETECT, TPS65214_REG_INT_PB_POS), 314 }; 315 316 static const struct regmap_irq tps65215_irqs[] = { 317 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO1_SCG, TPS65215_REG_INT_LDO_1_POS), 318 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO1_OC, TPS65215_REG_INT_LDO_1_POS), 319 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO1_UV, TPS65215_REG_INT_LDO_1_POS), 320 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO2_SCG, TPS65215_REG_INT_LDO_2_POS), 321 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO2_OC, TPS65215_REG_INT_LDO_2_POS), 322 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO2_UV, TPS65215_REG_INT_LDO_2_POS), 323 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_SCG, TPS65219_REG_INT_BUCK_3_POS), 324 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_OC, TPS65219_REG_INT_BUCK_3_POS), 325 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_NEG_OC, TPS65219_REG_INT_BUCK_3_POS), 326 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_UV, TPS65219_REG_INT_BUCK_3_POS), 327 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_SCG, TPS65219_REG_INT_BUCK_1_2_POS), 328 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_OC, TPS65219_REG_INT_BUCK_1_2_POS), 329 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS), 330 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_UV, TPS65219_REG_INT_BUCK_1_2_POS), 331 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_SCG, TPS65219_REG_INT_BUCK_1_2_POS), 332 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_OC, TPS65219_REG_INT_BUCK_1_2_POS), 333 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS), 334 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_UV, TPS65219_REG_INT_BUCK_1_2_POS), 335 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_WARM, TPS65219_REG_INT_SYS_POS), 336 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_WARM, TPS65219_REG_INT_SYS_POS), 337 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_WARM, TPS65219_REG_INT_SYS_POS), 338 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_WARM, TPS65219_REG_INT_SYS_POS), 339 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_HOT, TPS65219_REG_INT_SYS_POS), 340 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_HOT, TPS65219_REG_INT_SYS_POS), 341 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_HOT, TPS65219_REG_INT_SYS_POS), 342 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_HOT, TPS65219_REG_INT_SYS_POS), 343 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV, TPS65219_REG_INT_RV_POS), 344 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV, TPS65219_REG_INT_RV_POS), 345 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV, TPS65219_REG_INT_RV_POS), 346 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV, TPS65219_REG_INT_RV_POS), 347 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO2_RV, TPS65219_REG_INT_RV_POS), 348 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV_SD, TPS65219_REG_INT_TO_RV_POS), 349 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV_SD, TPS65219_REG_INT_TO_RV_POS), 350 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV_SD, TPS65219_REG_INT_TO_RV_POS), 351 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV_SD, TPS65219_REG_INT_TO_RV_POS), 352 TPS65219_REGMAP_IRQ_REG(TPS65215_INT_LDO2_RV_SD, TPS65219_REG_INT_TO_RV_POS), 353 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_TIMEOUT, TPS65219_REG_INT_TO_RV_POS), 354 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_FALLING_EDGE_DETECT, TPS65219_REG_INT_PB_POS), 355 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_RISING_EDGE_DETECT, TPS65219_REG_INT_PB_POS), 356 }; 357 358 static const struct regmap_irq tps65219_irqs[] = { 359 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_SCG, TPS65219_REG_INT_LDO_3_4_POS), 360 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_OC, TPS65219_REG_INT_LDO_3_4_POS), 361 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_UV, TPS65219_REG_INT_LDO_3_4_POS), 362 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_SCG, TPS65219_REG_INT_LDO_3_4_POS), 363 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_OC, TPS65219_REG_INT_LDO_3_4_POS), 364 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_UV, TPS65219_REG_INT_LDO_3_4_POS), 365 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_SCG, TPS65219_REG_INT_LDO_1_2_POS), 366 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_OC, TPS65219_REG_INT_LDO_1_2_POS), 367 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_UV, TPS65219_REG_INT_LDO_1_2_POS), 368 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_SCG, TPS65219_REG_INT_LDO_1_2_POS), 369 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_OC, TPS65219_REG_INT_LDO_1_2_POS), 370 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_UV, TPS65219_REG_INT_LDO_1_2_POS), 371 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_SCG, TPS65219_REG_INT_BUCK_3_POS), 372 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_OC, TPS65219_REG_INT_BUCK_3_POS), 373 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_NEG_OC, TPS65219_REG_INT_BUCK_3_POS), 374 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_UV, TPS65219_REG_INT_BUCK_3_POS), 375 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_SCG, TPS65219_REG_INT_BUCK_1_2_POS), 376 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_OC, TPS65219_REG_INT_BUCK_1_2_POS), 377 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS), 378 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_UV, TPS65219_REG_INT_BUCK_1_2_POS), 379 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_SCG, TPS65219_REG_INT_BUCK_1_2_POS), 380 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_OC, TPS65219_REG_INT_BUCK_1_2_POS), 381 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_NEG_OC, TPS65219_REG_INT_BUCK_1_2_POS), 382 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_UV, TPS65219_REG_INT_BUCK_1_2_POS), 383 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_WARM, TPS65219_REG_INT_SYS_POS), 384 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_WARM, TPS65219_REG_INT_SYS_POS), 385 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_WARM, TPS65219_REG_INT_SYS_POS), 386 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_WARM, TPS65219_REG_INT_SYS_POS), 387 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_3_HOT, TPS65219_REG_INT_SYS_POS), 388 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_2_HOT, TPS65219_REG_INT_SYS_POS), 389 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_1_HOT, TPS65219_REG_INT_SYS_POS), 390 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_SENSOR_0_HOT, TPS65219_REG_INT_SYS_POS), 391 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV, TPS65219_REG_INT_RV_POS), 392 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV, TPS65219_REG_INT_RV_POS), 393 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV, TPS65219_REG_INT_RV_POS), 394 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV, TPS65219_REG_INT_RV_POS), 395 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV, TPS65219_REG_INT_RV_POS), 396 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_RV, TPS65219_REG_INT_RV_POS), 397 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_RV, TPS65219_REG_INT_RV_POS), 398 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK1_RV_SD, TPS65219_REG_INT_TO_RV_POS), 399 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK2_RV_SD, TPS65219_REG_INT_TO_RV_POS), 400 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_BUCK3_RV_SD, TPS65219_REG_INT_TO_RV_POS), 401 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO1_RV_SD, TPS65219_REG_INT_TO_RV_POS), 402 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO2_RV_SD, TPS65219_REG_INT_TO_RV_POS), 403 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_RV_SD, TPS65219_REG_INT_TO_RV_POS), 404 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO4_RV_SD, TPS65219_REG_INT_TO_RV_POS), 405 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_TIMEOUT, TPS65219_REG_INT_TO_RV_POS), 406 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_FALLING_EDGE_DETECT, TPS65219_REG_INT_PB_POS), 407 TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_RISING_EDGE_DETECT, TPS65219_REG_INT_PB_POS), 408 }; 409 410 static const struct regmap_irq_chip tps65214_irq_chip = { 411 .name = "tps65214_irq", 412 .main_status = TPS65219_REG_INT_SOURCE, 413 .num_main_regs = 1, 414 .num_main_status_bits = 8, 415 .irqs = tps65214_irqs, 416 .num_irqs = ARRAY_SIZE(tps65214_irqs), 417 .status_base = TPS65214_REG_INT_LDO_1_2, 418 .ack_base = TPS65214_REG_INT_LDO_1_2, 419 .clear_ack = 1, 420 .num_regs = 8, 421 .sub_reg_offsets = tps65214_sub_irq_offsets, 422 }; 423 424 static const struct regmap_irq_chip tps65215_irq_chip = { 425 .name = "tps65215_irq", 426 .main_status = TPS65219_REG_INT_SOURCE, 427 .num_main_regs = 1, 428 .num_main_status_bits = 8, 429 .irqs = tps65215_irqs, 430 .num_irqs = ARRAY_SIZE(tps65215_irqs), 431 .status_base = TPS65215_REG_INT_LDO_2, 432 .ack_base = TPS65215_REG_INT_LDO_2, 433 .clear_ack = 1, 434 .num_regs = 8, 435 .sub_reg_offsets = tps65215_sub_irq_offsets, 436 }; 437 438 static const struct regmap_irq_chip tps65219_irq_chip = { 439 .name = "tps65219_irq", 440 .main_status = TPS65219_REG_INT_SOURCE, 441 .num_main_regs = 1, 442 .num_main_status_bits = 8, 443 .irqs = tps65219_irqs, 444 .num_irqs = ARRAY_SIZE(tps65219_irqs), 445 .status_base = TPS65219_REG_INT_LDO_3_4, 446 .ack_base = TPS65219_REG_INT_LDO_3_4, 447 .clear_ack = 1, 448 .num_regs = 8, 449 .sub_reg_offsets = tps65219_sub_irq_offsets, 450 }; 451 452 struct tps65219_chip_data { 453 const struct regmap_irq_chip *irq_chip; 454 const struct mfd_cell *cells; 455 int n_cells; 456 }; 457 458 static struct tps65219_chip_data chip_info_table[] = { 459 [TPS65214] = { 460 .irq_chip = &tps65214_irq_chip, 461 .cells = tps65214_cells, 462 .n_cells = ARRAY_SIZE(tps65214_cells), 463 }, 464 [TPS65215] = { 465 .irq_chip = &tps65215_irq_chip, 466 .cells = tps65215_cells, 467 .n_cells = ARRAY_SIZE(tps65215_cells), 468 }, 469 [TPS65219] = { 470 .irq_chip = &tps65219_irq_chip, 471 .cells = tps65219_cells, 472 .n_cells = ARRAY_SIZE(tps65219_cells), 473 }, 474 }; 475 476 static int tps65219_probe(struct i2c_client *client) 477 { 478 struct tps65219 *tps; 479 struct tps65219_chip_data *pmic; 480 bool pwr_button; 481 int ret; 482 483 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); 484 if (!tps) 485 return -ENOMEM; 486 487 i2c_set_clientdata(client, tps); 488 489 tps->dev = &client->dev; 490 tps->chip_id = (uintptr_t)i2c_get_match_data(client); 491 pmic = &chip_info_table[tps->chip_id]; 492 493 tps->regmap = devm_regmap_init_i2c(client, &tps65219_regmap_config); 494 if (IS_ERR(tps->regmap)) { 495 ret = PTR_ERR(tps->regmap); 496 dev_err(tps->dev, "Failed to allocate register map: %d\n", ret); 497 return ret; 498 } 499 500 ret = devm_regmap_add_irq_chip(tps->dev, tps->regmap, client->irq, 501 IRQF_ONESHOT, 0, pmic->irq_chip, 502 &tps->irq_data); 503 if (ret) 504 return ret; 505 506 ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, 507 pmic->cells, pmic->n_cells, 508 NULL, 0, regmap_irq_get_domain(tps->irq_data)); 509 if (ret) { 510 dev_err(tps->dev, "Failed to add child devices: %d\n", ret); 511 return ret; 512 } 513 514 pwr_button = of_property_read_bool(tps->dev->of_node, "ti,power-button"); 515 if (pwr_button) { 516 ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, 517 &tps65219_pwrbutton_cell, 1, NULL, 0, 518 regmap_irq_get_domain(tps->irq_data)); 519 if (ret) { 520 dev_err(tps->dev, "Failed to add power-button: %d\n", ret); 521 return ret; 522 } 523 } 524 525 ret = devm_register_restart_handler(tps->dev, 526 tps65219_restart_handler, 527 tps); 528 529 if (ret) { 530 dev_err(tps->dev, "cannot register restart handler, %d\n", ret); 531 return ret; 532 } 533 534 ret = devm_register_power_off_handler(tps->dev, 535 tps65219_power_off_handler, 536 tps); 537 if (ret) { 538 dev_err(tps->dev, "failed to register power-off handler: %d\n", ret); 539 return ret; 540 } 541 return 0; 542 } 543 544 static const struct of_device_id of_tps65219_match_table[] = { 545 { .compatible = "ti,tps65214", .data = (void *)TPS65214, }, 546 { .compatible = "ti,tps65215", .data = (void *)TPS65215, }, 547 { .compatible = "ti,tps65219", .data = (void *)TPS65219, }, 548 {} 549 }; 550 MODULE_DEVICE_TABLE(of, of_tps65219_match_table); 551 552 static struct i2c_driver tps65219_driver = { 553 .driver = { 554 .name = "tps65219", 555 .of_match_table = of_tps65219_match_table, 556 }, 557 .probe = tps65219_probe, 558 }; 559 module_i2c_driver(tps65219_driver); 560 561 MODULE_AUTHOR("Jerome Neanne <jneanne@baylibre.com>"); 562 MODULE_DESCRIPTION("TPS65214/TPS65215/TPS65219 PMIC driver"); 563 MODULE_LICENSE("GPL"); 564