1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) STMicroelectronics 2018 3 // Author: Pascal Paillet <p.paillet@st.com> 4 5 #include <linux/i2c.h> 6 #include <linux/interrupt.h> 7 #include <linux/mfd/core.h> 8 #include <linux/mfd/stpmic1.h> 9 #include <linux/module.h> 10 #include <linux/reboot.h> 11 #include <linux/of.h> 12 #include <linux/of_irq.h> 13 #include <linux/of_platform.h> 14 #include <linux/pm_wakeirq.h> 15 #include <linux/regmap.h> 16 17 #include <dt-bindings/mfd/st,stpmic1.h> 18 19 #define STPMIC1_MAX_RETRIES 2 20 21 #define STPMIC1_MAIN_IRQ 0 22 23 static const struct regmap_range stpmic1_readable_ranges[] = { 24 regmap_reg_range(TURN_ON_SR, VERSION_SR), 25 regmap_reg_range(MAIN_CR, LDO6_STDBY_CR), 26 regmap_reg_range(BST_SW_CR, BST_SW_CR), 27 regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4), 28 regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4), 29 regmap_reg_range(INT_MASK_R1, INT_MASK_R4), 30 regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4), 31 regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4), 32 regmap_reg_range(INT_SRC_R1, INT_SRC_R1), 33 }; 34 35 static const struct regmap_range stpmic1_writeable_ranges[] = { 36 regmap_reg_range(MAIN_CR, LDO6_STDBY_CR), 37 regmap_reg_range(BST_SW_CR, BST_SW_CR), 38 regmap_reg_range(INT_CLEAR_R1, INT_CLEAR_R4), 39 regmap_reg_range(INT_SET_MASK_R1, INT_SET_MASK_R4), 40 regmap_reg_range(INT_CLEAR_MASK_R1, INT_CLEAR_MASK_R4), 41 }; 42 43 static const struct regmap_range stpmic1_volatile_ranges[] = { 44 regmap_reg_range(TURN_ON_SR, VERSION_SR), 45 regmap_reg_range(WCHDG_CR, WCHDG_CR), 46 regmap_reg_range(INT_PENDING_R1, INT_PENDING_R4), 47 regmap_reg_range(INT_SRC_R1, INT_SRC_R4), 48 }; 49 50 static const struct regmap_access_table stpmic1_readable_table = { 51 .yes_ranges = stpmic1_readable_ranges, 52 .n_yes_ranges = ARRAY_SIZE(stpmic1_readable_ranges), 53 }; 54 55 static const struct regmap_access_table stpmic1_writeable_table = { 56 .yes_ranges = stpmic1_writeable_ranges, 57 .n_yes_ranges = ARRAY_SIZE(stpmic1_writeable_ranges), 58 }; 59 60 static const struct regmap_access_table stpmic1_volatile_table = { 61 .yes_ranges = stpmic1_volatile_ranges, 62 .n_yes_ranges = ARRAY_SIZE(stpmic1_volatile_ranges), 63 }; 64 65 static const struct regmap_config stpmic1_regmap_config = { 66 .reg_bits = 8, 67 .val_bits = 8, 68 .cache_type = REGCACHE_MAPLE, 69 .max_register = PMIC_MAX_REGISTER_ADDRESS, 70 .rd_table = &stpmic1_readable_table, 71 .wr_table = &stpmic1_writeable_table, 72 .volatile_table = &stpmic1_volatile_table, 73 }; 74 75 static const struct regmap_irq stpmic1_irqs[] = { 76 REGMAP_IRQ_REG(IT_PONKEY_F, 0, 0x01), 77 REGMAP_IRQ_REG(IT_PONKEY_R, 0, 0x02), 78 REGMAP_IRQ_REG(IT_WAKEUP_F, 0, 0x04), 79 REGMAP_IRQ_REG(IT_WAKEUP_R, 0, 0x08), 80 REGMAP_IRQ_REG(IT_VBUS_OTG_F, 0, 0x10), 81 REGMAP_IRQ_REG(IT_VBUS_OTG_R, 0, 0x20), 82 REGMAP_IRQ_REG(IT_SWOUT_F, 0, 0x40), 83 REGMAP_IRQ_REG(IT_SWOUT_R, 0, 0x80), 84 85 REGMAP_IRQ_REG(IT_CURLIM_BUCK1, 1, 0x01), 86 REGMAP_IRQ_REG(IT_CURLIM_BUCK2, 1, 0x02), 87 REGMAP_IRQ_REG(IT_CURLIM_BUCK3, 1, 0x04), 88 REGMAP_IRQ_REG(IT_CURLIM_BUCK4, 1, 0x08), 89 REGMAP_IRQ_REG(IT_OCP_OTG, 1, 0x10), 90 REGMAP_IRQ_REG(IT_OCP_SWOUT, 1, 0x20), 91 REGMAP_IRQ_REG(IT_OCP_BOOST, 1, 0x40), 92 REGMAP_IRQ_REG(IT_OVP_BOOST, 1, 0x80), 93 94 REGMAP_IRQ_REG(IT_CURLIM_LDO1, 2, 0x01), 95 REGMAP_IRQ_REG(IT_CURLIM_LDO2, 2, 0x02), 96 REGMAP_IRQ_REG(IT_CURLIM_LDO3, 2, 0x04), 97 REGMAP_IRQ_REG(IT_CURLIM_LDO4, 2, 0x08), 98 REGMAP_IRQ_REG(IT_CURLIM_LDO5, 2, 0x10), 99 REGMAP_IRQ_REG(IT_CURLIM_LDO6, 2, 0x20), 100 REGMAP_IRQ_REG(IT_SHORT_SWOTG, 2, 0x40), 101 REGMAP_IRQ_REG(IT_SHORT_SWOUT, 2, 0x80), 102 103 REGMAP_IRQ_REG(IT_TWARN_F, 3, 0x01), 104 REGMAP_IRQ_REG(IT_TWARN_R, 3, 0x02), 105 REGMAP_IRQ_REG(IT_VINLOW_F, 3, 0x04), 106 REGMAP_IRQ_REG(IT_VINLOW_R, 3, 0x08), 107 REGMAP_IRQ_REG(IT_SWIN_F, 3, 0x40), 108 REGMAP_IRQ_REG(IT_SWIN_R, 3, 0x80), 109 }; 110 111 static const struct regmap_irq_chip stpmic1_regmap_irq_chip = { 112 .name = "pmic_irq", 113 .status_base = INT_PENDING_R1, 114 .mask_base = INT_SET_MASK_R1, 115 .unmask_base = INT_CLEAR_MASK_R1, 116 .mask_unmask_non_inverted = true, 117 .ack_base = INT_CLEAR_R1, 118 .num_regs = STPMIC1_PMIC_NUM_IRQ_REGS, 119 .irqs = stpmic1_irqs, 120 .num_irqs = ARRAY_SIZE(stpmic1_irqs), 121 }; 122 123 static int stpmic1_power_off(struct sys_off_data *data) 124 { 125 struct stpmic1 *ddata = data->cb_data; 126 int ret; 127 128 /* 129 * Attempt to shut down again, in case the first attempt failed. 130 * The STPMIC1 might get confused and the first regmap_update_bits() 131 * returns with -ETIMEDOUT / -110 . If that or similar transient 132 * failure occurs, try to shut down again. If the second attempt 133 * fails, there is some bigger problem, report it to user. 134 */ 135 for (int retries = 0; retries < STPMIC1_MAX_RETRIES; retries++) { 136 ret = regmap_update_bits(ddata->regmap, MAIN_CR, SOFTWARE_SWITCH_OFF, 137 SOFTWARE_SWITCH_OFF); 138 if (!ret) 139 return NOTIFY_DONE; 140 } 141 142 dev_err(ddata->dev, "Failed to access PMIC I2C bus (%d)\n", ret); 143 144 return NOTIFY_DONE; 145 } 146 147 static int stpmic1_probe(struct i2c_client *i2c) 148 { 149 struct stpmic1 *ddata; 150 struct device *dev = &i2c->dev; 151 int ret; 152 struct device_node *np = dev->of_node; 153 u32 reg; 154 155 ddata = devm_kzalloc(dev, sizeof(struct stpmic1), GFP_KERNEL); 156 if (!ddata) 157 return -ENOMEM; 158 159 i2c_set_clientdata(i2c, ddata); 160 ddata->dev = dev; 161 162 ddata->regmap = devm_regmap_init_i2c(i2c, &stpmic1_regmap_config); 163 if (IS_ERR(ddata->regmap)) 164 return PTR_ERR(ddata->regmap); 165 166 ddata->irq = of_irq_get(np, STPMIC1_MAIN_IRQ); 167 if (ddata->irq < 0) { 168 dev_err(dev, "Failed to get main IRQ: %d\n", ddata->irq); 169 return ddata->irq; 170 } 171 172 ret = regmap_read(ddata->regmap, VERSION_SR, ®); 173 if (ret) { 174 dev_err(dev, "Unable to read PMIC version\n"); 175 return ret; 176 } 177 dev_info(dev, "PMIC Chip Version: 0x%x\n", reg); 178 179 /* Initialize PMIC IRQ Chip & associated IRQ domains */ 180 ret = devm_regmap_add_irq_chip(dev, ddata->regmap, ddata->irq, 181 IRQF_ONESHOT | IRQF_SHARED, 182 0, &stpmic1_regmap_irq_chip, 183 &ddata->irq_data); 184 if (ret) { 185 dev_err(dev, "IRQ Chip registration failed: %d\n", ret); 186 return ret; 187 } 188 189 ret = devm_register_power_off_handler(ddata->dev, stpmic1_power_off, ddata); 190 if (ret) { 191 dev_err(ddata->dev, "failed to register sys-off handler: %d\n", ret); 192 return ret; 193 } 194 195 return devm_of_platform_populate(dev); 196 } 197 198 static int stpmic1_suspend(struct device *dev) 199 { 200 struct i2c_client *i2c = to_i2c_client(dev); 201 struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c); 202 203 disable_irq(pmic_dev->irq); 204 205 return 0; 206 } 207 208 static int stpmic1_resume(struct device *dev) 209 { 210 struct i2c_client *i2c = to_i2c_client(dev); 211 struct stpmic1 *pmic_dev = i2c_get_clientdata(i2c); 212 int ret; 213 214 ret = regcache_sync(pmic_dev->regmap); 215 if (ret) 216 return ret; 217 218 enable_irq(pmic_dev->irq); 219 220 return 0; 221 } 222 223 static DEFINE_SIMPLE_DEV_PM_OPS(stpmic1_pm, stpmic1_suspend, stpmic1_resume); 224 225 static const struct of_device_id stpmic1_of_match[] = { 226 { .compatible = "st,stpmic1", }, 227 {}, 228 }; 229 MODULE_DEVICE_TABLE(of, stpmic1_of_match); 230 231 static struct i2c_driver stpmic1_driver = { 232 .driver = { 233 .name = "stpmic1", 234 .of_match_table = stpmic1_of_match, 235 .pm = pm_sleep_ptr(&stpmic1_pm), 236 }, 237 .probe = stpmic1_probe, 238 }; 239 240 module_i2c_driver(stpmic1_driver); 241 242 MODULE_DESCRIPTION("STPMIC1 PMIC Driver"); 243 MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>"); 244 MODULE_LICENSE("GPL v2"); 245