16a3d119bSBalaji Rao /* NXP PCF50633 GPIO Driver 26a3d119bSBalaji Rao * 36a3d119bSBalaji Rao * (C) 2006-2008 by Openmoko, Inc. 46a3d119bSBalaji Rao * Author: Balaji Rao <balajirrao@openmoko.org> 56a3d119bSBalaji Rao * All rights reserved. 66a3d119bSBalaji Rao * 76a3d119bSBalaji Rao * Broken down from monstrous PCF50633 driver mainly by 86a3d119bSBalaji Rao * Harald Welte, Andy Green and Werner Almesberger 96a3d119bSBalaji Rao * 106a3d119bSBalaji Rao * This program is free software; you can redistribute it and/or modify it 116a3d119bSBalaji Rao * under the terms of the GNU General Public License as published by the 126a3d119bSBalaji Rao * Free Software Foundation; either version 2 of the License, or (at your 136a3d119bSBalaji Rao * option) any later version. 146a3d119bSBalaji Rao * 156a3d119bSBalaji Rao */ 166a3d119bSBalaji Rao 176a3d119bSBalaji Rao #include <linux/kernel.h> 181346a1c7SAdrian Bunk #include <linux/module.h> 196a3d119bSBalaji Rao 206a3d119bSBalaji Rao #include <linux/mfd/pcf50633/core.h> 216a3d119bSBalaji Rao #include <linux/mfd/pcf50633/gpio.h> 22*7f849a39SAxel Lin #include <linux/mfd/pcf50633/pmic.h> 236a3d119bSBalaji Rao 246a3d119bSBalaji Rao static const u8 pcf50633_regulator_registers[PCF50633_NUM_REGULATORS] = { 256a3d119bSBalaji Rao [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT, 266a3d119bSBalaji Rao [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT, 276a3d119bSBalaji Rao [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT, 286a3d119bSBalaji Rao [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT, 296a3d119bSBalaji Rao [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT, 306a3d119bSBalaji Rao [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT, 316a3d119bSBalaji Rao [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT, 326a3d119bSBalaji Rao [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT, 336a3d119bSBalaji Rao [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT, 346a3d119bSBalaji Rao [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT, 356a3d119bSBalaji Rao [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT, 366a3d119bSBalaji Rao }; 376a3d119bSBalaji Rao 386a3d119bSBalaji Rao int pcf50633_gpio_set(struct pcf50633 *pcf, int gpio, u8 val) 396a3d119bSBalaji Rao { 406a3d119bSBalaji Rao u8 reg; 416a3d119bSBalaji Rao 426a3d119bSBalaji Rao reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG; 436a3d119bSBalaji Rao 446a3d119bSBalaji Rao return pcf50633_reg_set_bit_mask(pcf, reg, 0x07, val); 456a3d119bSBalaji Rao } 466a3d119bSBalaji Rao EXPORT_SYMBOL_GPL(pcf50633_gpio_set); 476a3d119bSBalaji Rao 486a3d119bSBalaji Rao u8 pcf50633_gpio_get(struct pcf50633 *pcf, int gpio) 496a3d119bSBalaji Rao { 506a3d119bSBalaji Rao u8 reg, val; 516a3d119bSBalaji Rao 526a3d119bSBalaji Rao reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG; 536a3d119bSBalaji Rao val = pcf50633_reg_read(pcf, reg) & 0x07; 546a3d119bSBalaji Rao 556a3d119bSBalaji Rao return val; 566a3d119bSBalaji Rao } 576a3d119bSBalaji Rao EXPORT_SYMBOL_GPL(pcf50633_gpio_get); 586a3d119bSBalaji Rao 596a3d119bSBalaji Rao int pcf50633_gpio_invert_set(struct pcf50633 *pcf, int gpio, int invert) 606a3d119bSBalaji Rao { 616a3d119bSBalaji Rao u8 val, reg; 626a3d119bSBalaji Rao 636a3d119bSBalaji Rao reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG; 646a3d119bSBalaji Rao val = !!invert << 3; 656a3d119bSBalaji Rao 666a3d119bSBalaji Rao return pcf50633_reg_set_bit_mask(pcf, reg, 1 << 3, val); 676a3d119bSBalaji Rao } 686a3d119bSBalaji Rao EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_set); 696a3d119bSBalaji Rao 706a3d119bSBalaji Rao int pcf50633_gpio_invert_get(struct pcf50633 *pcf, int gpio) 716a3d119bSBalaji Rao { 726a3d119bSBalaji Rao u8 reg, val; 736a3d119bSBalaji Rao 746a3d119bSBalaji Rao reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG; 756a3d119bSBalaji Rao val = pcf50633_reg_read(pcf, reg); 766a3d119bSBalaji Rao 776a3d119bSBalaji Rao return val & (1 << 3); 786a3d119bSBalaji Rao } 796a3d119bSBalaji Rao EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_get); 806a3d119bSBalaji Rao 816a3d119bSBalaji Rao int pcf50633_gpio_power_supply_set(struct pcf50633 *pcf, 826a3d119bSBalaji Rao int gpio, int regulator, int on) 836a3d119bSBalaji Rao { 846a3d119bSBalaji Rao u8 reg, val, mask; 856a3d119bSBalaji Rao 866a3d119bSBalaji Rao /* the *ENA register is always one after the *OUT register */ 876a3d119bSBalaji Rao reg = pcf50633_regulator_registers[regulator] + 1; 886a3d119bSBalaji Rao 896a3d119bSBalaji Rao val = !!on << (gpio - PCF50633_GPIO1); 906a3d119bSBalaji Rao mask = 1 << (gpio - PCF50633_GPIO1); 916a3d119bSBalaji Rao 926a3d119bSBalaji Rao return pcf50633_reg_set_bit_mask(pcf, reg, mask, val); 936a3d119bSBalaji Rao } 946a3d119bSBalaji Rao EXPORT_SYMBOL_GPL(pcf50633_gpio_power_supply_set); 951346a1c7SAdrian Bunk 961346a1c7SAdrian Bunk MODULE_LICENSE("GPL"); 97