1*84a14ae8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 25e742ad6SRussell King /* 35e742ad6SRussell King * linux/drivers/mfd/mcp-sa11x0.c 45e742ad6SRussell King * 55e742ad6SRussell King * Copyright (C) 2001-2005 Russell King 65e742ad6SRussell King * 75e742ad6SRussell King * SA11x0 MCP (Multimedia Communications Port) driver. 85e742ad6SRussell King * 95e742ad6SRussell King * MCP read/write timeouts from Jordi Colomer, rehacked by rmk. 105e742ad6SRussell King */ 115e742ad6SRussell King #include <linux/module.h> 1245c7f75fSRussell King #include <linux/io.h> 135e742ad6SRussell King #include <linux/errno.h> 145e742ad6SRussell King #include <linux/kernel.h> 155e742ad6SRussell King #include <linux/delay.h> 165e742ad6SRussell King #include <linux/spinlock.h> 17d052d1beSRussell King #include <linux/platform_device.h> 182796e397SRussell King #include <linux/pm.h> 19c8602edfSThomas Kunze #include <linux/mfd/mcp.h> 205e742ad6SRussell King 21a09e64fbSRussell King #include <mach/hardware.h> 225e742ad6SRussell King #include <asm/mach-types.h> 23a1fd844cSArnd Bergmann #include <linux/platform_data/mfd-mcp-sa11x0.h> 245e742ad6SRussell King 25c4592ce4SRussell King #define DRIVER_NAME "sa11x0-mcp" 265e742ad6SRussell King 275e742ad6SRussell King struct mcp_sa11x0 { 2845c7f75fSRussell King void __iomem *base0; 2945c7f75fSRussell King void __iomem *base1; 305e742ad6SRussell King u32 mccr0; 315e742ad6SRussell King u32 mccr1; 325e742ad6SRussell King }; 335e742ad6SRussell King 3445c7f75fSRussell King /* Register offsets */ 3545c7f75fSRussell King #define MCCR0(m) ((m)->base0 + 0x00) 3645c7f75fSRussell King #define MCDR0(m) ((m)->base0 + 0x08) 3745c7f75fSRussell King #define MCDR1(m) ((m)->base0 + 0x0c) 3845c7f75fSRussell King #define MCDR2(m) ((m)->base0 + 0x10) 3945c7f75fSRussell King #define MCSR(m) ((m)->base0 + 0x18) 4045c7f75fSRussell King #define MCCR1(m) ((m)->base1 + 0x00) 4145c7f75fSRussell King 425e742ad6SRussell King #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp)) 435e742ad6SRussell King 445e742ad6SRussell King static void 455e742ad6SRussell King mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor) 465e742ad6SRussell King { 4745c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 485e742ad6SRussell King 495e742ad6SRussell King divisor /= 32; 505e742ad6SRussell King 5145c7f75fSRussell King m->mccr0 &= ~0x00007f00; 5245c7f75fSRussell King m->mccr0 |= divisor << 8; 5345c7f75fSRussell King writel_relaxed(m->mccr0, MCCR0(m)); 545e742ad6SRussell King } 555e742ad6SRussell King 565e742ad6SRussell King static void 575e742ad6SRussell King mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor) 585e742ad6SRussell King { 5945c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 605e742ad6SRussell King 615e742ad6SRussell King divisor /= 32; 625e742ad6SRussell King 6345c7f75fSRussell King m->mccr0 &= ~0x0000007f; 6445c7f75fSRussell King m->mccr0 |= divisor; 6545c7f75fSRussell King writel_relaxed(m->mccr0, MCCR0(m)); 665e742ad6SRussell King } 675e742ad6SRussell King 685e742ad6SRussell King /* 695e742ad6SRussell King * Write data to the device. The bit should be set after 3 subframe 705e742ad6SRussell King * times (each frame is 64 clocks). We wait a maximum of 6 subframes. 715e742ad6SRussell King * We really should try doing something more productive while we 725e742ad6SRussell King * wait. 735e742ad6SRussell King */ 745e742ad6SRussell King static void 755e742ad6SRussell King mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val) 765e742ad6SRussell King { 7745c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 785e742ad6SRussell King int ret = -ETIME; 795e742ad6SRussell King int i; 805e742ad6SRussell King 8145c7f75fSRussell King writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m)); 825e742ad6SRussell King 835e742ad6SRussell King for (i = 0; i < 2; i++) { 845e742ad6SRussell King udelay(mcp->rw_timeout); 8545c7f75fSRussell King if (readl_relaxed(MCSR(m)) & MCSR_CWC) { 865e742ad6SRussell King ret = 0; 875e742ad6SRussell King break; 885e742ad6SRussell King } 895e742ad6SRussell King } 905e742ad6SRussell King 915e742ad6SRussell King if (ret < 0) 925e742ad6SRussell King printk(KERN_WARNING "mcp: write timed out\n"); 935e742ad6SRussell King } 945e742ad6SRussell King 955e742ad6SRussell King /* 965e742ad6SRussell King * Read data from the device. The bit should be set after 3 subframe 975e742ad6SRussell King * times (each frame is 64 clocks). We wait a maximum of 6 subframes. 985e742ad6SRussell King * We really should try doing something more productive while we 995e742ad6SRussell King * wait. 1005e742ad6SRussell King */ 1015e742ad6SRussell King static unsigned int 1025e742ad6SRussell King mcp_sa11x0_read(struct mcp *mcp, unsigned int reg) 1035e742ad6SRussell King { 10445c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 1055e742ad6SRussell King int ret = -ETIME; 1065e742ad6SRussell King int i; 1075e742ad6SRussell King 10845c7f75fSRussell King writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m)); 1095e742ad6SRussell King 1105e742ad6SRussell King for (i = 0; i < 2; i++) { 1115e742ad6SRussell King udelay(mcp->rw_timeout); 11245c7f75fSRussell King if (readl_relaxed(MCSR(m)) & MCSR_CRC) { 11345c7f75fSRussell King ret = readl_relaxed(MCDR2(m)) & 0xffff; 1145e742ad6SRussell King break; 1155e742ad6SRussell King } 1165e742ad6SRussell King } 1175e742ad6SRussell King 1185e742ad6SRussell King if (ret < 0) 1195e742ad6SRussell King printk(KERN_WARNING "mcp: read timed out\n"); 1205e742ad6SRussell King 1215e742ad6SRussell King return ret; 1225e742ad6SRussell King } 1235e742ad6SRussell King 1245e742ad6SRussell King static void mcp_sa11x0_enable(struct mcp *mcp) 1255e742ad6SRussell King { 12645c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 12745c7f75fSRussell King 12845c7f75fSRussell King writel(-1, MCSR(m)); 12945c7f75fSRussell King m->mccr0 |= MCCR0_MCE; 13045c7f75fSRussell King writel_relaxed(m->mccr0, MCCR0(m)); 1315e742ad6SRussell King } 1325e742ad6SRussell King 1335e742ad6SRussell King static void mcp_sa11x0_disable(struct mcp *mcp) 1345e742ad6SRussell King { 13545c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 13645c7f75fSRussell King 13745c7f75fSRussell King m->mccr0 &= ~MCCR0_MCE; 13845c7f75fSRussell King writel_relaxed(m->mccr0, MCCR0(m)); 1395e742ad6SRussell King } 1405e742ad6SRussell King 1415e742ad6SRussell King /* 1425e742ad6SRussell King * Our methods. 1435e742ad6SRussell King */ 1445e742ad6SRussell King static struct mcp_ops mcp_sa11x0 = { 1455e742ad6SRussell King .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor, 1465e742ad6SRussell King .set_audio_divisor = mcp_sa11x0_set_audio_divisor, 1475e742ad6SRussell King .reg_write = mcp_sa11x0_write, 1485e742ad6SRussell King .reg_read = mcp_sa11x0_read, 1495e742ad6SRussell King .enable = mcp_sa11x0_enable, 1505e742ad6SRussell King .disable = mcp_sa11x0_disable, 1515e742ad6SRussell King }; 1525e742ad6SRussell King 15345c7f75fSRussell King static int mcp_sa11x0_probe(struct platform_device *dev) 1545e742ad6SRussell King { 155334a41ceSJingoo Han struct mcp_plat_data *data = dev_get_platdata(&dev->dev); 15645c7f75fSRussell King struct resource *mem0, *mem1; 15745c7f75fSRussell King struct mcp_sa11x0 *m; 1585e742ad6SRussell King struct mcp *mcp; 1595e742ad6SRussell King int ret; 1605e742ad6SRussell King 161323cdfc1SRussell King if (!data) 1625e742ad6SRussell King return -ENODEV; 1635e742ad6SRussell King 16445c7f75fSRussell King mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0); 16545c7f75fSRussell King mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1); 16645c7f75fSRussell King if (!mem0 || !mem1) 16745c7f75fSRussell King return -ENXIO; 1685e742ad6SRussell King 16945c7f75fSRussell King if (!request_mem_region(mem0->start, resource_size(mem0), 17045c7f75fSRussell King DRIVER_NAME)) { 17145c7f75fSRussell King ret = -EBUSY; 17245c7f75fSRussell King goto err_mem0; 17345c7f75fSRussell King } 17445c7f75fSRussell King 17545c7f75fSRussell King if (!request_mem_region(mem1->start, resource_size(mem1), 17645c7f75fSRussell King DRIVER_NAME)) { 17745c7f75fSRussell King ret = -EBUSY; 17845c7f75fSRussell King goto err_mem1; 17945c7f75fSRussell King } 18045c7f75fSRussell King 18145c7f75fSRussell King mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0)); 1825e742ad6SRussell King if (!mcp) { 1835e742ad6SRussell King ret = -ENOMEM; 18445c7f75fSRussell King goto err_alloc; 1855e742ad6SRussell King } 1865e742ad6SRussell King 1875e742ad6SRussell King mcp->owner = THIS_MODULE; 1885e742ad6SRussell King mcp->ops = &mcp_sa11x0; 189323cdfc1SRussell King mcp->sclk_rate = data->sclk_rate; 1905e742ad6SRussell King 19145c7f75fSRussell King m = priv(mcp); 19245c7f75fSRussell King m->mccr0 = data->mccr0 | 0x7f7f; 19345c7f75fSRussell King m->mccr1 = data->mccr1; 19445c7f75fSRussell King 19545c7f75fSRussell King m->base0 = ioremap(mem0->start, resource_size(mem0)); 19645c7f75fSRussell King m->base1 = ioremap(mem1->start, resource_size(mem1)); 19745c7f75fSRussell King if (!m->base0 || !m->base1) { 19845c7f75fSRussell King ret = -ENOMEM; 19945c7f75fSRussell King goto err_ioremap; 20045c7f75fSRussell King } 20145c7f75fSRussell King 20245c7f75fSRussell King platform_set_drvdata(dev, mcp); 2035e742ad6SRussell King 204216f63c4SRussell King /* 205323cdfc1SRussell King * Initialise device. Note that we initially 206323cdfc1SRussell King * set the sampling rate to minimum. 207323cdfc1SRussell King */ 20845c7f75fSRussell King writel_relaxed(-1, MCSR(m)); 20945c7f75fSRussell King writel_relaxed(m->mccr1, MCCR1(m)); 21045c7f75fSRussell King writel_relaxed(m->mccr0, MCCR0(m)); 2115e742ad6SRussell King 2125e742ad6SRussell King /* 2135e742ad6SRussell King * Calculate the read/write timeout (us) from the bit clock 2145e742ad6SRussell King * rate. This is the period for 3 64-bit frames. Always 2155e742ad6SRussell King * round this time up. 2165e742ad6SRussell King */ 2175e742ad6SRussell King mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) / 2185e742ad6SRussell King mcp->sclk_rate; 2195e742ad6SRussell King 220abe06082SRussell King ret = mcp_host_add(mcp, data->codec_pdata); 2215e742ad6SRussell King if (ret == 0) 22245c7f75fSRussell King return 0; 2235e742ad6SRussell King 22445c7f75fSRussell King err_ioremap: 22545c7f75fSRussell King iounmap(m->base1); 22645c7f75fSRussell King iounmap(m->base0); 22730816ac0SRussell King mcp_host_free(mcp); 22845c7f75fSRussell King err_alloc: 22945c7f75fSRussell King release_mem_region(mem1->start, resource_size(mem1)); 23045c7f75fSRussell King err_mem1: 23145c7f75fSRussell King release_mem_region(mem0->start, resource_size(mem0)); 23245c7f75fSRussell King err_mem0: 2335e742ad6SRussell King return ret; 2345e742ad6SRussell King } 2355e742ad6SRussell King 236216f63c4SRussell King static int mcp_sa11x0_remove(struct platform_device *dev) 2375e742ad6SRussell King { 238216f63c4SRussell King struct mcp *mcp = platform_get_drvdata(dev); 23945c7f75fSRussell King struct mcp_sa11x0 *m = priv(mcp); 24045c7f75fSRussell King struct resource *mem0, *mem1; 24145c7f75fSRussell King 242a4b54acfSRussell King if (m->mccr0 & MCCR0_MCE) 243a4b54acfSRussell King dev_warn(&dev->dev, 244a4b54acfSRussell King "device left active (missing disable call?)\n"); 245a4b54acfSRussell King 24645c7f75fSRussell King mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0); 24745c7f75fSRussell King mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1); 2485e742ad6SRussell King 24930816ac0SRussell King mcp_host_del(mcp); 25045c7f75fSRussell King iounmap(m->base1); 25145c7f75fSRussell King iounmap(m->base0); 25230816ac0SRussell King mcp_host_free(mcp); 25345c7f75fSRussell King release_mem_region(mem1->start, resource_size(mem1)); 25445c7f75fSRussell King release_mem_region(mem0->start, resource_size(mem0)); 2555e742ad6SRussell King 2565e742ad6SRussell King return 0; 2575e742ad6SRussell King } 2585e742ad6SRussell King 2592796e397SRussell King #ifdef CONFIG_PM_SLEEP 2602796e397SRussell King static int mcp_sa11x0_suspend(struct device *dev) 2615e742ad6SRussell King { 2622796e397SRussell King struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev)); 2635e742ad6SRussell King 264a4b54acfSRussell King if (m->mccr0 & MCCR0_MCE) 265a4b54acfSRussell King dev_warn(dev, "device left active (missing disable call?)\n"); 266a4b54acfSRussell King 26745c7f75fSRussell King writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m)); 2689480e307SRussell King 2695e742ad6SRussell King return 0; 2705e742ad6SRussell King } 2715e742ad6SRussell King 2722796e397SRussell King static int mcp_sa11x0_resume(struct device *dev) 2735e742ad6SRussell King { 2742796e397SRussell King struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev)); 2755e742ad6SRussell King 27645c7f75fSRussell King writel_relaxed(m->mccr1, MCCR1(m)); 27745c7f75fSRussell King writel_relaxed(m->mccr0, MCCR0(m)); 2789480e307SRussell King 2795e742ad6SRussell King return 0; 2805e742ad6SRussell King } 2812796e397SRussell King #endif 2822796e397SRussell King 2832796e397SRussell King static const struct dev_pm_ops mcp_sa11x0_pm_ops = { 284a6aecae2SRussell King #ifdef CONFIG_PM_SLEEP 285a6aecae2SRussell King .suspend = mcp_sa11x0_suspend, 286a6aecae2SRussell King .freeze = mcp_sa11x0_suspend, 287a6aecae2SRussell King .poweroff = mcp_sa11x0_suspend, 288a6aecae2SRussell King .resume_noirq = mcp_sa11x0_resume, 289a6aecae2SRussell King .thaw_noirq = mcp_sa11x0_resume, 290a6aecae2SRussell King .restore_noirq = mcp_sa11x0_resume, 291a6aecae2SRussell King #endif 2922796e397SRussell King }; 2935e742ad6SRussell King 2943ae5eaecSRussell King static struct platform_driver mcp_sa11x0_driver = { 2955e742ad6SRussell King .probe = mcp_sa11x0_probe, 2965e742ad6SRussell King .remove = mcp_sa11x0_remove, 2973ae5eaecSRussell King .driver = { 298c4592ce4SRussell King .name = DRIVER_NAME, 2992796e397SRussell King .pm = &mcp_sa11x0_pm_ops, 3003ae5eaecSRussell King }, 3015e742ad6SRussell King }; 3025e742ad6SRussell King 3035e742ad6SRussell King /* 3045e742ad6SRussell King * This needs re-working 3055e742ad6SRussell King */ 30665349d60SMark Brown module_platform_driver(mcp_sa11x0_driver); 3075e742ad6SRussell King 308c4592ce4SRussell King MODULE_ALIAS("platform:" DRIVER_NAME); 3095e742ad6SRussell King MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); 3105e742ad6SRussell King MODULE_DESCRIPTION("SA11x0 multimedia communications port driver"); 3115e742ad6SRussell King MODULE_LICENSE("GPL"); 312