1 /* 2 * Base driver for Maxim MAX8925 3 * 4 * Copyright (C) 2009-2010 Marvell International Ltd. 5 * Haojian Zhuang <haojian.zhuang@marvell.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/i2c.h> 15 #include <linux/irq.h> 16 #include <linux/interrupt.h> 17 #include <linux/irqdomain.h> 18 #include <linux/platform_device.h> 19 #include <linux/regulator/machine.h> 20 #include <linux/mfd/core.h> 21 #include <linux/mfd/max8925.h> 22 #include <linux/of.h> 23 #include <linux/of_platform.h> 24 25 static struct resource bk_resources[] = { 26 { 0x84, 0x84, "mode control", IORESOURCE_REG, }, 27 { 0x85, 0x85, "control", IORESOURCE_REG, }, 28 }; 29 30 static struct mfd_cell bk_devs[] = { 31 { 32 .name = "max8925-backlight", 33 .num_resources = ARRAY_SIZE(bk_resources), 34 .resources = &bk_resources[0], 35 .id = -1, 36 }, 37 }; 38 39 static struct resource touch_resources[] = { 40 { 41 .name = "max8925-tsc", 42 .start = MAX8925_TSC_IRQ, 43 .end = MAX8925_ADC_RES_END, 44 .flags = IORESOURCE_REG, 45 }, 46 }; 47 48 static const struct mfd_cell touch_devs[] = { 49 { 50 .name = "max8925-touch", 51 .num_resources = 1, 52 .resources = &touch_resources[0], 53 .id = -1, 54 }, 55 }; 56 57 static struct resource power_supply_resources[] = { 58 { 59 .name = "max8925-power", 60 .start = MAX8925_CHG_IRQ1, 61 .end = MAX8925_CHG_IRQ1_MASK, 62 .flags = IORESOURCE_REG, 63 }, 64 }; 65 66 static const struct mfd_cell power_devs[] = { 67 { 68 .name = "max8925-power", 69 .num_resources = 1, 70 .resources = &power_supply_resources[0], 71 .id = -1, 72 }, 73 }; 74 75 static struct resource rtc_resources[] = { 76 { 77 .name = "max8925-rtc", 78 .start = MAX8925_IRQ_RTC_ALARM0, 79 .end = MAX8925_IRQ_RTC_ALARM0, 80 .flags = IORESOURCE_IRQ, 81 }, 82 }; 83 84 static const struct mfd_cell rtc_devs[] = { 85 { 86 .name = "max8925-rtc", 87 .num_resources = 1, 88 .resources = &rtc_resources[0], 89 .id = -1, 90 }, 91 }; 92 93 static struct resource onkey_resources[] = { 94 { 95 .name = "max8925-onkey", 96 .start = MAX8925_IRQ_GPM_SW_R, 97 .end = MAX8925_IRQ_GPM_SW_R, 98 .flags = IORESOURCE_IRQ, 99 }, { 100 .name = "max8925-onkey", 101 .start = MAX8925_IRQ_GPM_SW_F, 102 .end = MAX8925_IRQ_GPM_SW_F, 103 .flags = IORESOURCE_IRQ, 104 }, 105 }; 106 107 static const struct mfd_cell onkey_devs[] = { 108 { 109 .name = "max8925-onkey", 110 .num_resources = 2, 111 .resources = &onkey_resources[0], 112 .id = -1, 113 }, 114 }; 115 116 static struct resource sd1_resources[] = { 117 {0x06, 0x06, "sdv", IORESOURCE_REG, }, 118 }; 119 120 static struct resource sd2_resources[] = { 121 {0x09, 0x09, "sdv", IORESOURCE_REG, }, 122 }; 123 124 static struct resource sd3_resources[] = { 125 {0x0c, 0x0c, "sdv", IORESOURCE_REG, }, 126 }; 127 128 static struct resource ldo1_resources[] = { 129 {0x1a, 0x1a, "ldov", IORESOURCE_REG, }, 130 }; 131 132 static struct resource ldo2_resources[] = { 133 {0x1e, 0x1e, "ldov", IORESOURCE_REG, }, 134 }; 135 136 static struct resource ldo3_resources[] = { 137 {0x22, 0x22, "ldov", IORESOURCE_REG, }, 138 }; 139 140 static struct resource ldo4_resources[] = { 141 {0x26, 0x26, "ldov", IORESOURCE_REG, }, 142 }; 143 144 static struct resource ldo5_resources[] = { 145 {0x2a, 0x2a, "ldov", IORESOURCE_REG, }, 146 }; 147 148 static struct resource ldo6_resources[] = { 149 {0x2e, 0x2e, "ldov", IORESOURCE_REG, }, 150 }; 151 152 static struct resource ldo7_resources[] = { 153 {0x32, 0x32, "ldov", IORESOURCE_REG, }, 154 }; 155 156 static struct resource ldo8_resources[] = { 157 {0x36, 0x36, "ldov", IORESOURCE_REG, }, 158 }; 159 160 static struct resource ldo9_resources[] = { 161 {0x3a, 0x3a, "ldov", IORESOURCE_REG, }, 162 }; 163 164 static struct resource ldo10_resources[] = { 165 {0x3e, 0x3e, "ldov", IORESOURCE_REG, }, 166 }; 167 168 static struct resource ldo11_resources[] = { 169 {0x42, 0x42, "ldov", IORESOURCE_REG, }, 170 }; 171 172 static struct resource ldo12_resources[] = { 173 {0x46, 0x46, "ldov", IORESOURCE_REG, }, 174 }; 175 176 static struct resource ldo13_resources[] = { 177 {0x4a, 0x4a, "ldov", IORESOURCE_REG, }, 178 }; 179 180 static struct resource ldo14_resources[] = { 181 {0x4e, 0x4e, "ldov", IORESOURCE_REG, }, 182 }; 183 184 static struct resource ldo15_resources[] = { 185 {0x52, 0x52, "ldov", IORESOURCE_REG, }, 186 }; 187 188 static struct resource ldo16_resources[] = { 189 {0x12, 0x12, "ldov", IORESOURCE_REG, }, 190 }; 191 192 static struct resource ldo17_resources[] = { 193 {0x16, 0x16, "ldov", IORESOURCE_REG, }, 194 }; 195 196 static struct resource ldo18_resources[] = { 197 {0x74, 0x74, "ldov", IORESOURCE_REG, }, 198 }; 199 200 static struct resource ldo19_resources[] = { 201 {0x5e, 0x5e, "ldov", IORESOURCE_REG, }, 202 }; 203 204 static struct resource ldo20_resources[] = { 205 {0x9e, 0x9e, "ldov", IORESOURCE_REG, }, 206 }; 207 208 static struct mfd_cell reg_devs[] = { 209 { 210 .name = "max8925-regulator", 211 .id = 0, 212 .num_resources = ARRAY_SIZE(sd1_resources), 213 .resources = sd1_resources, 214 }, { 215 .name = "max8925-regulator", 216 .id = 1, 217 .num_resources = ARRAY_SIZE(sd2_resources), 218 .resources = sd2_resources, 219 }, { 220 .name = "max8925-regulator", 221 .id = 2, 222 .num_resources = ARRAY_SIZE(sd3_resources), 223 .resources = sd3_resources, 224 }, { 225 .name = "max8925-regulator", 226 .id = 3, 227 .num_resources = ARRAY_SIZE(ldo1_resources), 228 .resources = ldo1_resources, 229 }, { 230 .name = "max8925-regulator", 231 .id = 4, 232 .num_resources = ARRAY_SIZE(ldo2_resources), 233 .resources = ldo2_resources, 234 }, { 235 .name = "max8925-regulator", 236 .id = 5, 237 .num_resources = ARRAY_SIZE(ldo3_resources), 238 .resources = ldo3_resources, 239 }, { 240 .name = "max8925-regulator", 241 .id = 6, 242 .num_resources = ARRAY_SIZE(ldo4_resources), 243 .resources = ldo4_resources, 244 }, { 245 .name = "max8925-regulator", 246 .id = 7, 247 .num_resources = ARRAY_SIZE(ldo5_resources), 248 .resources = ldo5_resources, 249 }, { 250 .name = "max8925-regulator", 251 .id = 8, 252 .num_resources = ARRAY_SIZE(ldo6_resources), 253 .resources = ldo6_resources, 254 }, { 255 .name = "max8925-regulator", 256 .id = 9, 257 .num_resources = ARRAY_SIZE(ldo7_resources), 258 .resources = ldo7_resources, 259 }, { 260 .name = "max8925-regulator", 261 .id = 10, 262 .num_resources = ARRAY_SIZE(ldo8_resources), 263 .resources = ldo8_resources, 264 }, { 265 .name = "max8925-regulator", 266 .id = 11, 267 .num_resources = ARRAY_SIZE(ldo9_resources), 268 .resources = ldo9_resources, 269 }, { 270 .name = "max8925-regulator", 271 .id = 12, 272 .num_resources = ARRAY_SIZE(ldo10_resources), 273 .resources = ldo10_resources, 274 }, { 275 .name = "max8925-regulator", 276 .id = 13, 277 .num_resources = ARRAY_SIZE(ldo11_resources), 278 .resources = ldo11_resources, 279 }, { 280 .name = "max8925-regulator", 281 .id = 14, 282 .num_resources = ARRAY_SIZE(ldo12_resources), 283 .resources = ldo12_resources, 284 }, { 285 .name = "max8925-regulator", 286 .id = 15, 287 .num_resources = ARRAY_SIZE(ldo13_resources), 288 .resources = ldo13_resources, 289 }, { 290 .name = "max8925-regulator", 291 .id = 16, 292 .num_resources = ARRAY_SIZE(ldo14_resources), 293 .resources = ldo14_resources, 294 }, { 295 .name = "max8925-regulator", 296 .id = 17, 297 .num_resources = ARRAY_SIZE(ldo15_resources), 298 .resources = ldo15_resources, 299 }, { 300 .name = "max8925-regulator", 301 .id = 18, 302 .num_resources = ARRAY_SIZE(ldo16_resources), 303 .resources = ldo16_resources, 304 }, { 305 .name = "max8925-regulator", 306 .id = 19, 307 .num_resources = ARRAY_SIZE(ldo17_resources), 308 .resources = ldo17_resources, 309 }, { 310 .name = "max8925-regulator", 311 .id = 20, 312 .num_resources = ARRAY_SIZE(ldo18_resources), 313 .resources = ldo18_resources, 314 }, { 315 .name = "max8925-regulator", 316 .id = 21, 317 .num_resources = ARRAY_SIZE(ldo19_resources), 318 .resources = ldo19_resources, 319 }, { 320 .name = "max8925-regulator", 321 .id = 22, 322 .num_resources = ARRAY_SIZE(ldo20_resources), 323 .resources = ldo20_resources, 324 }, 325 }; 326 327 enum { 328 FLAGS_ADC = 1, /* register in ADC component */ 329 FLAGS_RTC, /* register in RTC component */ 330 }; 331 332 struct max8925_irq_data { 333 int reg; 334 int mask_reg; 335 int enable; /* enable or not */ 336 int offs; /* bit offset in mask register */ 337 int flags; 338 int tsc_irq; 339 }; 340 341 static struct max8925_irq_data max8925_irqs[] = { 342 [MAX8925_IRQ_VCHG_DC_OVP] = { 343 .reg = MAX8925_CHG_IRQ1, 344 .mask_reg = MAX8925_CHG_IRQ1_MASK, 345 .offs = 1 << 0, 346 }, 347 [MAX8925_IRQ_VCHG_DC_F] = { 348 .reg = MAX8925_CHG_IRQ1, 349 .mask_reg = MAX8925_CHG_IRQ1_MASK, 350 .offs = 1 << 1, 351 }, 352 [MAX8925_IRQ_VCHG_DC_R] = { 353 .reg = MAX8925_CHG_IRQ1, 354 .mask_reg = MAX8925_CHG_IRQ1_MASK, 355 .offs = 1 << 2, 356 }, 357 [MAX8925_IRQ_VCHG_THM_OK_R] = { 358 .reg = MAX8925_CHG_IRQ2, 359 .mask_reg = MAX8925_CHG_IRQ2_MASK, 360 .offs = 1 << 0, 361 }, 362 [MAX8925_IRQ_VCHG_THM_OK_F] = { 363 .reg = MAX8925_CHG_IRQ2, 364 .mask_reg = MAX8925_CHG_IRQ2_MASK, 365 .offs = 1 << 1, 366 }, 367 [MAX8925_IRQ_VCHG_SYSLOW_F] = { 368 .reg = MAX8925_CHG_IRQ2, 369 .mask_reg = MAX8925_CHG_IRQ2_MASK, 370 .offs = 1 << 2, 371 }, 372 [MAX8925_IRQ_VCHG_SYSLOW_R] = { 373 .reg = MAX8925_CHG_IRQ2, 374 .mask_reg = MAX8925_CHG_IRQ2_MASK, 375 .offs = 1 << 3, 376 }, 377 [MAX8925_IRQ_VCHG_RST] = { 378 .reg = MAX8925_CHG_IRQ2, 379 .mask_reg = MAX8925_CHG_IRQ2_MASK, 380 .offs = 1 << 4, 381 }, 382 [MAX8925_IRQ_VCHG_DONE] = { 383 .reg = MAX8925_CHG_IRQ2, 384 .mask_reg = MAX8925_CHG_IRQ2_MASK, 385 .offs = 1 << 5, 386 }, 387 [MAX8925_IRQ_VCHG_TOPOFF] = { 388 .reg = MAX8925_CHG_IRQ2, 389 .mask_reg = MAX8925_CHG_IRQ2_MASK, 390 .offs = 1 << 6, 391 }, 392 [MAX8925_IRQ_VCHG_TMR_FAULT] = { 393 .reg = MAX8925_CHG_IRQ2, 394 .mask_reg = MAX8925_CHG_IRQ2_MASK, 395 .offs = 1 << 7, 396 }, 397 [MAX8925_IRQ_GPM_RSTIN] = { 398 .reg = MAX8925_ON_OFF_IRQ1, 399 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 400 .offs = 1 << 0, 401 }, 402 [MAX8925_IRQ_GPM_MPL] = { 403 .reg = MAX8925_ON_OFF_IRQ1, 404 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 405 .offs = 1 << 1, 406 }, 407 [MAX8925_IRQ_GPM_SW_3SEC] = { 408 .reg = MAX8925_ON_OFF_IRQ1, 409 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 410 .offs = 1 << 2, 411 }, 412 [MAX8925_IRQ_GPM_EXTON_F] = { 413 .reg = MAX8925_ON_OFF_IRQ1, 414 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 415 .offs = 1 << 3, 416 }, 417 [MAX8925_IRQ_GPM_EXTON_R] = { 418 .reg = MAX8925_ON_OFF_IRQ1, 419 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 420 .offs = 1 << 4, 421 }, 422 [MAX8925_IRQ_GPM_SW_1SEC] = { 423 .reg = MAX8925_ON_OFF_IRQ1, 424 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 425 .offs = 1 << 5, 426 }, 427 [MAX8925_IRQ_GPM_SW_F] = { 428 .reg = MAX8925_ON_OFF_IRQ1, 429 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 430 .offs = 1 << 6, 431 }, 432 [MAX8925_IRQ_GPM_SW_R] = { 433 .reg = MAX8925_ON_OFF_IRQ1, 434 .mask_reg = MAX8925_ON_OFF_IRQ1_MASK, 435 .offs = 1 << 7, 436 }, 437 [MAX8925_IRQ_GPM_SYSCKEN_F] = { 438 .reg = MAX8925_ON_OFF_IRQ2, 439 .mask_reg = MAX8925_ON_OFF_IRQ2_MASK, 440 .offs = 1 << 0, 441 }, 442 [MAX8925_IRQ_GPM_SYSCKEN_R] = { 443 .reg = MAX8925_ON_OFF_IRQ2, 444 .mask_reg = MAX8925_ON_OFF_IRQ2_MASK, 445 .offs = 1 << 1, 446 }, 447 [MAX8925_IRQ_RTC_ALARM1] = { 448 .reg = MAX8925_RTC_IRQ, 449 .mask_reg = MAX8925_RTC_IRQ_MASK, 450 .offs = 1 << 2, 451 .flags = FLAGS_RTC, 452 }, 453 [MAX8925_IRQ_RTC_ALARM0] = { 454 .reg = MAX8925_RTC_IRQ, 455 .mask_reg = MAX8925_RTC_IRQ_MASK, 456 .offs = 1 << 3, 457 .flags = FLAGS_RTC, 458 }, 459 [MAX8925_IRQ_TSC_STICK] = { 460 .reg = MAX8925_TSC_IRQ, 461 .mask_reg = MAX8925_TSC_IRQ_MASK, 462 .offs = 1 << 0, 463 .flags = FLAGS_ADC, 464 .tsc_irq = 1, 465 }, 466 [MAX8925_IRQ_TSC_NSTICK] = { 467 .reg = MAX8925_TSC_IRQ, 468 .mask_reg = MAX8925_TSC_IRQ_MASK, 469 .offs = 1 << 1, 470 .flags = FLAGS_ADC, 471 .tsc_irq = 1, 472 }, 473 }; 474 475 static inline struct max8925_irq_data *irq_to_max8925(struct max8925_chip *chip, 476 int irq) 477 { 478 return &max8925_irqs[irq - chip->irq_base]; 479 } 480 481 static irqreturn_t max8925_irq(int irq, void *data) 482 { 483 struct max8925_chip *chip = data; 484 struct max8925_irq_data *irq_data; 485 struct i2c_client *i2c; 486 int read_reg = -1, value = 0; 487 int i; 488 489 for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) { 490 irq_data = &max8925_irqs[i]; 491 /* TSC IRQ should be serviced in max8925_tsc_irq() */ 492 if (irq_data->tsc_irq) 493 continue; 494 if (irq_data->flags == FLAGS_RTC) 495 i2c = chip->rtc; 496 else if (irq_data->flags == FLAGS_ADC) 497 i2c = chip->adc; 498 else 499 i2c = chip->i2c; 500 if (read_reg != irq_data->reg) { 501 read_reg = irq_data->reg; 502 value = max8925_reg_read(i2c, irq_data->reg); 503 } 504 if (value & irq_data->enable) 505 handle_nested_irq(chip->irq_base + i); 506 } 507 return IRQ_HANDLED; 508 } 509 510 static irqreturn_t max8925_tsc_irq(int irq, void *data) 511 { 512 struct max8925_chip *chip = data; 513 struct max8925_irq_data *irq_data; 514 struct i2c_client *i2c; 515 int read_reg = -1, value = 0; 516 int i; 517 518 for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) { 519 irq_data = &max8925_irqs[i]; 520 /* non TSC IRQ should be serviced in max8925_irq() */ 521 if (!irq_data->tsc_irq) 522 continue; 523 if (irq_data->flags == FLAGS_RTC) 524 i2c = chip->rtc; 525 else if (irq_data->flags == FLAGS_ADC) 526 i2c = chip->adc; 527 else 528 i2c = chip->i2c; 529 if (read_reg != irq_data->reg) { 530 read_reg = irq_data->reg; 531 value = max8925_reg_read(i2c, irq_data->reg); 532 } 533 if (value & irq_data->enable) 534 handle_nested_irq(chip->irq_base + i); 535 } 536 return IRQ_HANDLED; 537 } 538 539 static void max8925_irq_lock(struct irq_data *data) 540 { 541 struct max8925_chip *chip = irq_data_get_irq_chip_data(data); 542 543 mutex_lock(&chip->irq_lock); 544 } 545 546 static void max8925_irq_sync_unlock(struct irq_data *data) 547 { 548 struct max8925_chip *chip = irq_data_get_irq_chip_data(data); 549 struct max8925_irq_data *irq_data; 550 static unsigned char cache_chg[2] = {0xff, 0xff}; 551 static unsigned char cache_on[2] = {0xff, 0xff}; 552 static unsigned char cache_rtc = 0xff, cache_tsc = 0xff; 553 unsigned char irq_chg[2], irq_on[2]; 554 unsigned char irq_rtc, irq_tsc; 555 int i; 556 557 /* Load cached value. In initial, all IRQs are masked */ 558 irq_chg[0] = cache_chg[0]; 559 irq_chg[1] = cache_chg[1]; 560 irq_on[0] = cache_on[0]; 561 irq_on[1] = cache_on[1]; 562 irq_rtc = cache_rtc; 563 irq_tsc = cache_tsc; 564 for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) { 565 irq_data = &max8925_irqs[i]; 566 /* 1 -- disable, 0 -- enable */ 567 switch (irq_data->mask_reg) { 568 case MAX8925_CHG_IRQ1_MASK: 569 irq_chg[0] &= ~irq_data->enable; 570 break; 571 case MAX8925_CHG_IRQ2_MASK: 572 irq_chg[1] &= ~irq_data->enable; 573 break; 574 case MAX8925_ON_OFF_IRQ1_MASK: 575 irq_on[0] &= ~irq_data->enable; 576 break; 577 case MAX8925_ON_OFF_IRQ2_MASK: 578 irq_on[1] &= ~irq_data->enable; 579 break; 580 case MAX8925_RTC_IRQ_MASK: 581 irq_rtc &= ~irq_data->enable; 582 break; 583 case MAX8925_TSC_IRQ_MASK: 584 irq_tsc &= ~irq_data->enable; 585 break; 586 default: 587 dev_err(chip->dev, "wrong IRQ\n"); 588 break; 589 } 590 } 591 /* update mask into registers */ 592 if (cache_chg[0] != irq_chg[0]) { 593 cache_chg[0] = irq_chg[0]; 594 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 595 irq_chg[0]); 596 } 597 if (cache_chg[1] != irq_chg[1]) { 598 cache_chg[1] = irq_chg[1]; 599 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK, 600 irq_chg[1]); 601 } 602 if (cache_on[0] != irq_on[0]) { 603 cache_on[0] = irq_on[0]; 604 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 605 irq_on[0]); 606 } 607 if (cache_on[1] != irq_on[1]) { 608 cache_on[1] = irq_on[1]; 609 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 610 irq_on[1]); 611 } 612 if (cache_rtc != irq_rtc) { 613 cache_rtc = irq_rtc; 614 max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, irq_rtc); 615 } 616 if (cache_tsc != irq_tsc) { 617 cache_tsc = irq_tsc; 618 max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, irq_tsc); 619 } 620 621 mutex_unlock(&chip->irq_lock); 622 } 623 624 static void max8925_irq_enable(struct irq_data *data) 625 { 626 struct max8925_chip *chip = irq_data_get_irq_chip_data(data); 627 628 max8925_irqs[data->irq - chip->irq_base].enable 629 = max8925_irqs[data->irq - chip->irq_base].offs; 630 } 631 632 static void max8925_irq_disable(struct irq_data *data) 633 { 634 struct max8925_chip *chip = irq_data_get_irq_chip_data(data); 635 636 max8925_irqs[data->irq - chip->irq_base].enable = 0; 637 } 638 639 static struct irq_chip max8925_irq_chip = { 640 .name = "max8925", 641 .irq_bus_lock = max8925_irq_lock, 642 .irq_bus_sync_unlock = max8925_irq_sync_unlock, 643 .irq_enable = max8925_irq_enable, 644 .irq_disable = max8925_irq_disable, 645 }; 646 647 static int max8925_irq_domain_map(struct irq_domain *d, unsigned int virq, 648 irq_hw_number_t hw) 649 { 650 irq_set_chip_data(virq, d->host_data); 651 irq_set_chip_and_handler(virq, &max8925_irq_chip, handle_edge_irq); 652 irq_set_nested_thread(virq, 1); 653 irq_set_noprobe(virq); 654 655 return 0; 656 } 657 658 static const struct irq_domain_ops max8925_irq_domain_ops = { 659 .map = max8925_irq_domain_map, 660 .xlate = irq_domain_xlate_onetwocell, 661 }; 662 663 664 static int max8925_irq_init(struct max8925_chip *chip, int irq, 665 struct max8925_platform_data *pdata) 666 { 667 unsigned long flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT; 668 int ret; 669 struct device_node *node = chip->dev->of_node; 670 671 /* clear all interrupts */ 672 max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ1); 673 max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ2); 674 max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ1); 675 max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2); 676 max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ); 677 max8925_reg_read(chip->adc, MAX8925_TSC_IRQ); 678 /* mask all interrupts except for TSC */ 679 max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0); 680 max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0); 681 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff); 682 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK, 0xff); 683 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff); 684 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff); 685 max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff); 686 687 mutex_init(&chip->irq_lock); 688 chip->irq_base = irq_alloc_descs(-1, 0, MAX8925_NR_IRQS, 0); 689 if (chip->irq_base < 0) { 690 dev_err(chip->dev, "Failed to allocate interrupts, ret:%d\n", 691 chip->irq_base); 692 return -EBUSY; 693 } 694 695 irq_domain_add_legacy(node, MAX8925_NR_IRQS, chip->irq_base, 0, 696 &max8925_irq_domain_ops, chip); 697 698 /* request irq handler for pmic main irq*/ 699 chip->core_irq = irq; 700 if (!chip->core_irq) 701 return -EBUSY; 702 ret = request_threaded_irq(irq, NULL, max8925_irq, flags | IRQF_ONESHOT, 703 "max8925", chip); 704 if (ret) { 705 dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret); 706 chip->core_irq = 0; 707 return -EBUSY; 708 } 709 710 /* request irq handler for pmic tsc irq*/ 711 712 /* mask TSC interrupt */ 713 max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0x0f); 714 715 if (!pdata->tsc_irq) { 716 dev_warn(chip->dev, "No interrupt support on TSC IRQ\n"); 717 return 0; 718 } 719 chip->tsc_irq = pdata->tsc_irq; 720 ret = request_threaded_irq(chip->tsc_irq, NULL, max8925_tsc_irq, 721 flags | IRQF_ONESHOT, "max8925-tsc", chip); 722 if (ret) { 723 dev_err(chip->dev, "Failed to request TSC IRQ: %d\n", ret); 724 chip->tsc_irq = 0; 725 } 726 return 0; 727 } 728 729 static void init_regulator(struct max8925_chip *chip, 730 struct max8925_platform_data *pdata) 731 { 732 int ret; 733 734 if (!pdata) 735 return; 736 if (pdata->sd1) { 737 reg_devs[0].platform_data = pdata->sd1; 738 reg_devs[0].pdata_size = sizeof(struct regulator_init_data); 739 } 740 if (pdata->sd2) { 741 reg_devs[1].platform_data = pdata->sd2; 742 reg_devs[1].pdata_size = sizeof(struct regulator_init_data); 743 } 744 if (pdata->sd3) { 745 reg_devs[2].platform_data = pdata->sd3; 746 reg_devs[2].pdata_size = sizeof(struct regulator_init_data); 747 } 748 if (pdata->ldo1) { 749 reg_devs[3].platform_data = pdata->ldo1; 750 reg_devs[3].pdata_size = sizeof(struct regulator_init_data); 751 } 752 if (pdata->ldo2) { 753 reg_devs[4].platform_data = pdata->ldo2; 754 reg_devs[4].pdata_size = sizeof(struct regulator_init_data); 755 } 756 if (pdata->ldo3) { 757 reg_devs[5].platform_data = pdata->ldo3; 758 reg_devs[5].pdata_size = sizeof(struct regulator_init_data); 759 } 760 if (pdata->ldo4) { 761 reg_devs[6].platform_data = pdata->ldo4; 762 reg_devs[6].pdata_size = sizeof(struct regulator_init_data); 763 } 764 if (pdata->ldo5) { 765 reg_devs[7].platform_data = pdata->ldo5; 766 reg_devs[7].pdata_size = sizeof(struct regulator_init_data); 767 } 768 if (pdata->ldo6) { 769 reg_devs[8].platform_data = pdata->ldo6; 770 reg_devs[8].pdata_size = sizeof(struct regulator_init_data); 771 } 772 if (pdata->ldo7) { 773 reg_devs[9].platform_data = pdata->ldo7; 774 reg_devs[9].pdata_size = sizeof(struct regulator_init_data); 775 } 776 if (pdata->ldo8) { 777 reg_devs[10].platform_data = pdata->ldo8; 778 reg_devs[10].pdata_size = sizeof(struct regulator_init_data); 779 } 780 if (pdata->ldo9) { 781 reg_devs[11].platform_data = pdata->ldo9; 782 reg_devs[11].pdata_size = sizeof(struct regulator_init_data); 783 } 784 if (pdata->ldo10) { 785 reg_devs[12].platform_data = pdata->ldo10; 786 reg_devs[12].pdata_size = sizeof(struct regulator_init_data); 787 } 788 if (pdata->ldo11) { 789 reg_devs[13].platform_data = pdata->ldo11; 790 reg_devs[13].pdata_size = sizeof(struct regulator_init_data); 791 } 792 if (pdata->ldo12) { 793 reg_devs[14].platform_data = pdata->ldo12; 794 reg_devs[14].pdata_size = sizeof(struct regulator_init_data); 795 } 796 if (pdata->ldo13) { 797 reg_devs[15].platform_data = pdata->ldo13; 798 reg_devs[15].pdata_size = sizeof(struct regulator_init_data); 799 } 800 if (pdata->ldo14) { 801 reg_devs[16].platform_data = pdata->ldo14; 802 reg_devs[16].pdata_size = sizeof(struct regulator_init_data); 803 } 804 if (pdata->ldo15) { 805 reg_devs[17].platform_data = pdata->ldo15; 806 reg_devs[17].pdata_size = sizeof(struct regulator_init_data); 807 } 808 if (pdata->ldo16) { 809 reg_devs[18].platform_data = pdata->ldo16; 810 reg_devs[18].pdata_size = sizeof(struct regulator_init_data); 811 } 812 if (pdata->ldo17) { 813 reg_devs[19].platform_data = pdata->ldo17; 814 reg_devs[19].pdata_size = sizeof(struct regulator_init_data); 815 } 816 if (pdata->ldo18) { 817 reg_devs[20].platform_data = pdata->ldo18; 818 reg_devs[20].pdata_size = sizeof(struct regulator_init_data); 819 } 820 if (pdata->ldo19) { 821 reg_devs[21].platform_data = pdata->ldo19; 822 reg_devs[21].pdata_size = sizeof(struct regulator_init_data); 823 } 824 if (pdata->ldo20) { 825 reg_devs[22].platform_data = pdata->ldo20; 826 reg_devs[22].pdata_size = sizeof(struct regulator_init_data); 827 } 828 ret = mfd_add_devices(chip->dev, 0, reg_devs, ARRAY_SIZE(reg_devs), 829 NULL, 0, NULL); 830 if (ret < 0) { 831 dev_err(chip->dev, "Failed to add regulator subdev\n"); 832 return; 833 } 834 } 835 836 int max8925_device_init(struct max8925_chip *chip, 837 struct max8925_platform_data *pdata) 838 { 839 int ret; 840 841 max8925_irq_init(chip, chip->i2c->irq, pdata); 842 843 if (pdata && (pdata->power || pdata->touch)) { 844 /* enable ADC to control internal reference */ 845 max8925_set_bits(chip->i2c, MAX8925_RESET_CNFG, 1, 1); 846 /* enable internal reference for ADC */ 847 max8925_set_bits(chip->adc, MAX8925_TSC_CNFG1, 3, 2); 848 /* check for internal reference IRQ */ 849 do { 850 ret = max8925_reg_read(chip->adc, MAX8925_TSC_IRQ); 851 } while (ret & MAX8925_NREF_OK); 852 /* enaable ADC scheduler, interval is 1 second */ 853 max8925_set_bits(chip->adc, MAX8925_ADC_SCHED, 3, 2); 854 } 855 856 /* enable Momentary Power Loss */ 857 max8925_set_bits(chip->rtc, MAX8925_MPL_CNTL, 1 << 4, 1 << 4); 858 859 ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0], 860 ARRAY_SIZE(rtc_devs), 861 NULL, chip->irq_base, NULL); 862 if (ret < 0) { 863 dev_err(chip->dev, "Failed to add rtc subdev\n"); 864 goto out; 865 } 866 867 ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0], 868 ARRAY_SIZE(onkey_devs), 869 NULL, chip->irq_base, NULL); 870 if (ret < 0) { 871 dev_err(chip->dev, "Failed to add onkey subdev\n"); 872 goto out_dev; 873 } 874 875 init_regulator(chip, pdata); 876 877 if (pdata && pdata->backlight) { 878 bk_devs[0].platform_data = &pdata->backlight; 879 bk_devs[0].pdata_size = sizeof(struct max8925_backlight_pdata); 880 } 881 ret = mfd_add_devices(chip->dev, 0, bk_devs, ARRAY_SIZE(bk_devs), 882 NULL, 0, NULL); 883 if (ret < 0) { 884 dev_err(chip->dev, "Failed to add backlight subdev\n"); 885 goto out_dev; 886 } 887 888 ret = mfd_add_devices(chip->dev, 0, &power_devs[0], 889 ARRAY_SIZE(power_devs), 890 NULL, 0, NULL); 891 if (ret < 0) { 892 dev_err(chip->dev, 893 "Failed to add power supply subdev, err = %d\n", ret); 894 goto out_dev; 895 } 896 897 if (pdata && pdata->touch) { 898 ret = mfd_add_devices(chip->dev, 0, &touch_devs[0], 899 ARRAY_SIZE(touch_devs), 900 NULL, chip->tsc_irq, NULL); 901 if (ret < 0) { 902 dev_err(chip->dev, "Failed to add touch subdev\n"); 903 goto out_dev; 904 } 905 } 906 907 return 0; 908 out_dev: 909 mfd_remove_devices(chip->dev); 910 out: 911 return ret; 912 } 913 914 void max8925_device_exit(struct max8925_chip *chip) 915 { 916 if (chip->core_irq) 917 free_irq(chip->core_irq, chip); 918 if (chip->tsc_irq) 919 free_irq(chip->tsc_irq, chip); 920 mfd_remove_devices(chip->dev); 921 } 922 923 924 MODULE_DESCRIPTION("PMIC Driver for Maxim MAX8925"); 925 MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com"); 926 MODULE_LICENSE("GPL"); 927