1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Lochnagar I2C bus interface 4 * 5 * Copyright (c) 2012-2018 Cirrus Logic, Inc. and 6 * Cirrus Logic International Semiconductor Ltd. 7 * 8 * Author: Charles Keepax <ckeepax@opensource.cirrus.com> 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/device.h> 13 #include <linux/err.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/i2c.h> 16 #include <linux/lockdep.h> 17 #include <linux/mfd/core.h> 18 #include <linux/mutex.h> 19 #include <linux/of_platform.h> 20 #include <linux/regmap.h> 21 22 #include <linux/mfd/lochnagar.h> 23 #include <linux/mfd/lochnagar1_regs.h> 24 #include <linux/mfd/lochnagar2_regs.h> 25 26 #define LOCHNAGAR_BOOT_RETRIES 10 27 #define LOCHNAGAR_BOOT_DELAY_MS 350 28 29 #define LOCHNAGAR_CONFIG_POLL_US 10000 30 31 static bool lochnagar1_readable_register(struct device *dev, unsigned int reg) 32 { 33 switch (reg) { 34 case LOCHNAGAR_SOFTWARE_RESET: 35 case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2: 36 case LOCHNAGAR1_CDC_AIF1_SEL...LOCHNAGAR1_CDC_AIF3_SEL: 37 case LOCHNAGAR1_CDC_MCLK1_SEL...LOCHNAGAR1_CDC_MCLK2_SEL: 38 case LOCHNAGAR1_CDC_AIF_CTRL1...LOCHNAGAR1_CDC_AIF_CTRL2: 39 case LOCHNAGAR1_EXT_AIF_CTRL: 40 case LOCHNAGAR1_DSP_AIF1_SEL...LOCHNAGAR1_DSP_AIF2_SEL: 41 case LOCHNAGAR1_DSP_CLKIN_SEL: 42 case LOCHNAGAR1_DSP_AIF: 43 case LOCHNAGAR1_GF_AIF1...LOCHNAGAR1_GF_AIF2: 44 case LOCHNAGAR1_PSIA_AIF: 45 case LOCHNAGAR1_PSIA1_SEL...LOCHNAGAR1_PSIA2_SEL: 46 case LOCHNAGAR1_SPDIF_AIF_SEL: 47 case LOCHNAGAR1_GF_AIF3_SEL...LOCHNAGAR1_GF_AIF4_SEL: 48 case LOCHNAGAR1_GF_CLKOUT1_SEL: 49 case LOCHNAGAR1_GF_AIF1_SEL...LOCHNAGAR1_GF_AIF2_SEL: 50 case LOCHNAGAR1_GF_GPIO2...LOCHNAGAR1_GF_GPIO7: 51 case LOCHNAGAR1_RST: 52 case LOCHNAGAR1_LED1...LOCHNAGAR1_LED2: 53 case LOCHNAGAR1_I2C_CTRL: 54 return true; 55 default: 56 return false; 57 } 58 } 59 60 static const struct regmap_config lochnagar1_i2c_regmap = { 61 .reg_bits = 8, 62 .val_bits = 8, 63 .reg_format_endian = REGMAP_ENDIAN_BIG, 64 .val_format_endian = REGMAP_ENDIAN_BIG, 65 66 .max_register = 0x50, 67 .readable_reg = lochnagar1_readable_register, 68 69 .use_single_read = true, 70 .use_single_write = true, 71 72 .cache_type = REGCACHE_MAPLE, 73 }; 74 75 static const struct reg_sequence lochnagar1_patch[] = { 76 { 0x40, 0x0083 }, 77 { 0x47, 0x0018 }, 78 { 0x50, 0x0000 }, 79 }; 80 81 static bool lochnagar2_readable_register(struct device *dev, unsigned int reg) 82 { 83 switch (reg) { 84 case LOCHNAGAR_SOFTWARE_RESET: 85 case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2: 86 case LOCHNAGAR2_CDC_AIF1_CTRL...LOCHNAGAR2_CDC_AIF3_CTRL: 87 case LOCHNAGAR2_DSP_AIF1_CTRL...LOCHNAGAR2_DSP_AIF2_CTRL: 88 case LOCHNAGAR2_PSIA1_CTRL...LOCHNAGAR2_PSIA2_CTRL: 89 case LOCHNAGAR2_GF_AIF3_CTRL...LOCHNAGAR2_GF_AIF4_CTRL: 90 case LOCHNAGAR2_GF_AIF1_CTRL...LOCHNAGAR2_GF_AIF2_CTRL: 91 case LOCHNAGAR2_SPDIF_AIF_CTRL: 92 case LOCHNAGAR2_USB_AIF1_CTRL...LOCHNAGAR2_USB_AIF2_CTRL: 93 case LOCHNAGAR2_ADAT_AIF_CTRL: 94 case LOCHNAGAR2_CDC_MCLK1_CTRL...LOCHNAGAR2_CDC_MCLK2_CTRL: 95 case LOCHNAGAR2_DSP_CLKIN_CTRL: 96 case LOCHNAGAR2_PSIA1_MCLK_CTRL...LOCHNAGAR2_PSIA2_MCLK_CTRL: 97 case LOCHNAGAR2_SPDIF_MCLK_CTRL: 98 case LOCHNAGAR2_GF_CLKOUT1_CTRL...LOCHNAGAR2_GF_CLKOUT2_CTRL: 99 case LOCHNAGAR2_ADAT_MCLK_CTRL: 100 case LOCHNAGAR2_SOUNDCARD_MCLK_CTRL: 101 case LOCHNAGAR2_GPIO_FPGA_GPIO1...LOCHNAGAR2_GPIO_FPGA_GPIO6: 102 case LOCHNAGAR2_GPIO_CDC_GPIO1...LOCHNAGAR2_GPIO_CDC_GPIO8: 103 case LOCHNAGAR2_GPIO_DSP_GPIO1...LOCHNAGAR2_GPIO_DSP_GPIO6: 104 case LOCHNAGAR2_GPIO_GF_GPIO2...LOCHNAGAR2_GPIO_GF_GPIO7: 105 case LOCHNAGAR2_GPIO_CDC_AIF1_BCLK...LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT: 106 case LOCHNAGAR2_GPIO_DSP_AIF1_BCLK...LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT: 107 case LOCHNAGAR2_GPIO_PSIA1_BCLK...LOCHNAGAR2_GPIO_PSIA2_TXDAT: 108 case LOCHNAGAR2_GPIO_GF_AIF3_BCLK...LOCHNAGAR2_GPIO_GF_AIF4_TXDAT: 109 case LOCHNAGAR2_GPIO_GF_AIF1_BCLK...LOCHNAGAR2_GPIO_GF_AIF2_TXDAT: 110 case LOCHNAGAR2_GPIO_DSP_UART1_RX...LOCHNAGAR2_GPIO_DSP_UART2_TX: 111 case LOCHNAGAR2_GPIO_GF_UART2_RX...LOCHNAGAR2_GPIO_GF_UART2_TX: 112 case LOCHNAGAR2_GPIO_USB_UART_RX: 113 case LOCHNAGAR2_GPIO_CDC_PDMCLK1...LOCHNAGAR2_GPIO_CDC_PDMDAT2: 114 case LOCHNAGAR2_GPIO_CDC_DMICCLK1...LOCHNAGAR2_GPIO_CDC_DMICDAT4: 115 case LOCHNAGAR2_GPIO_DSP_DMICCLK1...LOCHNAGAR2_GPIO_DSP_DMICDAT2: 116 case LOCHNAGAR2_GPIO_I2C2_SCL...LOCHNAGAR2_GPIO_I2C4_SDA: 117 case LOCHNAGAR2_GPIO_DSP_STANDBY: 118 case LOCHNAGAR2_GPIO_CDC_MCLK1...LOCHNAGAR2_GPIO_CDC_MCLK2: 119 case LOCHNAGAR2_GPIO_DSP_CLKIN: 120 case LOCHNAGAR2_GPIO_PSIA1_MCLK...LOCHNAGAR2_GPIO_PSIA2_MCLK: 121 case LOCHNAGAR2_GPIO_GF_GPIO1...LOCHNAGAR2_GPIO_GF_GPIO5: 122 case LOCHNAGAR2_GPIO_DSP_GPIO20: 123 case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16: 124 case LOCHNAGAR2_MINICARD_RESETS: 125 case LOCHNAGAR2_ANALOGUE_PATH_CTRL1...LOCHNAGAR2_ANALOGUE_PATH_CTRL2: 126 case LOCHNAGAR2_COMMS_CTRL4: 127 case LOCHNAGAR2_SPDIF_CTRL: 128 case LOCHNAGAR2_IMON_CTRL1...LOCHNAGAR2_IMON_CTRL4: 129 case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2: 130 case LOCHNAGAR2_POWER_CTRL: 131 case LOCHNAGAR2_MICVDD_CTRL1: 132 case LOCHNAGAR2_MICVDD_CTRL2: 133 case LOCHNAGAR2_VDDCORE_CDC_CTRL1: 134 case LOCHNAGAR2_VDDCORE_CDC_CTRL2: 135 case LOCHNAGAR2_SOUNDCARD_AIF_CTRL: 136 return true; 137 default: 138 return false; 139 } 140 } 141 142 static bool lochnagar2_volatile_register(struct device *dev, unsigned int reg) 143 { 144 switch (reg) { 145 case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16: 146 case LOCHNAGAR2_ANALOGUE_PATH_CTRL1: 147 case LOCHNAGAR2_IMON_CTRL3...LOCHNAGAR2_IMON_CTRL4: 148 case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2: 149 return true; 150 default: 151 return false; 152 } 153 } 154 155 static const struct regmap_config lochnagar2_i2c_regmap = { 156 .reg_bits = 16, 157 .val_bits = 16, 158 .reg_format_endian = REGMAP_ENDIAN_BIG, 159 .val_format_endian = REGMAP_ENDIAN_BIG, 160 161 .max_register = 0x1F1F, 162 .readable_reg = lochnagar2_readable_register, 163 .volatile_reg = lochnagar2_volatile_register, 164 165 .cache_type = REGCACHE_MAPLE, 166 }; 167 168 static const struct reg_sequence lochnagar2_patch[] = { 169 { 0x00EE, 0x0000 }, 170 }; 171 172 struct lochnagar_config { 173 int id; 174 const char * const name; 175 enum lochnagar_type type; 176 const struct regmap_config *regmap; 177 const struct reg_sequence *patch; 178 int npatch; 179 }; 180 181 static struct lochnagar_config lochnagar_configs[] = { 182 { 183 .id = 0x50, 184 .name = "lochnagar1", 185 .type = LOCHNAGAR1, 186 .regmap = &lochnagar1_i2c_regmap, 187 .patch = lochnagar1_patch, 188 .npatch = ARRAY_SIZE(lochnagar1_patch), 189 }, 190 { 191 .id = 0xCB58, 192 .name = "lochnagar2", 193 .type = LOCHNAGAR2, 194 .regmap = &lochnagar2_i2c_regmap, 195 .patch = lochnagar2_patch, 196 .npatch = ARRAY_SIZE(lochnagar2_patch), 197 }, 198 }; 199 200 static const struct of_device_id lochnagar_of_match[] = { 201 { .compatible = "cirrus,lochnagar1", .data = &lochnagar_configs[0] }, 202 { .compatible = "cirrus,lochnagar2", .data = &lochnagar_configs[1] }, 203 {}, 204 }; 205 206 static int lochnagar_wait_for_boot(struct regmap *regmap, unsigned int *id) 207 { 208 int i, ret; 209 210 for (i = 0; i < LOCHNAGAR_BOOT_RETRIES; ++i) { 211 msleep(LOCHNAGAR_BOOT_DELAY_MS); 212 213 /* The reset register will return the device ID when read */ 214 ret = regmap_read(regmap, LOCHNAGAR_SOFTWARE_RESET, id); 215 if (!ret) 216 return ret; 217 } 218 219 return -ETIMEDOUT; 220 } 221 222 /** 223 * lochnagar_update_config - Synchronise the boards analogue configuration to 224 * the hardware. 225 * 226 * @lochnagar: A pointer to the primary core data structure. 227 * 228 * Return: Zero on success or an appropriate negative error code on failure. 229 */ 230 int lochnagar_update_config(struct lochnagar *lochnagar) 231 { 232 struct regmap *regmap = lochnagar->regmap; 233 unsigned int done = LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_MASK; 234 int timeout_ms = LOCHNAGAR_BOOT_DELAY_MS * LOCHNAGAR_BOOT_RETRIES; 235 unsigned int val = 0; 236 int ret; 237 238 lockdep_assert_held(&lochnagar->analogue_config_lock); 239 240 if (lochnagar->type != LOCHNAGAR2) 241 return 0; 242 243 /* 244 * Toggle the ANALOGUE_PATH_UPDATE bit and wait for the device to 245 * acknowledge that any outstanding changes to the analogue 246 * configuration have been applied. 247 */ 248 ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1, 0); 249 if (ret < 0) 250 return ret; 251 252 ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1, 253 LOCHNAGAR2_ANALOGUE_PATH_UPDATE_MASK); 254 if (ret < 0) 255 return ret; 256 257 ret = regmap_read_poll_timeout(regmap, 258 LOCHNAGAR2_ANALOGUE_PATH_CTRL1, val, 259 (val & done), LOCHNAGAR_CONFIG_POLL_US, 260 timeout_ms * 1000); 261 if (ret < 0) 262 return ret; 263 264 return 0; 265 } 266 EXPORT_SYMBOL_GPL(lochnagar_update_config); 267 268 static int lochnagar_i2c_probe(struct i2c_client *i2c) 269 { 270 struct device *dev = &i2c->dev; 271 const struct lochnagar_config *config = NULL; 272 struct lochnagar *lochnagar; 273 struct gpio_desc *reset, *present; 274 unsigned int val; 275 unsigned int firmwareid; 276 unsigned int devid, rev; 277 int ret; 278 279 lochnagar = devm_kzalloc(dev, sizeof(*lochnagar), GFP_KERNEL); 280 if (!lochnagar) 281 return -ENOMEM; 282 283 config = i2c_get_match_data(i2c); 284 285 lochnagar->dev = dev; 286 mutex_init(&lochnagar->analogue_config_lock); 287 288 dev_set_drvdata(dev, lochnagar); 289 290 reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); 291 if (IS_ERR(reset)) { 292 ret = PTR_ERR(reset); 293 dev_err(dev, "Failed to get reset GPIO: %d\n", ret); 294 return ret; 295 } 296 297 present = devm_gpiod_get_optional(dev, "present", GPIOD_OUT_HIGH); 298 if (IS_ERR(present)) { 299 ret = PTR_ERR(present); 300 dev_err(dev, "Failed to get present GPIO: %d\n", ret); 301 return ret; 302 } 303 304 /* Leave the Lochnagar in reset for a reasonable amount of time */ 305 msleep(20); 306 307 /* Bring Lochnagar out of reset */ 308 gpiod_set_value_cansleep(reset, 1); 309 310 /* Identify Lochnagar */ 311 lochnagar->type = config->type; 312 313 lochnagar->regmap = devm_regmap_init_i2c(i2c, config->regmap); 314 if (IS_ERR(lochnagar->regmap)) { 315 ret = PTR_ERR(lochnagar->regmap); 316 dev_err(dev, "Failed to allocate register map: %d\n", ret); 317 return ret; 318 } 319 320 /* Wait for Lochnagar to boot */ 321 ret = lochnagar_wait_for_boot(lochnagar->regmap, &val); 322 if (ret < 0) { 323 dev_err(dev, "Failed to read device ID: %d\n", ret); 324 return ret; 325 } 326 327 devid = val & LOCHNAGAR_DEVICE_ID_MASK; 328 rev = val & LOCHNAGAR_REV_ID_MASK; 329 330 if (devid != config->id) { 331 dev_err(dev, 332 "ID does not match %s (expected 0x%x got 0x%x)\n", 333 config->name, config->id, devid); 334 return -ENODEV; 335 } 336 337 /* Identify firmware */ 338 ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID1, &val); 339 if (ret < 0) { 340 dev_err(dev, "Failed to read firmware id 1: %d\n", ret); 341 return ret; 342 } 343 344 firmwareid = val; 345 346 ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID2, &val); 347 if (ret < 0) { 348 dev_err(dev, "Failed to read firmware id 2: %d\n", ret); 349 return ret; 350 } 351 352 firmwareid |= (val << config->regmap->val_bits); 353 354 dev_info(dev, "Found %s (0x%x) revision %u firmware 0x%.6x\n", 355 config->name, devid, rev + 1, firmwareid); 356 357 ret = regmap_register_patch(lochnagar->regmap, config->patch, 358 config->npatch); 359 if (ret < 0) { 360 dev_err(dev, "Failed to register patch: %d\n", ret); 361 return ret; 362 } 363 364 ret = devm_of_platform_populate(dev); 365 if (ret < 0) { 366 dev_err(dev, "Failed to populate child nodes: %d\n", ret); 367 return ret; 368 } 369 370 return ret; 371 } 372 373 static struct i2c_driver lochnagar_i2c_driver = { 374 .driver = { 375 .name = "lochnagar", 376 .of_match_table = lochnagar_of_match, 377 .suppress_bind_attrs = true, 378 }, 379 .probe = lochnagar_i2c_probe, 380 }; 381 382 static int __init lochnagar_i2c_init(void) 383 { 384 int ret; 385 386 ret = i2c_add_driver(&lochnagar_i2c_driver); 387 if (ret) 388 pr_err("Failed to register Lochnagar driver: %d\n", ret); 389 390 return ret; 391 } 392 subsys_initcall(lochnagar_i2c_init); 393