xref: /linux/drivers/mfd/bd9571mwv.c (revision e9f0878c4b2004ac19581274c1ae4c61ae3ca70e)
1 /*
2  * ROHM BD9571MWV-M MFD driver
3  *
4  * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether expressed or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License version 2 for more details.
14  *
15  * Based on the TPS65086 driver
16  */
17 
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/mfd/core.h>
21 #include <linux/module.h>
22 
23 #include <linux/mfd/bd9571mwv.h>
24 
25 static const struct mfd_cell bd9571mwv_cells[] = {
26 	{ .name = "bd9571mwv-regulator", },
27 	{ .name = "bd9571mwv-gpio", },
28 };
29 
30 static const struct regmap_range bd9571mwv_readable_yes_ranges[] = {
31 	regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
32 	regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
33 	regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)),
34 	regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID),
35 	regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT),
36 	regmap_reg_range(BD9571MWV_DVFS_SETVMAX, BD9571MWV_DVFS_MONIVDAC),
37 	regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
38 	regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK),
39 	regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
40 };
41 
42 static const struct regmap_access_table bd9571mwv_readable_table = {
43 	.yes_ranges	= bd9571mwv_readable_yes_ranges,
44 	.n_yes_ranges	= ARRAY_SIZE(bd9571mwv_readable_yes_ranges),
45 };
46 
47 static const struct regmap_range bd9571mwv_writable_yes_ranges[] = {
48 	regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
49 	regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)),
50 	regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
51 	regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
52 	regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK),
53 	regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK),
54 };
55 
56 static const struct regmap_access_table bd9571mwv_writable_table = {
57 	.yes_ranges	= bd9571mwv_writable_yes_ranges,
58 	.n_yes_ranges	= ARRAY_SIZE(bd9571mwv_writable_yes_ranges),
59 };
60 
61 static const struct regmap_range bd9571mwv_volatile_yes_ranges[] = {
62 	regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN),
63 	regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT),
64 	regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ),
65 };
66 
67 static const struct regmap_access_table bd9571mwv_volatile_table = {
68 	.yes_ranges	= bd9571mwv_volatile_yes_ranges,
69 	.n_yes_ranges	= ARRAY_SIZE(bd9571mwv_volatile_yes_ranges),
70 };
71 
72 static const struct regmap_config bd9571mwv_regmap_config = {
73 	.reg_bits	= 8,
74 	.val_bits	= 8,
75 	.cache_type	= REGCACHE_RBTREE,
76 	.rd_table	= &bd9571mwv_readable_table,
77 	.wr_table	= &bd9571mwv_writable_table,
78 	.volatile_table	= &bd9571mwv_volatile_table,
79 	.max_register	= 0xff,
80 };
81 
82 static const struct regmap_irq bd9571mwv_irqs[] = {
83 	REGMAP_IRQ_REG(BD9571MWV_IRQ_MD1, 0,
84 		       BD9571MWV_INT_INTREQ_MD1_INT),
85 	REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E1, 0,
86 		       BD9571MWV_INT_INTREQ_MD2_E1_INT),
87 	REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E2, 0,
88 		       BD9571MWV_INT_INTREQ_MD2_E2_INT),
89 	REGMAP_IRQ_REG(BD9571MWV_IRQ_PROT_ERR, 0,
90 		       BD9571MWV_INT_INTREQ_PROT_ERR_INT),
91 	REGMAP_IRQ_REG(BD9571MWV_IRQ_GP, 0,
92 		       BD9571MWV_INT_INTREQ_GP_INT),
93 	REGMAP_IRQ_REG(BD9571MWV_IRQ_128H_OF, 0,
94 		       BD9571MWV_INT_INTREQ_128H_OF_INT),
95 	REGMAP_IRQ_REG(BD9571MWV_IRQ_WDT_OF, 0,
96 		       BD9571MWV_INT_INTREQ_WDT_OF_INT),
97 	REGMAP_IRQ_REG(BD9571MWV_IRQ_BKUP_TRG, 0,
98 		       BD9571MWV_INT_INTREQ_BKUP_TRG_INT),
99 };
100 
101 static struct regmap_irq_chip bd9571mwv_irq_chip = {
102 	.name		= "bd9571mwv",
103 	.status_base	= BD9571MWV_INT_INTREQ,
104 	.mask_base	= BD9571MWV_INT_INTMASK,
105 	.ack_base	= BD9571MWV_INT_INTREQ,
106 	.init_ack_masked = true,
107 	.num_regs	= 1,
108 	.irqs		= bd9571mwv_irqs,
109 	.num_irqs	= ARRAY_SIZE(bd9571mwv_irqs),
110 };
111 
112 static int bd9571mwv_identify(struct bd9571mwv *bd)
113 {
114 	struct device *dev = bd->dev;
115 	unsigned int value;
116 	int ret;
117 
118 	ret = regmap_read(bd->regmap, BD9571MWV_VENDOR_CODE, &value);
119 	if (ret) {
120 		dev_err(dev, "Failed to read vendor code register (ret=%i)\n",
121 			ret);
122 		return ret;
123 	}
124 
125 	if (value != BD9571MWV_VENDOR_CODE_VAL) {
126 		dev_err(dev, "Invalid vendor code ID %02x (expected %02x)\n",
127 			value, BD9571MWV_VENDOR_CODE_VAL);
128 		return -EINVAL;
129 	}
130 
131 	ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_CODE, &value);
132 	if (ret) {
133 		dev_err(dev, "Failed to read product code register (ret=%i)\n",
134 			ret);
135 		return ret;
136 	}
137 
138 	if (value != BD9571MWV_PRODUCT_CODE_VAL) {
139 		dev_err(dev, "Invalid product code ID %02x (expected %02x)\n",
140 			value, BD9571MWV_PRODUCT_CODE_VAL);
141 		return -EINVAL;
142 	}
143 
144 	ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_REVISION, &value);
145 	if (ret) {
146 		dev_err(dev, "Failed to read revision register (ret=%i)\n",
147 			ret);
148 		return ret;
149 	}
150 
151 	dev_info(dev, "Device: BD9571MWV rev. %d\n", value & 0xff);
152 
153 	return 0;
154 }
155 
156 static int bd9571mwv_probe(struct i2c_client *client,
157 			  const struct i2c_device_id *ids)
158 {
159 	struct bd9571mwv *bd;
160 	int ret;
161 
162 	bd = devm_kzalloc(&client->dev, sizeof(*bd), GFP_KERNEL);
163 	if (!bd)
164 		return -ENOMEM;
165 
166 	i2c_set_clientdata(client, bd);
167 	bd->dev = &client->dev;
168 	bd->irq = client->irq;
169 
170 	bd->regmap = devm_regmap_init_i2c(client, &bd9571mwv_regmap_config);
171 	if (IS_ERR(bd->regmap)) {
172 		dev_err(bd->dev, "Failed to initialize register map\n");
173 		return PTR_ERR(bd->regmap);
174 	}
175 
176 	ret = bd9571mwv_identify(bd);
177 	if (ret)
178 		return ret;
179 
180 	ret = regmap_add_irq_chip(bd->regmap, bd->irq, IRQF_ONESHOT, 0,
181 				  &bd9571mwv_irq_chip, &bd->irq_data);
182 	if (ret) {
183 		dev_err(bd->dev, "Failed to register IRQ chip\n");
184 		return ret;
185 	}
186 
187 	ret = mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO, bd9571mwv_cells,
188 			      ARRAY_SIZE(bd9571mwv_cells), NULL, 0,
189 			      regmap_irq_get_domain(bd->irq_data));
190 	if (ret) {
191 		regmap_del_irq_chip(bd->irq, bd->irq_data);
192 		return ret;
193 	}
194 
195 	return 0;
196 }
197 
198 static int bd9571mwv_remove(struct i2c_client *client)
199 {
200 	struct bd9571mwv *bd = i2c_get_clientdata(client);
201 
202 	regmap_del_irq_chip(bd->irq, bd->irq_data);
203 
204 	return 0;
205 }
206 
207 static const struct of_device_id bd9571mwv_of_match_table[] = {
208 	{ .compatible = "rohm,bd9571mwv", },
209 	{ /* sentinel */ }
210 };
211 MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table);
212 
213 static const struct i2c_device_id bd9571mwv_id_table[] = {
214 	{ "bd9571mwv", 0 },
215 	{ /* sentinel */ }
216 };
217 MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table);
218 
219 static struct i2c_driver bd9571mwv_driver = {
220 	.driver		= {
221 		.name	= "bd9571mwv",
222 		.of_match_table = bd9571mwv_of_match_table,
223 	},
224 	.probe		= bd9571mwv_probe,
225 	.remove		= bd9571mwv_remove,
226 	.id_table       = bd9571mwv_id_table,
227 };
228 module_i2c_driver(bd9571mwv_driver);
229 
230 MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>");
231 MODULE_DESCRIPTION("BD9571MWV PMIC Driver");
232 MODULE_LICENSE("GPL v2");
233