1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MFD core driver for the X-Powers' Power Management ICs 4 * 5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 7 * as well as configurable GPIOs. 8 * 9 * This file contains the interface independent core functions. 10 * 11 * Copyright (C) 2014 Carlo Caione 12 * 13 * Author: Carlo Caione <carlo@caione.org> 14 */ 15 16 #include <linux/acpi.h> 17 #include <linux/bitops.h> 18 #include <linux/delay.h> 19 #include <linux/err.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/axp20x.h> 23 #include <linux/mfd/core.h> 24 #include <linux/module.h> 25 #include <linux/of_device.h> 26 #include <linux/reboot.h> 27 #include <linux/regmap.h> 28 #include <linux/regulator/consumer.h> 29 30 #define AXP20X_OFF BIT(7) 31 32 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 33 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 34 35 static const char * const axp20x_model_names[] = { 36 "AXP152", 37 "AXP202", 38 "AXP209", 39 "AXP221", 40 "AXP223", 41 "AXP288", 42 "AXP313a", 43 "AXP803", 44 "AXP806", 45 "AXP809", 46 "AXP813", 47 "AXP15060", 48 }; 49 50 static const struct regmap_range axp152_writeable_ranges[] = { 51 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 52 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 53 }; 54 55 static const struct regmap_range axp152_volatile_ranges[] = { 56 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 57 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 58 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 59 }; 60 61 static const struct regmap_access_table axp152_writeable_table = { 62 .yes_ranges = axp152_writeable_ranges, 63 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 64 }; 65 66 static const struct regmap_access_table axp152_volatile_table = { 67 .yes_ranges = axp152_volatile_ranges, 68 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 69 }; 70 71 static const struct regmap_range axp20x_writeable_ranges[] = { 72 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 73 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 74 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 75 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 76 }; 77 78 static const struct regmap_range axp20x_volatile_ranges[] = { 79 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 80 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 81 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 82 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 83 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 84 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 85 }; 86 87 static const struct regmap_access_table axp20x_writeable_table = { 88 .yes_ranges = axp20x_writeable_ranges, 89 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 90 }; 91 92 static const struct regmap_access_table axp20x_volatile_table = { 93 .yes_ranges = axp20x_volatile_ranges, 94 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 95 }; 96 97 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 98 static const struct regmap_range axp22x_writeable_ranges[] = { 99 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 100 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 101 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 102 }; 103 104 static const struct regmap_range axp22x_volatile_ranges[] = { 105 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 106 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 107 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 108 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 109 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 110 }; 111 112 static const struct regmap_access_table axp22x_writeable_table = { 113 .yes_ranges = axp22x_writeable_ranges, 114 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 115 }; 116 117 static const struct regmap_access_table axp22x_volatile_table = { 118 .yes_ranges = axp22x_volatile_ranges, 119 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 120 }; 121 122 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 123 static const struct regmap_range axp288_writeable_ranges[] = { 124 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON), 125 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 126 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 127 }; 128 129 static const struct regmap_range axp288_volatile_ranges[] = { 130 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 131 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT), 132 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 133 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT), 134 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 135 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 136 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 137 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE), 138 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 139 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 140 }; 141 142 static const struct regmap_access_table axp288_writeable_table = { 143 .yes_ranges = axp288_writeable_ranges, 144 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 145 }; 146 147 static const struct regmap_access_table axp288_volatile_table = { 148 .yes_ranges = axp288_volatile_ranges, 149 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 150 }; 151 152 static const struct regmap_range axp806_writeable_ranges[] = { 153 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 154 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 155 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 156 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 157 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 158 }; 159 160 static const struct regmap_range axp313a_writeable_ranges[] = { 161 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE), 162 }; 163 164 static const struct regmap_range axp313a_volatile_ranges[] = { 165 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL), 166 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE), 167 }; 168 169 static const struct regmap_access_table axp313a_writeable_table = { 170 .yes_ranges = axp313a_writeable_ranges, 171 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges), 172 }; 173 174 static const struct regmap_access_table axp313a_volatile_table = { 175 .yes_ranges = axp313a_volatile_ranges, 176 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges), 177 }; 178 179 static const struct regmap_range axp806_volatile_ranges[] = { 180 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 181 }; 182 183 static const struct regmap_access_table axp806_writeable_table = { 184 .yes_ranges = axp806_writeable_ranges, 185 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 186 }; 187 188 static const struct regmap_access_table axp806_volatile_table = { 189 .yes_ranges = axp806_volatile_ranges, 190 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 191 }; 192 193 static const struct regmap_range axp15060_writeable_ranges[] = { 194 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2), 195 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL), 196 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 197 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY), 198 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN), 199 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 200 }; 201 202 static const struct regmap_range axp15060_volatile_ranges[] = { 203 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC), 204 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 205 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 206 }; 207 208 static const struct regmap_access_table axp15060_writeable_table = { 209 .yes_ranges = axp15060_writeable_ranges, 210 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges), 211 }; 212 213 static const struct regmap_access_table axp15060_volatile_table = { 214 .yes_ranges = axp15060_volatile_ranges, 215 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges), 216 }; 217 218 static const struct resource axp152_pek_resources[] = { 219 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 220 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 221 }; 222 223 static const struct resource axp20x_ac_power_supply_resources[] = { 224 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 225 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 226 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 227 }; 228 229 static const struct resource axp20x_pek_resources[] = { 230 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 231 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 232 }; 233 234 static const struct resource axp20x_usb_power_supply_resources[] = { 235 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 236 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 237 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 238 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 239 }; 240 241 static const struct resource axp22x_usb_power_supply_resources[] = { 242 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 243 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 244 }; 245 246 /* AXP803 and AXP813/AXP818 share the same interrupts */ 247 static const struct resource axp803_usb_power_supply_resources[] = { 248 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 249 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 250 }; 251 252 static const struct resource axp22x_pek_resources[] = { 253 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 254 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 255 }; 256 257 static const struct resource axp288_power_button_resources[] = { 258 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 259 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 260 }; 261 262 static const struct resource axp288_fuel_gauge_resources[] = { 263 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 264 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 265 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 266 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 267 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 268 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 269 }; 270 271 static const struct resource axp313a_pek_resources[] = { 272 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 273 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 274 }; 275 276 static const struct resource axp803_pek_resources[] = { 277 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 278 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 279 }; 280 281 static const struct resource axp806_pek_resources[] = { 282 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 283 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 284 }; 285 286 static const struct resource axp809_pek_resources[] = { 287 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 288 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 289 }; 290 291 static const struct resource axp15060_pek_resources[] = { 292 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 293 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 294 }; 295 296 static const struct regmap_config axp152_regmap_config = { 297 .reg_bits = 8, 298 .val_bits = 8, 299 .wr_table = &axp152_writeable_table, 300 .volatile_table = &axp152_volatile_table, 301 .max_register = AXP152_PWM1_DUTY_CYCLE, 302 .cache_type = REGCACHE_RBTREE, 303 }; 304 305 static const struct regmap_config axp20x_regmap_config = { 306 .reg_bits = 8, 307 .val_bits = 8, 308 .wr_table = &axp20x_writeable_table, 309 .volatile_table = &axp20x_volatile_table, 310 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 311 .cache_type = REGCACHE_RBTREE, 312 }; 313 314 static const struct regmap_config axp22x_regmap_config = { 315 .reg_bits = 8, 316 .val_bits = 8, 317 .wr_table = &axp22x_writeable_table, 318 .volatile_table = &axp22x_volatile_table, 319 .max_register = AXP22X_BATLOW_THRES1, 320 .cache_type = REGCACHE_RBTREE, 321 }; 322 323 static const struct regmap_config axp288_regmap_config = { 324 .reg_bits = 8, 325 .val_bits = 8, 326 .wr_table = &axp288_writeable_table, 327 .volatile_table = &axp288_volatile_table, 328 .max_register = AXP288_FG_TUNE5, 329 .cache_type = REGCACHE_RBTREE, 330 }; 331 332 static const struct regmap_config axp313a_regmap_config = { 333 .reg_bits = 8, 334 .val_bits = 8, 335 .wr_table = &axp313a_writeable_table, 336 .volatile_table = &axp313a_volatile_table, 337 .max_register = AXP313A_IRQ_STATE, 338 .cache_type = REGCACHE_RBTREE, 339 }; 340 341 static const struct regmap_config axp806_regmap_config = { 342 .reg_bits = 8, 343 .val_bits = 8, 344 .wr_table = &axp806_writeable_table, 345 .volatile_table = &axp806_volatile_table, 346 .max_register = AXP806_REG_ADDR_EXT, 347 .cache_type = REGCACHE_RBTREE, 348 }; 349 350 static const struct regmap_config axp15060_regmap_config = { 351 .reg_bits = 8, 352 .val_bits = 8, 353 .wr_table = &axp15060_writeable_table, 354 .volatile_table = &axp15060_volatile_table, 355 .max_register = AXP15060_IRQ2_STATE, 356 .cache_type = REGCACHE_RBTREE, 357 }; 358 359 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 360 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 361 362 static const struct regmap_irq axp152_regmap_irqs[] = { 363 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 364 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 365 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 366 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 367 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 368 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 369 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 370 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 371 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 372 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 373 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 374 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 375 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 376 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 377 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 378 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 379 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 380 }; 381 382 static const struct regmap_irq axp20x_regmap_irqs[] = { 383 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 384 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 385 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 386 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 387 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 388 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 389 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 390 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 391 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 392 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 393 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 394 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 395 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 396 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 397 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 398 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 399 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 400 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 401 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 402 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 403 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 404 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 405 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 406 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 407 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 408 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 409 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 410 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 411 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 412 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 413 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 414 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 415 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 416 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 417 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 418 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 419 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 420 }; 421 422 static const struct regmap_irq axp22x_regmap_irqs[] = { 423 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 424 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 425 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 426 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 427 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 428 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 429 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 430 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 431 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 432 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 433 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 434 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 435 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 436 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 437 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 438 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 439 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 440 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 441 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 442 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 443 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 444 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 445 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 446 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 447 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 448 }; 449 450 /* some IRQs are compatible with axp20x models */ 451 static const struct regmap_irq axp288_regmap_irqs[] = { 452 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 453 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 454 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 455 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 456 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 457 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 458 459 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 460 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 461 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 462 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 463 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 464 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 465 466 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 467 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 468 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 469 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 470 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 471 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 472 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 473 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 474 475 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 476 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 477 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 478 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 479 480 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 481 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 482 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 483 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 484 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 485 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 486 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 487 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 488 489 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 490 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 491 }; 492 493 static const struct regmap_irq axp313a_regmap_irqs[] = { 494 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7), 495 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6), 496 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5), 497 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4), 498 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3), 499 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2), 500 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), 501 }; 502 503 static const struct regmap_irq axp803_regmap_irqs[] = { 504 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 505 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 506 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 507 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 508 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 509 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 510 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 511 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 512 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 513 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 514 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 515 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 516 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 517 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 518 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 519 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 520 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 521 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 522 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 523 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 524 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 525 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 526 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 527 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 528 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 529 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 530 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 531 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 532 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 533 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 534 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 535 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 536 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 537 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 538 }; 539 540 static const struct regmap_irq axp806_regmap_irqs[] = { 541 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 542 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 543 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 544 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 545 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 546 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 547 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 548 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 549 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 550 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 551 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 552 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 553 }; 554 555 static const struct regmap_irq axp809_regmap_irqs[] = { 556 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 557 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 558 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 559 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 560 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 561 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 562 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 563 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 564 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 565 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 566 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 567 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 568 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 569 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 570 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 571 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 572 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 573 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 574 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 575 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 576 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 577 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 578 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 579 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 580 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 581 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 582 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 583 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 584 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 585 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 586 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 587 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 588 }; 589 590 static const struct regmap_irq axp15060_regmap_irqs[] = { 591 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0), 592 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1), 593 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2), 594 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3), 595 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4), 596 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5), 597 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6), 598 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7), 599 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0), 600 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1), 601 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2), 602 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3), 603 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4), 604 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5), 605 }; 606 607 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 608 .name = "axp152_irq_chip", 609 .status_base = AXP152_IRQ1_STATE, 610 .ack_base = AXP152_IRQ1_STATE, 611 .unmask_base = AXP152_IRQ1_EN, 612 .init_ack_masked = true, 613 .irqs = axp152_regmap_irqs, 614 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 615 .num_regs = 3, 616 }; 617 618 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 619 .name = "axp20x_irq_chip", 620 .status_base = AXP20X_IRQ1_STATE, 621 .ack_base = AXP20X_IRQ1_STATE, 622 .unmask_base = AXP20X_IRQ1_EN, 623 .init_ack_masked = true, 624 .irqs = axp20x_regmap_irqs, 625 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 626 .num_regs = 5, 627 628 }; 629 630 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 631 .name = "axp22x_irq_chip", 632 .status_base = AXP20X_IRQ1_STATE, 633 .ack_base = AXP20X_IRQ1_STATE, 634 .unmask_base = AXP20X_IRQ1_EN, 635 .init_ack_masked = true, 636 .irqs = axp22x_regmap_irqs, 637 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 638 .num_regs = 5, 639 }; 640 641 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 642 .name = "axp288_irq_chip", 643 .status_base = AXP20X_IRQ1_STATE, 644 .ack_base = AXP20X_IRQ1_STATE, 645 .unmask_base = AXP20X_IRQ1_EN, 646 .init_ack_masked = true, 647 .irqs = axp288_regmap_irqs, 648 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 649 .num_regs = 6, 650 651 }; 652 653 static const struct regmap_irq_chip axp313a_regmap_irq_chip = { 654 .name = "axp313a_irq_chip", 655 .status_base = AXP313A_IRQ_STATE, 656 .ack_base = AXP313A_IRQ_STATE, 657 .unmask_base = AXP313A_IRQ_EN, 658 .init_ack_masked = true, 659 .irqs = axp313a_regmap_irqs, 660 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs), 661 .num_regs = 1, 662 }; 663 664 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 665 .name = "axp803", 666 .status_base = AXP20X_IRQ1_STATE, 667 .ack_base = AXP20X_IRQ1_STATE, 668 .unmask_base = AXP20X_IRQ1_EN, 669 .init_ack_masked = true, 670 .irqs = axp803_regmap_irqs, 671 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 672 .num_regs = 6, 673 }; 674 675 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 676 .name = "axp806", 677 .status_base = AXP20X_IRQ1_STATE, 678 .ack_base = AXP20X_IRQ1_STATE, 679 .unmask_base = AXP20X_IRQ1_EN, 680 .init_ack_masked = true, 681 .irqs = axp806_regmap_irqs, 682 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 683 .num_regs = 2, 684 }; 685 686 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 687 .name = "axp809", 688 .status_base = AXP20X_IRQ1_STATE, 689 .ack_base = AXP20X_IRQ1_STATE, 690 .unmask_base = AXP20X_IRQ1_EN, 691 .init_ack_masked = true, 692 .irqs = axp809_regmap_irqs, 693 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 694 .num_regs = 5, 695 }; 696 697 static const struct regmap_irq_chip axp15060_regmap_irq_chip = { 698 .name = "axp15060", 699 .status_base = AXP15060_IRQ1_STATE, 700 .ack_base = AXP15060_IRQ1_STATE, 701 .unmask_base = AXP15060_IRQ1_EN, 702 .init_ack_masked = true, 703 .irqs = axp15060_regmap_irqs, 704 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs), 705 .num_regs = 2, 706 }; 707 708 static const struct mfd_cell axp20x_cells[] = { 709 { 710 .name = "axp20x-gpio", 711 .of_compatible = "x-powers,axp209-gpio", 712 }, { 713 .name = "axp20x-pek", 714 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 715 .resources = axp20x_pek_resources, 716 }, { 717 .name = "axp20x-regulator", 718 }, { 719 .name = "axp20x-adc", 720 .of_compatible = "x-powers,axp209-adc", 721 }, { 722 .name = "axp20x-battery-power-supply", 723 .of_compatible = "x-powers,axp209-battery-power-supply", 724 }, { 725 .name = "axp20x-ac-power-supply", 726 .of_compatible = "x-powers,axp202-ac-power-supply", 727 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 728 .resources = axp20x_ac_power_supply_resources, 729 }, { 730 .name = "axp20x-usb-power-supply", 731 .of_compatible = "x-powers,axp202-usb-power-supply", 732 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 733 .resources = axp20x_usb_power_supply_resources, 734 }, 735 }; 736 737 static const struct mfd_cell axp221_cells[] = { 738 { 739 .name = "axp20x-gpio", 740 .of_compatible = "x-powers,axp221-gpio", 741 }, { 742 .name = "axp221-pek", 743 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 744 .resources = axp22x_pek_resources, 745 }, { 746 .name = "axp20x-regulator", 747 }, { 748 .name = "axp22x-adc", 749 .of_compatible = "x-powers,axp221-adc", 750 }, { 751 .name = "axp20x-ac-power-supply", 752 .of_compatible = "x-powers,axp221-ac-power-supply", 753 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 754 .resources = axp20x_ac_power_supply_resources, 755 }, { 756 .name = "axp20x-battery-power-supply", 757 .of_compatible = "x-powers,axp221-battery-power-supply", 758 }, { 759 .name = "axp20x-usb-power-supply", 760 .of_compatible = "x-powers,axp221-usb-power-supply", 761 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 762 .resources = axp22x_usb_power_supply_resources, 763 }, 764 }; 765 766 static const struct mfd_cell axp223_cells[] = { 767 { 768 .name = "axp20x-gpio", 769 .of_compatible = "x-powers,axp221-gpio", 770 }, { 771 .name = "axp221-pek", 772 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 773 .resources = axp22x_pek_resources, 774 }, { 775 .name = "axp22x-adc", 776 .of_compatible = "x-powers,axp221-adc", 777 }, { 778 .name = "axp20x-battery-power-supply", 779 .of_compatible = "x-powers,axp221-battery-power-supply", 780 }, { 781 .name = "axp20x-regulator", 782 }, { 783 .name = "axp20x-ac-power-supply", 784 .of_compatible = "x-powers,axp221-ac-power-supply", 785 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 786 .resources = axp20x_ac_power_supply_resources, 787 }, { 788 .name = "axp20x-usb-power-supply", 789 .of_compatible = "x-powers,axp223-usb-power-supply", 790 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 791 .resources = axp22x_usb_power_supply_resources, 792 }, 793 }; 794 795 static const struct mfd_cell axp152_cells[] = { 796 { 797 .name = "axp20x-pek", 798 .num_resources = ARRAY_SIZE(axp152_pek_resources), 799 .resources = axp152_pek_resources, 800 }, 801 }; 802 803 static struct mfd_cell axp313a_cells[] = { 804 MFD_CELL_NAME("axp20x-regulator"), 805 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), 806 }; 807 808 static const struct resource axp288_adc_resources[] = { 809 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 810 }; 811 812 static const struct resource axp288_extcon_resources[] = { 813 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 814 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 815 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 816 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 817 }; 818 819 static const struct resource axp288_charger_resources[] = { 820 DEFINE_RES_IRQ(AXP288_IRQ_OV), 821 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 822 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 823 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 824 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 825 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 826 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 827 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 828 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 829 }; 830 831 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" }; 832 833 static const struct property_entry axp288_fuel_gauge_properties[] = { 834 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers), 835 { } 836 }; 837 838 static const struct software_node axp288_fuel_gauge_sw_node = { 839 .name = "axp288_fuel_gauge", 840 .properties = axp288_fuel_gauge_properties, 841 }; 842 843 static const struct mfd_cell axp288_cells[] = { 844 { 845 .name = "axp288_adc", 846 .num_resources = ARRAY_SIZE(axp288_adc_resources), 847 .resources = axp288_adc_resources, 848 }, { 849 .name = "axp288_extcon", 850 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 851 .resources = axp288_extcon_resources, 852 }, { 853 .name = "axp288_charger", 854 .num_resources = ARRAY_SIZE(axp288_charger_resources), 855 .resources = axp288_charger_resources, 856 }, { 857 .name = "axp288_fuel_gauge", 858 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 859 .resources = axp288_fuel_gauge_resources, 860 .swnode = &axp288_fuel_gauge_sw_node, 861 }, { 862 .name = "axp221-pek", 863 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 864 .resources = axp288_power_button_resources, 865 }, { 866 .name = "axp288_pmic_acpi", 867 }, 868 }; 869 870 static const struct mfd_cell axp803_cells[] = { 871 { 872 .name = "axp221-pek", 873 .num_resources = ARRAY_SIZE(axp803_pek_resources), 874 .resources = axp803_pek_resources, 875 }, { 876 .name = "axp20x-gpio", 877 .of_compatible = "x-powers,axp813-gpio", 878 }, { 879 .name = "axp813-adc", 880 .of_compatible = "x-powers,axp813-adc", 881 }, { 882 .name = "axp20x-battery-power-supply", 883 .of_compatible = "x-powers,axp813-battery-power-supply", 884 }, { 885 .name = "axp20x-ac-power-supply", 886 .of_compatible = "x-powers,axp813-ac-power-supply", 887 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 888 .resources = axp20x_ac_power_supply_resources, 889 }, { 890 .name = "axp20x-usb-power-supply", 891 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 892 .resources = axp803_usb_power_supply_resources, 893 .of_compatible = "x-powers,axp813-usb-power-supply", 894 }, 895 { .name = "axp20x-regulator" }, 896 }; 897 898 static const struct mfd_cell axp806_self_working_cells[] = { 899 { 900 .name = "axp221-pek", 901 .num_resources = ARRAY_SIZE(axp806_pek_resources), 902 .resources = axp806_pek_resources, 903 }, 904 { .name = "axp20x-regulator" }, 905 }; 906 907 static const struct mfd_cell axp806_cells[] = { 908 { 909 .id = 2, 910 .name = "axp20x-regulator", 911 }, 912 }; 913 914 static const struct mfd_cell axp809_cells[] = { 915 { 916 .name = "axp20x-gpio", 917 .of_compatible = "x-powers,axp221-gpio", 918 }, { 919 .name = "axp221-pek", 920 .num_resources = ARRAY_SIZE(axp809_pek_resources), 921 .resources = axp809_pek_resources, 922 }, { 923 .id = 1, 924 .name = "axp20x-regulator", 925 }, 926 }; 927 928 static const struct mfd_cell axp813_cells[] = { 929 { 930 .name = "axp221-pek", 931 .num_resources = ARRAY_SIZE(axp803_pek_resources), 932 .resources = axp803_pek_resources, 933 }, { 934 .name = "axp20x-regulator", 935 }, { 936 .name = "axp20x-gpio", 937 .of_compatible = "x-powers,axp813-gpio", 938 }, { 939 .name = "axp813-adc", 940 .of_compatible = "x-powers,axp813-adc", 941 }, { 942 .name = "axp20x-battery-power-supply", 943 .of_compatible = "x-powers,axp813-battery-power-supply", 944 }, { 945 .name = "axp20x-ac-power-supply", 946 .of_compatible = "x-powers,axp813-ac-power-supply", 947 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 948 .resources = axp20x_ac_power_supply_resources, 949 }, { 950 .name = "axp20x-usb-power-supply", 951 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 952 .resources = axp803_usb_power_supply_resources, 953 .of_compatible = "x-powers,axp813-usb-power-supply", 954 }, 955 }; 956 957 static const struct mfd_cell axp15060_cells[] = { 958 { 959 .name = "axp221-pek", 960 .num_resources = ARRAY_SIZE(axp15060_pek_resources), 961 .resources = axp15060_pek_resources, 962 }, { 963 .name = "axp20x-regulator", 964 }, 965 }; 966 967 /* For boards that don't have IRQ line connected to SOC. */ 968 static const struct mfd_cell axp_regulator_only_cells[] = { 969 { 970 .name = "axp20x-regulator", 971 }, 972 }; 973 974 static int axp20x_power_off(struct sys_off_data *data) 975 { 976 struct axp20x_dev *axp20x = data->cb_data; 977 unsigned int shutdown_reg; 978 979 switch (axp20x->variant) { 980 case AXP313A_ID: 981 shutdown_reg = AXP313A_SHUTDOWN_CTRL; 982 break; 983 default: 984 shutdown_reg = AXP20X_OFF_CTRL; 985 break; 986 } 987 988 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF); 989 990 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 991 mdelay(500); 992 993 return NOTIFY_DONE; 994 } 995 996 int axp20x_match_device(struct axp20x_dev *axp20x) 997 { 998 struct device *dev = axp20x->dev; 999 const struct acpi_device_id *acpi_id; 1000 const struct of_device_id *of_id; 1001 1002 if (dev->of_node) { 1003 of_id = of_match_device(dev->driver->of_match_table, dev); 1004 if (!of_id) { 1005 dev_err(dev, "Unable to match OF ID\n"); 1006 return -ENODEV; 1007 } 1008 axp20x->variant = (long)of_id->data; 1009 } else { 1010 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 1011 if (!acpi_id || !acpi_id->driver_data) { 1012 dev_err(dev, "Unable to match ACPI ID and data\n"); 1013 return -ENODEV; 1014 } 1015 axp20x->variant = (long)acpi_id->driver_data; 1016 } 1017 1018 switch (axp20x->variant) { 1019 case AXP152_ID: 1020 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 1021 axp20x->cells = axp152_cells; 1022 axp20x->regmap_cfg = &axp152_regmap_config; 1023 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 1024 break; 1025 case AXP202_ID: 1026 case AXP209_ID: 1027 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 1028 axp20x->cells = axp20x_cells; 1029 axp20x->regmap_cfg = &axp20x_regmap_config; 1030 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 1031 break; 1032 case AXP221_ID: 1033 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 1034 axp20x->cells = axp221_cells; 1035 axp20x->regmap_cfg = &axp22x_regmap_config; 1036 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1037 break; 1038 case AXP223_ID: 1039 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 1040 axp20x->cells = axp223_cells; 1041 axp20x->regmap_cfg = &axp22x_regmap_config; 1042 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1043 break; 1044 case AXP288_ID: 1045 axp20x->cells = axp288_cells; 1046 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 1047 axp20x->regmap_cfg = &axp288_regmap_config; 1048 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 1049 axp20x->irq_flags = IRQF_TRIGGER_LOW; 1050 break; 1051 case AXP313A_ID: 1052 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 1053 axp20x->cells = axp313a_cells; 1054 axp20x->regmap_cfg = &axp313a_regmap_config; 1055 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 1056 break; 1057 case AXP803_ID: 1058 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 1059 axp20x->cells = axp803_cells; 1060 axp20x->regmap_cfg = &axp288_regmap_config; 1061 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1062 break; 1063 case AXP806_ID: 1064 /* 1065 * Don't register the power key part if in slave mode or 1066 * if there is no interrupt line. 1067 */ 1068 if (of_property_read_bool(axp20x->dev->of_node, 1069 "x-powers,self-working-mode") && 1070 axp20x->irq > 0) { 1071 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 1072 axp20x->cells = axp806_self_working_cells; 1073 } else { 1074 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 1075 axp20x->cells = axp806_cells; 1076 } 1077 axp20x->regmap_cfg = &axp806_regmap_config; 1078 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 1079 break; 1080 case AXP809_ID: 1081 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 1082 axp20x->cells = axp809_cells; 1083 axp20x->regmap_cfg = &axp22x_regmap_config; 1084 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 1085 break; 1086 case AXP813_ID: 1087 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 1088 axp20x->cells = axp813_cells; 1089 axp20x->regmap_cfg = &axp288_regmap_config; 1090 /* 1091 * The IRQ table given in the datasheet is incorrect. 1092 * In IRQ enable/status registers 1, there are separate 1093 * IRQs for ACIN and VBUS, instead of bits [7:5] being 1094 * the same as bits [4:2]. So it shares the same IRQs 1095 * as the AXP803, rather than the AXP288. 1096 */ 1097 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1098 break; 1099 case AXP15060_ID: 1100 /* 1101 * Don't register the power key part if there is no interrupt 1102 * line. 1103 * 1104 * Since most use cases of AXP PMICs are Allwinner SOCs, board 1105 * designers follow Allwinner's reference design and connects 1106 * IRQ line to SOC, there's no need for those variants to deal 1107 * with cases that IRQ isn't connected. However, AXP15660 is 1108 * used by some other vendors' SOCs that didn't connect IRQ 1109 * line, we need to deal with this case. 1110 */ 1111 if (axp20x->irq > 0) { 1112 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells); 1113 axp20x->cells = axp15060_cells; 1114 } else { 1115 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells); 1116 axp20x->cells = axp_regulator_only_cells; 1117 } 1118 axp20x->regmap_cfg = &axp15060_regmap_config; 1119 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip; 1120 break; 1121 default: 1122 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 1123 return -EINVAL; 1124 } 1125 dev_info(dev, "AXP20x variant %s found\n", 1126 axp20x_model_names[axp20x->variant]); 1127 1128 return 0; 1129 } 1130 EXPORT_SYMBOL(axp20x_match_device); 1131 1132 int axp20x_device_probe(struct axp20x_dev *axp20x) 1133 { 1134 int ret; 1135 1136 /* 1137 * The AXP806 supports either master/standalone or slave mode. 1138 * Slave mode allows sharing the serial bus, even with multiple 1139 * AXP806 which all have the same hardware address. 1140 * 1141 * This is done with extra "serial interface address extension", 1142 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 1143 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1144 * 1 bit customizable at the factory, and 1 bit depending on the 1145 * state of an external pin. The latter is writable. The device 1146 * will only respond to operations to its other registers when 1147 * the these device addressing bits (in the upper 4 bits of the 1148 * registers) match. 1149 * 1150 * By default we support an AXP806 chained to an AXP809 in slave 1151 * mode. Boards which use an AXP806 in master mode can set the 1152 * property "x-powers,master-mode" to override the default. 1153 */ 1154 if (axp20x->variant == AXP806_ID) { 1155 if (of_property_read_bool(axp20x->dev->of_node, 1156 "x-powers,master-mode") || 1157 of_property_read_bool(axp20x->dev->of_node, 1158 "x-powers,self-working-mode")) 1159 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1160 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 1161 else 1162 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1163 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 1164 } 1165 1166 /* Only if there is an interrupt line connected towards the CPU. */ 1167 if (axp20x->irq > 0) { 1168 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 1169 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 1170 -1, axp20x->regmap_irq_chip, 1171 &axp20x->regmap_irqc); 1172 if (ret) { 1173 dev_err(axp20x->dev, "failed to add irq chip: %d\n", 1174 ret); 1175 return ret; 1176 } 1177 } 1178 1179 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 1180 axp20x->nr_cells, NULL, 0, NULL); 1181 1182 if (ret) { 1183 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 1184 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1185 return ret; 1186 } 1187 1188 if (axp20x->variant != AXP288_ID) 1189 devm_register_sys_off_handler(axp20x->dev, 1190 SYS_OFF_MODE_POWER_OFF, 1191 SYS_OFF_PRIO_DEFAULT, 1192 axp20x_power_off, axp20x); 1193 1194 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1195 1196 return 0; 1197 } 1198 EXPORT_SYMBOL(axp20x_device_probe); 1199 1200 void axp20x_device_remove(struct axp20x_dev *axp20x) 1201 { 1202 mfd_remove_devices(axp20x->dev); 1203 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1204 } 1205 EXPORT_SYMBOL(axp20x_device_remove); 1206 1207 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1208 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1209 MODULE_LICENSE("GPL"); 1210