1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MFD core driver for the X-Powers' Power Management ICs 4 * 5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 7 * as well as configurable GPIOs. 8 * 9 * This file contains the interface independent core functions. 10 * 11 * Copyright (C) 2014 Carlo Caione 12 * 13 * Author: Carlo Caione <carlo@caione.org> 14 */ 15 16 #include <linux/acpi.h> 17 #include <linux/bitops.h> 18 #include <linux/delay.h> 19 #include <linux/err.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/axp20x.h> 23 #include <linux/mfd/core.h> 24 #include <linux/module.h> 25 #include <linux/of.h> 26 #include <linux/property.h> 27 #include <linux/reboot.h> 28 #include <linux/regmap.h> 29 #include <linux/regulator/consumer.h> 30 31 #define AXP20X_OFF BIT(7) 32 33 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 35 36 static const char * const axp20x_model_names[] = { 37 "AXP152", 38 "AXP192", 39 "AXP202", 40 "AXP209", 41 "AXP221", 42 "AXP223", 43 "AXP288", 44 "AXP313a", 45 "AXP717", 46 "AXP803", 47 "AXP806", 48 "AXP809", 49 "AXP813", 50 "AXP15060", 51 }; 52 53 static const struct regmap_range axp152_writeable_ranges[] = { 54 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 55 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 56 }; 57 58 static const struct regmap_range axp152_volatile_ranges[] = { 59 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 60 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 61 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 62 }; 63 64 static const struct regmap_access_table axp152_writeable_table = { 65 .yes_ranges = axp152_writeable_ranges, 66 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 67 }; 68 69 static const struct regmap_access_table axp152_volatile_table = { 70 .yes_ranges = axp152_volatile_ranges, 71 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 72 }; 73 74 static const struct regmap_range axp20x_writeable_ranges[] = { 75 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 76 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 77 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 78 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 79 }; 80 81 static const struct regmap_range axp20x_volatile_ranges[] = { 82 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 83 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 84 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 85 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 86 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 87 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 88 }; 89 90 static const struct regmap_access_table axp20x_writeable_table = { 91 .yes_ranges = axp20x_writeable_ranges, 92 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 93 }; 94 95 static const struct regmap_access_table axp20x_volatile_table = { 96 .yes_ranges = axp20x_volatile_ranges, 97 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 98 }; 99 100 static const struct regmap_range axp192_writeable_ranges[] = { 101 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)), 102 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE), 103 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL), 104 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL), 105 }; 106 107 static const struct regmap_range axp192_volatile_ranges[] = { 108 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS), 109 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE), 110 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE), 111 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 112 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 113 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE), 114 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE), 115 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL), 116 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL), 117 }; 118 119 static const struct regmap_access_table axp192_writeable_table = { 120 .yes_ranges = axp192_writeable_ranges, 121 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges), 122 }; 123 124 static const struct regmap_access_table axp192_volatile_table = { 125 .yes_ranges = axp192_volatile_ranges, 126 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges), 127 }; 128 129 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 130 static const struct regmap_range axp22x_writeable_ranges[] = { 131 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 132 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 133 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 134 }; 135 136 static const struct regmap_range axp22x_volatile_ranges[] = { 137 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 138 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 139 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 140 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 141 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 142 }; 143 144 static const struct regmap_access_table axp22x_writeable_table = { 145 .yes_ranges = axp22x_writeable_ranges, 146 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 147 }; 148 149 static const struct regmap_access_table axp22x_volatile_table = { 150 .yes_ranges = axp22x_volatile_ranges, 151 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 152 }; 153 154 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 155 static const struct regmap_range axp288_writeable_ranges[] = { 156 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON), 157 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 158 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 159 }; 160 161 static const struct regmap_range axp288_volatile_ranges[] = { 162 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 163 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT), 164 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 165 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT), 166 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 167 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 168 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 169 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE), 170 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 171 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 172 }; 173 174 static const struct regmap_access_table axp288_writeable_table = { 175 .yes_ranges = axp288_writeable_ranges, 176 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 177 }; 178 179 static const struct regmap_access_table axp288_volatile_table = { 180 .yes_ranges = axp288_volatile_ranges, 181 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 182 }; 183 184 static const struct regmap_range axp806_writeable_ranges[] = { 185 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 186 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 187 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 188 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 189 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 190 }; 191 192 static const struct regmap_range axp313a_writeable_ranges[] = { 193 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE), 194 }; 195 196 static const struct regmap_range axp313a_volatile_ranges[] = { 197 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL), 198 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE), 199 }; 200 201 static const struct regmap_access_table axp313a_writeable_table = { 202 .yes_ranges = axp313a_writeable_ranges, 203 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges), 204 }; 205 206 static const struct regmap_access_table axp313a_volatile_table = { 207 .yes_ranges = axp313a_volatile_ranges, 208 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges), 209 }; 210 211 static const struct regmap_range axp717_writeable_ranges[] = { 212 regmap_reg_range(AXP717_MODULE_EN_CONTROL_2, AXP717_MODULE_EN_CONTROL_2), 213 regmap_reg_range(AXP717_BOOST_CONTROL, AXP717_BOOST_CONTROL), 214 regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN), 215 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE), 216 regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL), 217 }; 218 219 static const struct regmap_range axp717_volatile_ranges[] = { 220 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE), 221 }; 222 223 static const struct regmap_access_table axp717_writeable_table = { 224 .yes_ranges = axp717_writeable_ranges, 225 .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges), 226 }; 227 228 static const struct regmap_access_table axp717_volatile_table = { 229 .yes_ranges = axp717_volatile_ranges, 230 .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges), 231 }; 232 233 static const struct regmap_range axp806_volatile_ranges[] = { 234 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 235 }; 236 237 static const struct regmap_access_table axp806_writeable_table = { 238 .yes_ranges = axp806_writeable_ranges, 239 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 240 }; 241 242 static const struct regmap_access_table axp806_volatile_table = { 243 .yes_ranges = axp806_volatile_ranges, 244 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 245 }; 246 247 static const struct regmap_range axp15060_writeable_ranges[] = { 248 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2), 249 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL), 250 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 251 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY), 252 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN), 253 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 254 }; 255 256 static const struct regmap_range axp15060_volatile_ranges[] = { 257 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC), 258 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 259 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 260 }; 261 262 static const struct regmap_access_table axp15060_writeable_table = { 263 .yes_ranges = axp15060_writeable_ranges, 264 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges), 265 }; 266 267 static const struct regmap_access_table axp15060_volatile_table = { 268 .yes_ranges = axp15060_volatile_ranges, 269 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges), 270 }; 271 272 static const struct resource axp152_pek_resources[] = { 273 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 274 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 275 }; 276 277 static const struct resource axp192_ac_power_supply_resources[] = { 278 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 279 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 280 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 281 }; 282 283 static const struct resource axp192_usb_power_supply_resources[] = { 284 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 285 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 286 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"), 287 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 288 }; 289 290 static const struct resource axp20x_ac_power_supply_resources[] = { 291 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 292 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 293 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 294 }; 295 296 static const struct resource axp20x_pek_resources[] = { 297 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 298 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 299 }; 300 301 static const struct resource axp20x_usb_power_supply_resources[] = { 302 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 303 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 304 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 305 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 306 }; 307 308 static const struct resource axp22x_usb_power_supply_resources[] = { 309 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 310 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 311 }; 312 313 /* AXP803 and AXP813/AXP818 share the same interrupts */ 314 static const struct resource axp803_usb_power_supply_resources[] = { 315 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 316 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 317 }; 318 319 static const struct resource axp22x_pek_resources[] = { 320 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 321 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 322 }; 323 324 static const struct resource axp288_power_button_resources[] = { 325 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 326 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 327 }; 328 329 static const struct resource axp288_fuel_gauge_resources[] = { 330 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 331 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 332 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 333 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 334 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 335 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 336 }; 337 338 static const struct resource axp313a_pek_resources[] = { 339 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 340 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 341 }; 342 343 static const struct resource axp717_pek_resources[] = { 344 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 345 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 346 }; 347 348 static const struct resource axp803_pek_resources[] = { 349 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 350 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 351 }; 352 353 static const struct resource axp806_pek_resources[] = { 354 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 355 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 356 }; 357 358 static const struct resource axp809_pek_resources[] = { 359 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 360 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 361 }; 362 363 static const struct resource axp15060_pek_resources[] = { 364 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 365 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 366 }; 367 368 static const struct regmap_config axp152_regmap_config = { 369 .reg_bits = 8, 370 .val_bits = 8, 371 .wr_table = &axp152_writeable_table, 372 .volatile_table = &axp152_volatile_table, 373 .max_register = AXP152_PWM1_DUTY_CYCLE, 374 .cache_type = REGCACHE_MAPLE, 375 }; 376 377 static const struct regmap_config axp192_regmap_config = { 378 .reg_bits = 8, 379 .val_bits = 8, 380 .wr_table = &axp192_writeable_table, 381 .volatile_table = &axp192_volatile_table, 382 .max_register = AXP20X_CC_CTRL, 383 .cache_type = REGCACHE_MAPLE, 384 }; 385 386 static const struct regmap_config axp20x_regmap_config = { 387 .reg_bits = 8, 388 .val_bits = 8, 389 .wr_table = &axp20x_writeable_table, 390 .volatile_table = &axp20x_volatile_table, 391 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 392 .cache_type = REGCACHE_MAPLE, 393 }; 394 395 static const struct regmap_config axp22x_regmap_config = { 396 .reg_bits = 8, 397 .val_bits = 8, 398 .wr_table = &axp22x_writeable_table, 399 .volatile_table = &axp22x_volatile_table, 400 .max_register = AXP22X_BATLOW_THRES1, 401 .cache_type = REGCACHE_MAPLE, 402 }; 403 404 static const struct regmap_config axp288_regmap_config = { 405 .reg_bits = 8, 406 .val_bits = 8, 407 .wr_table = &axp288_writeable_table, 408 .volatile_table = &axp288_volatile_table, 409 .max_register = AXP288_FG_TUNE5, 410 .cache_type = REGCACHE_MAPLE, 411 }; 412 413 static const struct regmap_config axp313a_regmap_config = { 414 .reg_bits = 8, 415 .val_bits = 8, 416 .wr_table = &axp313a_writeable_table, 417 .volatile_table = &axp313a_volatile_table, 418 .max_register = AXP313A_IRQ_STATE, 419 .cache_type = REGCACHE_MAPLE, 420 }; 421 422 static const struct regmap_config axp717_regmap_config = { 423 .reg_bits = 8, 424 .val_bits = 8, 425 .wr_table = &axp717_writeable_table, 426 .volatile_table = &axp717_volatile_table, 427 .max_register = AXP717_CPUSLDO_CONTROL, 428 .cache_type = REGCACHE_MAPLE, 429 }; 430 431 static const struct regmap_config axp806_regmap_config = { 432 .reg_bits = 8, 433 .val_bits = 8, 434 .wr_table = &axp806_writeable_table, 435 .volatile_table = &axp806_volatile_table, 436 .max_register = AXP806_REG_ADDR_EXT, 437 .cache_type = REGCACHE_MAPLE, 438 }; 439 440 static const struct regmap_config axp15060_regmap_config = { 441 .reg_bits = 8, 442 .val_bits = 8, 443 .wr_table = &axp15060_writeable_table, 444 .volatile_table = &axp15060_volatile_table, 445 .max_register = AXP15060_IRQ2_STATE, 446 .cache_type = REGCACHE_MAPLE, 447 }; 448 449 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 450 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 451 452 static const struct regmap_irq axp152_regmap_irqs[] = { 453 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 454 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 455 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 456 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 457 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 458 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 459 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 460 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 461 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 462 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 463 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 464 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 465 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 466 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 467 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 468 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 469 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 470 }; 471 472 static const struct regmap_irq axp192_regmap_irqs[] = { 473 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7), 474 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6), 475 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5), 476 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4), 477 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3), 478 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2), 479 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1), 480 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7), 481 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6), 482 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5), 483 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4), 484 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3), 485 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2), 486 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1), 487 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0), 488 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7), 489 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6), 490 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5), 491 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4), 492 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3), 493 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1), 494 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0), 495 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7), 496 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6), 497 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5), 498 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4), 499 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3), 500 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2), 501 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0), 502 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7), 503 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2), 504 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1), 505 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0), 506 }; 507 508 static const struct regmap_irq axp20x_regmap_irqs[] = { 509 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 510 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 511 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 512 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 513 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 514 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 515 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 516 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 517 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 518 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 519 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 520 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 521 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 522 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 523 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 524 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 525 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 526 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 527 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 528 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 529 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 530 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 531 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 532 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 533 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 534 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 535 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 536 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 537 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 538 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 539 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 540 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 541 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 542 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 543 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 544 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 545 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 546 }; 547 548 static const struct regmap_irq axp22x_regmap_irqs[] = { 549 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 550 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 551 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 552 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 553 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 554 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 555 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 556 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 557 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 558 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 559 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 560 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 561 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 562 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 563 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 564 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 565 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 566 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 567 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 568 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 569 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 570 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 571 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 572 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 573 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 574 }; 575 576 /* some IRQs are compatible with axp20x models */ 577 static const struct regmap_irq axp288_regmap_irqs[] = { 578 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 579 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 580 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 581 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 582 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 583 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 584 585 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 586 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 587 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 588 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 589 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 590 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 591 592 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 593 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 594 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 595 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 596 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 597 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 598 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 599 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 600 601 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 602 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 603 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 604 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 605 606 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 607 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 608 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 609 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 610 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 611 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 612 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 613 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 614 615 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 616 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 617 }; 618 619 static const struct regmap_irq axp313a_regmap_irqs[] = { 620 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7), 621 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6), 622 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5), 623 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4), 624 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3), 625 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2), 626 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), 627 }; 628 629 static const struct regmap_irq axp717_regmap_irqs[] = { 630 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7), 631 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6), 632 INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC, 0, 4), 633 INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V, 0, 2), 634 INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V, 0, 1), 635 INIT_REGMAP_IRQ(AXP717, VBUS_FAULT, 0, 0), 636 INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN, 1, 7), 637 INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL, 1, 6), 638 INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN, 1, 5), 639 INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL, 1, 4), 640 INIT_REGMAP_IRQ(AXP717, PEK_SHORT, 1, 3), 641 INIT_REGMAP_IRQ(AXP717, PEK_LONG, 1, 2), 642 INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE, 1, 1), 643 INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE, 1, 0), 644 INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE, 2, 7), 645 INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR, 2, 6), 646 INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR, 2, 5), 647 INIT_REGMAP_IRQ(AXP717, CHARG_DONE, 2, 4), 648 INIT_REGMAP_IRQ(AXP717, CHARG, 2, 3), 649 INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH, 2, 2), 650 INIT_REGMAP_IRQ(AXP717, CHARG_TIMER, 2, 1), 651 INIT_REGMAP_IRQ(AXP717, BATT_OVER_V, 2, 0), 652 INIT_REGMAP_IRQ(AXP717, BC_USB_DONE, 3, 7), 653 INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG, 3, 6), 654 INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH, 3, 4), 655 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH, 3, 3), 656 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW, 3, 2), 657 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH, 3, 1), 658 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW, 3, 0), 659 INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE, 4, 6), 660 INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN, 4, 5), 661 }; 662 663 static const struct regmap_irq axp803_regmap_irqs[] = { 664 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 665 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 666 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 667 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 668 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 669 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 670 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 671 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 672 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 673 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 674 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 675 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 676 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 677 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 678 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 679 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 680 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 681 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 682 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 683 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 684 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 685 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 686 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 687 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 688 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 689 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 690 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 691 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 692 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 693 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 694 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 695 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 696 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 697 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 698 }; 699 700 static const struct regmap_irq axp806_regmap_irqs[] = { 701 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 702 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 703 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 704 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 705 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 706 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 707 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 708 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 709 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 710 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 711 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 712 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 713 }; 714 715 static const struct regmap_irq axp809_regmap_irqs[] = { 716 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 717 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 718 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 719 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 720 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 721 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 722 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 723 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 724 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 725 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 726 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 727 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 728 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 729 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 730 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 731 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 732 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 733 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 734 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 735 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 736 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 737 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 738 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 739 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 740 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 741 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 742 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 743 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 744 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 745 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 746 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 747 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 748 }; 749 750 static const struct regmap_irq axp15060_regmap_irqs[] = { 751 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0), 752 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1), 753 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2), 754 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3), 755 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4), 756 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5), 757 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6), 758 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7), 759 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0), 760 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1), 761 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2), 762 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3), 763 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4), 764 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5), 765 }; 766 767 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 768 .name = "axp152_irq_chip", 769 .status_base = AXP152_IRQ1_STATE, 770 .ack_base = AXP152_IRQ1_STATE, 771 .unmask_base = AXP152_IRQ1_EN, 772 .init_ack_masked = true, 773 .irqs = axp152_regmap_irqs, 774 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 775 .num_regs = 3, 776 }; 777 778 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data, 779 unsigned int base, int index) 780 { 781 /* linear mapping for IRQ1 to IRQ4 */ 782 if (index < 4) 783 return base + index; 784 785 /* handle IRQ5 separately */ 786 if (base == AXP192_IRQ1_EN) 787 return AXP192_IRQ5_EN; 788 789 return AXP192_IRQ5_STATE; 790 } 791 792 static const struct regmap_irq_chip axp192_regmap_irq_chip = { 793 .name = "axp192_irq_chip", 794 .status_base = AXP192_IRQ1_STATE, 795 .ack_base = AXP192_IRQ1_STATE, 796 .unmask_base = AXP192_IRQ1_EN, 797 .init_ack_masked = true, 798 .irqs = axp192_regmap_irqs, 799 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs), 800 .num_regs = 5, 801 .get_irq_reg = axp192_get_irq_reg, 802 }; 803 804 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 805 .name = "axp20x_irq_chip", 806 .status_base = AXP20X_IRQ1_STATE, 807 .ack_base = AXP20X_IRQ1_STATE, 808 .unmask_base = AXP20X_IRQ1_EN, 809 .init_ack_masked = true, 810 .irqs = axp20x_regmap_irqs, 811 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 812 .num_regs = 5, 813 814 }; 815 816 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 817 .name = "axp22x_irq_chip", 818 .status_base = AXP20X_IRQ1_STATE, 819 .ack_base = AXP20X_IRQ1_STATE, 820 .unmask_base = AXP20X_IRQ1_EN, 821 .init_ack_masked = true, 822 .irqs = axp22x_regmap_irqs, 823 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 824 .num_regs = 5, 825 }; 826 827 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 828 .name = "axp288_irq_chip", 829 .status_base = AXP20X_IRQ1_STATE, 830 .ack_base = AXP20X_IRQ1_STATE, 831 .unmask_base = AXP20X_IRQ1_EN, 832 .init_ack_masked = true, 833 .irqs = axp288_regmap_irqs, 834 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 835 .num_regs = 6, 836 837 }; 838 839 static const struct regmap_irq_chip axp313a_regmap_irq_chip = { 840 .name = "axp313a_irq_chip", 841 .status_base = AXP313A_IRQ_STATE, 842 .ack_base = AXP313A_IRQ_STATE, 843 .unmask_base = AXP313A_IRQ_EN, 844 .init_ack_masked = true, 845 .irqs = axp313a_regmap_irqs, 846 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs), 847 .num_regs = 1, 848 }; 849 850 static const struct regmap_irq_chip axp717_regmap_irq_chip = { 851 .name = "axp717_irq_chip", 852 .status_base = AXP717_IRQ0_STATE, 853 .ack_base = AXP717_IRQ0_STATE, 854 .unmask_base = AXP717_IRQ0_EN, 855 .init_ack_masked = true, 856 .irqs = axp717_regmap_irqs, 857 .num_irqs = ARRAY_SIZE(axp717_regmap_irqs), 858 .num_regs = 5, 859 }; 860 861 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 862 .name = "axp803", 863 .status_base = AXP20X_IRQ1_STATE, 864 .ack_base = AXP20X_IRQ1_STATE, 865 .unmask_base = AXP20X_IRQ1_EN, 866 .init_ack_masked = true, 867 .irqs = axp803_regmap_irqs, 868 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 869 .num_regs = 6, 870 }; 871 872 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 873 .name = "axp806", 874 .status_base = AXP20X_IRQ1_STATE, 875 .ack_base = AXP20X_IRQ1_STATE, 876 .unmask_base = AXP20X_IRQ1_EN, 877 .init_ack_masked = true, 878 .irqs = axp806_regmap_irqs, 879 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 880 .num_regs = 2, 881 }; 882 883 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 884 .name = "axp809", 885 .status_base = AXP20X_IRQ1_STATE, 886 .ack_base = AXP20X_IRQ1_STATE, 887 .unmask_base = AXP20X_IRQ1_EN, 888 .init_ack_masked = true, 889 .irqs = axp809_regmap_irqs, 890 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 891 .num_regs = 5, 892 }; 893 894 static const struct regmap_irq_chip axp15060_regmap_irq_chip = { 895 .name = "axp15060", 896 .status_base = AXP15060_IRQ1_STATE, 897 .ack_base = AXP15060_IRQ1_STATE, 898 .unmask_base = AXP15060_IRQ1_EN, 899 .init_ack_masked = true, 900 .irqs = axp15060_regmap_irqs, 901 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs), 902 .num_regs = 2, 903 }; 904 905 static const struct mfd_cell axp192_cells[] = { 906 { 907 .name = "axp192-adc", 908 .of_compatible = "x-powers,axp192-adc", 909 }, { 910 .name = "axp20x-battery-power-supply", 911 .of_compatible = "x-powers,axp192-battery-power-supply", 912 }, { 913 .name = "axp20x-ac-power-supply", 914 .of_compatible = "x-powers,axp202-ac-power-supply", 915 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources), 916 .resources = axp192_ac_power_supply_resources, 917 }, { 918 .name = "axp20x-usb-power-supply", 919 .of_compatible = "x-powers,axp192-usb-power-supply", 920 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources), 921 .resources = axp192_usb_power_supply_resources, 922 }, 923 { .name = "axp20x-regulator" }, 924 }; 925 926 static const struct mfd_cell axp20x_cells[] = { 927 { 928 .name = "axp20x-gpio", 929 .of_compatible = "x-powers,axp209-gpio", 930 }, { 931 .name = "axp20x-pek", 932 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 933 .resources = axp20x_pek_resources, 934 }, { 935 .name = "axp20x-regulator", 936 }, { 937 .name = "axp20x-adc", 938 .of_compatible = "x-powers,axp209-adc", 939 }, { 940 .name = "axp20x-battery-power-supply", 941 .of_compatible = "x-powers,axp209-battery-power-supply", 942 }, { 943 .name = "axp20x-ac-power-supply", 944 .of_compatible = "x-powers,axp202-ac-power-supply", 945 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 946 .resources = axp20x_ac_power_supply_resources, 947 }, { 948 .name = "axp20x-usb-power-supply", 949 .of_compatible = "x-powers,axp202-usb-power-supply", 950 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 951 .resources = axp20x_usb_power_supply_resources, 952 }, 953 }; 954 955 static const struct mfd_cell axp221_cells[] = { 956 { 957 .name = "axp20x-gpio", 958 .of_compatible = "x-powers,axp221-gpio", 959 }, { 960 .name = "axp221-pek", 961 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 962 .resources = axp22x_pek_resources, 963 }, { 964 .name = "axp20x-regulator", 965 }, { 966 .name = "axp22x-adc", 967 .of_compatible = "x-powers,axp221-adc", 968 }, { 969 .name = "axp20x-ac-power-supply", 970 .of_compatible = "x-powers,axp221-ac-power-supply", 971 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 972 .resources = axp20x_ac_power_supply_resources, 973 }, { 974 .name = "axp20x-battery-power-supply", 975 .of_compatible = "x-powers,axp221-battery-power-supply", 976 }, { 977 .name = "axp20x-usb-power-supply", 978 .of_compatible = "x-powers,axp221-usb-power-supply", 979 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 980 .resources = axp22x_usb_power_supply_resources, 981 }, 982 }; 983 984 static const struct mfd_cell axp223_cells[] = { 985 { 986 .name = "axp20x-gpio", 987 .of_compatible = "x-powers,axp221-gpio", 988 }, { 989 .name = "axp221-pek", 990 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 991 .resources = axp22x_pek_resources, 992 }, { 993 .name = "axp22x-adc", 994 .of_compatible = "x-powers,axp221-adc", 995 }, { 996 .name = "axp20x-battery-power-supply", 997 .of_compatible = "x-powers,axp221-battery-power-supply", 998 }, { 999 .name = "axp20x-regulator", 1000 }, { 1001 .name = "axp20x-ac-power-supply", 1002 .of_compatible = "x-powers,axp221-ac-power-supply", 1003 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1004 .resources = axp20x_ac_power_supply_resources, 1005 }, { 1006 .name = "axp20x-usb-power-supply", 1007 .of_compatible = "x-powers,axp223-usb-power-supply", 1008 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 1009 .resources = axp22x_usb_power_supply_resources, 1010 }, 1011 }; 1012 1013 static const struct mfd_cell axp152_cells[] = { 1014 { 1015 .name = "axp20x-pek", 1016 .num_resources = ARRAY_SIZE(axp152_pek_resources), 1017 .resources = axp152_pek_resources, 1018 }, 1019 }; 1020 1021 static struct mfd_cell axp313a_cells[] = { 1022 MFD_CELL_NAME("axp20x-regulator"), 1023 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), 1024 }; 1025 1026 static struct mfd_cell axp717_cells[] = { 1027 MFD_CELL_NAME("axp20x-regulator"), 1028 MFD_CELL_RES("axp20x-pek", axp717_pek_resources), 1029 }; 1030 1031 static const struct resource axp288_adc_resources[] = { 1032 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 1033 }; 1034 1035 static const struct resource axp288_extcon_resources[] = { 1036 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 1037 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 1038 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 1039 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 1040 }; 1041 1042 static const struct resource axp288_charger_resources[] = { 1043 DEFINE_RES_IRQ(AXP288_IRQ_OV), 1044 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 1045 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 1046 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 1047 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 1048 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 1049 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 1050 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 1051 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 1052 }; 1053 1054 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" }; 1055 1056 static const struct property_entry axp288_fuel_gauge_properties[] = { 1057 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers), 1058 { } 1059 }; 1060 1061 static const struct software_node axp288_fuel_gauge_sw_node = { 1062 .name = "axp288_fuel_gauge", 1063 .properties = axp288_fuel_gauge_properties, 1064 }; 1065 1066 static const struct mfd_cell axp288_cells[] = { 1067 { 1068 .name = "axp288_adc", 1069 .num_resources = ARRAY_SIZE(axp288_adc_resources), 1070 .resources = axp288_adc_resources, 1071 }, { 1072 .name = "axp288_extcon", 1073 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 1074 .resources = axp288_extcon_resources, 1075 }, { 1076 .name = "axp288_charger", 1077 .num_resources = ARRAY_SIZE(axp288_charger_resources), 1078 .resources = axp288_charger_resources, 1079 }, { 1080 .name = "axp288_fuel_gauge", 1081 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 1082 .resources = axp288_fuel_gauge_resources, 1083 .swnode = &axp288_fuel_gauge_sw_node, 1084 }, { 1085 .name = "axp221-pek", 1086 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 1087 .resources = axp288_power_button_resources, 1088 }, { 1089 .name = "axp288_pmic_acpi", 1090 }, 1091 }; 1092 1093 static const struct mfd_cell axp803_cells[] = { 1094 { 1095 .name = "axp221-pek", 1096 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1097 .resources = axp803_pek_resources, 1098 }, { 1099 .name = "axp20x-gpio", 1100 .of_compatible = "x-powers,axp813-gpio", 1101 }, { 1102 .name = "axp813-adc", 1103 .of_compatible = "x-powers,axp813-adc", 1104 }, { 1105 .name = "axp20x-battery-power-supply", 1106 .of_compatible = "x-powers,axp813-battery-power-supply", 1107 }, { 1108 .name = "axp20x-ac-power-supply", 1109 .of_compatible = "x-powers,axp813-ac-power-supply", 1110 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1111 .resources = axp20x_ac_power_supply_resources, 1112 }, { 1113 .name = "axp20x-usb-power-supply", 1114 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1115 .resources = axp803_usb_power_supply_resources, 1116 .of_compatible = "x-powers,axp813-usb-power-supply", 1117 }, 1118 { .name = "axp20x-regulator" }, 1119 }; 1120 1121 static const struct mfd_cell axp806_self_working_cells[] = { 1122 { 1123 .name = "axp221-pek", 1124 .num_resources = ARRAY_SIZE(axp806_pek_resources), 1125 .resources = axp806_pek_resources, 1126 }, 1127 { .name = "axp20x-regulator" }, 1128 }; 1129 1130 static const struct mfd_cell axp806_cells[] = { 1131 { 1132 .id = 2, 1133 .name = "axp20x-regulator", 1134 }, 1135 }; 1136 1137 static const struct mfd_cell axp809_cells[] = { 1138 { 1139 .name = "axp20x-gpio", 1140 .of_compatible = "x-powers,axp221-gpio", 1141 }, { 1142 .name = "axp221-pek", 1143 .num_resources = ARRAY_SIZE(axp809_pek_resources), 1144 .resources = axp809_pek_resources, 1145 }, { 1146 .id = 1, 1147 .name = "axp20x-regulator", 1148 }, 1149 }; 1150 1151 static const struct mfd_cell axp813_cells[] = { 1152 { 1153 .name = "axp221-pek", 1154 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1155 .resources = axp803_pek_resources, 1156 }, { 1157 .name = "axp20x-regulator", 1158 }, { 1159 .name = "axp20x-gpio", 1160 .of_compatible = "x-powers,axp813-gpio", 1161 }, { 1162 .name = "axp813-adc", 1163 .of_compatible = "x-powers,axp813-adc", 1164 }, { 1165 .name = "axp20x-battery-power-supply", 1166 .of_compatible = "x-powers,axp813-battery-power-supply", 1167 }, { 1168 .name = "axp20x-ac-power-supply", 1169 .of_compatible = "x-powers,axp813-ac-power-supply", 1170 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1171 .resources = axp20x_ac_power_supply_resources, 1172 }, { 1173 .name = "axp20x-usb-power-supply", 1174 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1175 .resources = axp803_usb_power_supply_resources, 1176 .of_compatible = "x-powers,axp813-usb-power-supply", 1177 }, 1178 }; 1179 1180 static const struct mfd_cell axp15060_cells[] = { 1181 { 1182 .name = "axp221-pek", 1183 .num_resources = ARRAY_SIZE(axp15060_pek_resources), 1184 .resources = axp15060_pek_resources, 1185 }, { 1186 .name = "axp20x-regulator", 1187 }, 1188 }; 1189 1190 /* For boards that don't have IRQ line connected to SOC. */ 1191 static const struct mfd_cell axp_regulator_only_cells[] = { 1192 { 1193 .name = "axp20x-regulator", 1194 }, 1195 }; 1196 1197 static int axp20x_power_off(struct sys_off_data *data) 1198 { 1199 struct axp20x_dev *axp20x = data->cb_data; 1200 unsigned int shutdown_reg; 1201 1202 switch (axp20x->variant) { 1203 case AXP313A_ID: 1204 shutdown_reg = AXP313A_SHUTDOWN_CTRL; 1205 break; 1206 default: 1207 shutdown_reg = AXP20X_OFF_CTRL; 1208 break; 1209 } 1210 1211 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF); 1212 1213 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 1214 mdelay(500); 1215 1216 return NOTIFY_DONE; 1217 } 1218 1219 int axp20x_match_device(struct axp20x_dev *axp20x) 1220 { 1221 struct device *dev = axp20x->dev; 1222 const struct mfd_cell *cells_no_irq = NULL; 1223 int nr_cells_no_irq = 0; 1224 1225 axp20x->variant = (long)device_get_match_data(dev); 1226 switch (axp20x->variant) { 1227 case AXP152_ID: 1228 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 1229 axp20x->cells = axp152_cells; 1230 axp20x->regmap_cfg = &axp152_regmap_config; 1231 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 1232 break; 1233 case AXP192_ID: 1234 axp20x->nr_cells = ARRAY_SIZE(axp192_cells); 1235 axp20x->cells = axp192_cells; 1236 axp20x->regmap_cfg = &axp192_regmap_config; 1237 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip; 1238 break; 1239 case AXP202_ID: 1240 case AXP209_ID: 1241 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 1242 axp20x->cells = axp20x_cells; 1243 axp20x->regmap_cfg = &axp20x_regmap_config; 1244 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 1245 break; 1246 case AXP221_ID: 1247 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 1248 axp20x->cells = axp221_cells; 1249 axp20x->regmap_cfg = &axp22x_regmap_config; 1250 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1251 break; 1252 case AXP223_ID: 1253 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 1254 axp20x->cells = axp223_cells; 1255 axp20x->regmap_cfg = &axp22x_regmap_config; 1256 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1257 break; 1258 case AXP288_ID: 1259 axp20x->cells = axp288_cells; 1260 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 1261 axp20x->regmap_cfg = &axp288_regmap_config; 1262 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 1263 axp20x->irq_flags = IRQF_TRIGGER_LOW; 1264 break; 1265 case AXP313A_ID: 1266 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 1267 axp20x->cells = axp313a_cells; 1268 axp20x->regmap_cfg = &axp313a_regmap_config; 1269 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 1270 break; 1271 case AXP717_ID: 1272 axp20x->nr_cells = ARRAY_SIZE(axp717_cells); 1273 axp20x->cells = axp717_cells; 1274 axp20x->regmap_cfg = &axp717_regmap_config; 1275 axp20x->regmap_irq_chip = &axp717_regmap_irq_chip; 1276 break; 1277 case AXP803_ID: 1278 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 1279 axp20x->cells = axp803_cells; 1280 axp20x->regmap_cfg = &axp288_regmap_config; 1281 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1282 break; 1283 case AXP806_ID: 1284 /* 1285 * Don't register the power key part if in slave mode or 1286 * if there is no interrupt line. 1287 */ 1288 if (of_property_read_bool(axp20x->dev->of_node, 1289 "x-powers,self-working-mode")) { 1290 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 1291 axp20x->cells = axp806_self_working_cells; 1292 } else { 1293 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 1294 axp20x->cells = axp806_cells; 1295 } 1296 nr_cells_no_irq = ARRAY_SIZE(axp806_cells); 1297 cells_no_irq = axp806_cells; 1298 axp20x->regmap_cfg = &axp806_regmap_config; 1299 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 1300 break; 1301 case AXP809_ID: 1302 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 1303 axp20x->cells = axp809_cells; 1304 axp20x->regmap_cfg = &axp22x_regmap_config; 1305 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 1306 break; 1307 case AXP813_ID: 1308 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 1309 axp20x->cells = axp813_cells; 1310 axp20x->regmap_cfg = &axp288_regmap_config; 1311 /* 1312 * The IRQ table given in the datasheet is incorrect. 1313 * In IRQ enable/status registers 1, there are separate 1314 * IRQs for ACIN and VBUS, instead of bits [7:5] being 1315 * the same as bits [4:2]. So it shares the same IRQs 1316 * as the AXP803, rather than the AXP288. 1317 */ 1318 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1319 break; 1320 case AXP15060_ID: 1321 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells); 1322 axp20x->cells = axp15060_cells; 1323 axp20x->regmap_cfg = &axp15060_regmap_config; 1324 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip; 1325 break; 1326 default: 1327 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 1328 return -EINVAL; 1329 } 1330 1331 /* 1332 * Use an alternative cell array when no interrupt line is connected, 1333 * since IRQs are required by some drivers. 1334 * The default is the safe "regulator-only", as this works fine without 1335 * an interrupt specified. 1336 */ 1337 if (axp20x->irq <= 0) { 1338 if (cells_no_irq) { 1339 axp20x->nr_cells = nr_cells_no_irq; 1340 axp20x->cells = cells_no_irq; 1341 } else { 1342 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells); 1343 axp20x->cells = axp_regulator_only_cells; 1344 } 1345 } 1346 1347 dev_info(dev, "AXP20x variant %s found\n", 1348 axp20x_model_names[axp20x->variant]); 1349 1350 return 0; 1351 } 1352 EXPORT_SYMBOL(axp20x_match_device); 1353 1354 int axp20x_device_probe(struct axp20x_dev *axp20x) 1355 { 1356 int ret; 1357 1358 /* 1359 * The AXP806 supports either master/standalone or slave mode. 1360 * Slave mode allows sharing the serial bus, even with multiple 1361 * AXP806 which all have the same hardware address. 1362 * 1363 * This is done with extra "serial interface address extension", 1364 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 1365 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1366 * 1 bit customizable at the factory, and 1 bit depending on the 1367 * state of an external pin. The latter is writable. The device 1368 * will only respond to operations to its other registers when 1369 * the these device addressing bits (in the upper 4 bits of the 1370 * registers) match. 1371 * 1372 * By default we support an AXP806 chained to an AXP809 in slave 1373 * mode. Boards which use an AXP806 in master mode can set the 1374 * property "x-powers,master-mode" to override the default. 1375 */ 1376 if (axp20x->variant == AXP806_ID) { 1377 if (of_property_read_bool(axp20x->dev->of_node, 1378 "x-powers,master-mode") || 1379 of_property_read_bool(axp20x->dev->of_node, 1380 "x-powers,self-working-mode")) 1381 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1382 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 1383 else 1384 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1385 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 1386 } 1387 1388 /* Only if there is an interrupt line connected towards the CPU. */ 1389 if (axp20x->irq > 0) { 1390 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 1391 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 1392 -1, axp20x->regmap_irq_chip, 1393 &axp20x->regmap_irqc); 1394 if (ret) { 1395 dev_err(axp20x->dev, "failed to add irq chip: %d\n", 1396 ret); 1397 return ret; 1398 } 1399 } 1400 1401 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 1402 axp20x->nr_cells, NULL, 0, NULL); 1403 1404 if (ret) { 1405 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 1406 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1407 return ret; 1408 } 1409 1410 if (axp20x->variant != AXP288_ID) 1411 devm_register_sys_off_handler(axp20x->dev, 1412 SYS_OFF_MODE_POWER_OFF, 1413 SYS_OFF_PRIO_DEFAULT, 1414 axp20x_power_off, axp20x); 1415 1416 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1417 1418 return 0; 1419 } 1420 EXPORT_SYMBOL(axp20x_device_probe); 1421 1422 void axp20x_device_remove(struct axp20x_dev *axp20x) 1423 { 1424 mfd_remove_devices(axp20x->dev); 1425 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1426 } 1427 EXPORT_SYMBOL(axp20x_device_remove); 1428 1429 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1430 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1431 MODULE_LICENSE("GPL"); 1432