1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MFD core driver for the X-Powers' Power Management ICs 4 * 5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 7 * as well as configurable GPIOs. 8 * 9 * This file contains the interface independent core functions. 10 * 11 * Copyright (C) 2014 Carlo Caione 12 * 13 * Author: Carlo Caione <carlo@caione.org> 14 */ 15 16 #include <linux/acpi.h> 17 #include <linux/bitops.h> 18 #include <linux/delay.h> 19 #include <linux/err.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/axp20x.h> 23 #include <linux/mfd/core.h> 24 #include <linux/module.h> 25 #include <linux/of.h> 26 #include <linux/property.h> 27 #include <linux/reboot.h> 28 #include <linux/regmap.h> 29 #include <linux/regulator/consumer.h> 30 31 #define AXP20X_OFF BIT(7) 32 33 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 35 36 static const char * const axp20x_model_names[] = { 37 "AXP152", 38 "AXP192", 39 "AXP202", 40 "AXP209", 41 "AXP221", 42 "AXP223", 43 "AXP288", 44 "AXP313a", 45 "AXP717", 46 "AXP803", 47 "AXP806", 48 "AXP809", 49 "AXP813", 50 "AXP15060", 51 }; 52 53 static const struct regmap_range axp152_writeable_ranges[] = { 54 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 55 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 56 }; 57 58 static const struct regmap_range axp152_volatile_ranges[] = { 59 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 60 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 61 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 62 }; 63 64 static const struct regmap_access_table axp152_writeable_table = { 65 .yes_ranges = axp152_writeable_ranges, 66 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 67 }; 68 69 static const struct regmap_access_table axp152_volatile_table = { 70 .yes_ranges = axp152_volatile_ranges, 71 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 72 }; 73 74 static const struct regmap_range axp20x_writeable_ranges[] = { 75 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 76 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 77 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 78 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 79 }; 80 81 static const struct regmap_range axp20x_volatile_ranges[] = { 82 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 83 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 84 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 85 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 86 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 87 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 88 }; 89 90 static const struct regmap_access_table axp20x_writeable_table = { 91 .yes_ranges = axp20x_writeable_ranges, 92 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 93 }; 94 95 static const struct regmap_access_table axp20x_volatile_table = { 96 .yes_ranges = axp20x_volatile_ranges, 97 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 98 }; 99 100 static const struct regmap_range axp192_writeable_ranges[] = { 101 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)), 102 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE), 103 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL), 104 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL), 105 }; 106 107 static const struct regmap_range axp192_volatile_ranges[] = { 108 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS), 109 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE), 110 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE), 111 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 112 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 113 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE), 114 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE), 115 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL), 116 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL), 117 }; 118 119 static const struct regmap_access_table axp192_writeable_table = { 120 .yes_ranges = axp192_writeable_ranges, 121 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges), 122 }; 123 124 static const struct regmap_access_table axp192_volatile_table = { 125 .yes_ranges = axp192_volatile_ranges, 126 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges), 127 }; 128 129 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 130 static const struct regmap_range axp22x_writeable_ranges[] = { 131 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 132 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 133 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 134 }; 135 136 static const struct regmap_range axp22x_volatile_ranges[] = { 137 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 138 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 139 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 140 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 141 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 142 }; 143 144 static const struct regmap_access_table axp22x_writeable_table = { 145 .yes_ranges = axp22x_writeable_ranges, 146 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 147 }; 148 149 static const struct regmap_access_table axp22x_volatile_table = { 150 .yes_ranges = axp22x_volatile_ranges, 151 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 152 }; 153 154 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 155 static const struct regmap_range axp288_writeable_ranges[] = { 156 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON), 157 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 158 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 159 }; 160 161 static const struct regmap_range axp288_volatile_ranges[] = { 162 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 163 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT), 164 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 165 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT), 166 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 167 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 168 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 169 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE), 170 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 171 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 172 }; 173 174 static const struct regmap_access_table axp288_writeable_table = { 175 .yes_ranges = axp288_writeable_ranges, 176 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 177 }; 178 179 static const struct regmap_access_table axp288_volatile_table = { 180 .yes_ranges = axp288_volatile_ranges, 181 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 182 }; 183 184 static const struct regmap_range axp806_writeable_ranges[] = { 185 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 186 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 187 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 188 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 189 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 190 }; 191 192 static const struct regmap_range axp313a_writeable_ranges[] = { 193 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE), 194 }; 195 196 static const struct regmap_range axp313a_volatile_ranges[] = { 197 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL), 198 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE), 199 }; 200 201 static const struct regmap_access_table axp313a_writeable_table = { 202 .yes_ranges = axp313a_writeable_ranges, 203 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges), 204 }; 205 206 static const struct regmap_access_table axp313a_volatile_table = { 207 .yes_ranges = axp313a_volatile_ranges, 208 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges), 209 }; 210 211 static const struct regmap_range axp717_writeable_ranges[] = { 212 regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN), 213 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE), 214 regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL), 215 }; 216 217 static const struct regmap_range axp717_volatile_ranges[] = { 218 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE), 219 }; 220 221 static const struct regmap_access_table axp717_writeable_table = { 222 .yes_ranges = axp717_writeable_ranges, 223 .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges), 224 }; 225 226 static const struct regmap_access_table axp717_volatile_table = { 227 .yes_ranges = axp717_volatile_ranges, 228 .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges), 229 }; 230 231 static const struct regmap_range axp806_volatile_ranges[] = { 232 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 233 }; 234 235 static const struct regmap_access_table axp806_writeable_table = { 236 .yes_ranges = axp806_writeable_ranges, 237 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 238 }; 239 240 static const struct regmap_access_table axp806_volatile_table = { 241 .yes_ranges = axp806_volatile_ranges, 242 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 243 }; 244 245 static const struct regmap_range axp15060_writeable_ranges[] = { 246 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2), 247 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL), 248 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 249 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY), 250 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN), 251 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 252 }; 253 254 static const struct regmap_range axp15060_volatile_ranges[] = { 255 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC), 256 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 257 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 258 }; 259 260 static const struct regmap_access_table axp15060_writeable_table = { 261 .yes_ranges = axp15060_writeable_ranges, 262 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges), 263 }; 264 265 static const struct regmap_access_table axp15060_volatile_table = { 266 .yes_ranges = axp15060_volatile_ranges, 267 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges), 268 }; 269 270 static const struct resource axp152_pek_resources[] = { 271 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 272 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 273 }; 274 275 static const struct resource axp192_ac_power_supply_resources[] = { 276 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 277 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 278 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 279 }; 280 281 static const struct resource axp192_usb_power_supply_resources[] = { 282 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 283 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 284 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"), 285 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 286 }; 287 288 static const struct resource axp20x_ac_power_supply_resources[] = { 289 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 290 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 291 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 292 }; 293 294 static const struct resource axp20x_pek_resources[] = { 295 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 296 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 297 }; 298 299 static const struct resource axp20x_usb_power_supply_resources[] = { 300 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 301 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 302 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 303 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 304 }; 305 306 static const struct resource axp22x_usb_power_supply_resources[] = { 307 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 308 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 309 }; 310 311 /* AXP803 and AXP813/AXP818 share the same interrupts */ 312 static const struct resource axp803_usb_power_supply_resources[] = { 313 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 314 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 315 }; 316 317 static const struct resource axp22x_pek_resources[] = { 318 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 319 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 320 }; 321 322 static const struct resource axp288_power_button_resources[] = { 323 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 324 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 325 }; 326 327 static const struct resource axp288_fuel_gauge_resources[] = { 328 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 329 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 330 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 331 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 332 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 333 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 334 }; 335 336 static const struct resource axp313a_pek_resources[] = { 337 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 338 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 339 }; 340 341 static const struct resource axp717_pek_resources[] = { 342 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 343 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 344 }; 345 346 static const struct resource axp803_pek_resources[] = { 347 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 348 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 349 }; 350 351 static const struct resource axp806_pek_resources[] = { 352 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 353 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 354 }; 355 356 static const struct resource axp809_pek_resources[] = { 357 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 358 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 359 }; 360 361 static const struct resource axp15060_pek_resources[] = { 362 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 363 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 364 }; 365 366 static const struct regmap_config axp152_regmap_config = { 367 .reg_bits = 8, 368 .val_bits = 8, 369 .wr_table = &axp152_writeable_table, 370 .volatile_table = &axp152_volatile_table, 371 .max_register = AXP152_PWM1_DUTY_CYCLE, 372 .cache_type = REGCACHE_MAPLE, 373 }; 374 375 static const struct regmap_config axp192_regmap_config = { 376 .reg_bits = 8, 377 .val_bits = 8, 378 .wr_table = &axp192_writeable_table, 379 .volatile_table = &axp192_volatile_table, 380 .max_register = AXP20X_CC_CTRL, 381 .cache_type = REGCACHE_MAPLE, 382 }; 383 384 static const struct regmap_config axp20x_regmap_config = { 385 .reg_bits = 8, 386 .val_bits = 8, 387 .wr_table = &axp20x_writeable_table, 388 .volatile_table = &axp20x_volatile_table, 389 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 390 .cache_type = REGCACHE_MAPLE, 391 }; 392 393 static const struct regmap_config axp22x_regmap_config = { 394 .reg_bits = 8, 395 .val_bits = 8, 396 .wr_table = &axp22x_writeable_table, 397 .volatile_table = &axp22x_volatile_table, 398 .max_register = AXP22X_BATLOW_THRES1, 399 .cache_type = REGCACHE_MAPLE, 400 }; 401 402 static const struct regmap_config axp288_regmap_config = { 403 .reg_bits = 8, 404 .val_bits = 8, 405 .wr_table = &axp288_writeable_table, 406 .volatile_table = &axp288_volatile_table, 407 .max_register = AXP288_FG_TUNE5, 408 .cache_type = REGCACHE_MAPLE, 409 }; 410 411 static const struct regmap_config axp313a_regmap_config = { 412 .reg_bits = 8, 413 .val_bits = 8, 414 .wr_table = &axp313a_writeable_table, 415 .volatile_table = &axp313a_volatile_table, 416 .max_register = AXP313A_IRQ_STATE, 417 .cache_type = REGCACHE_MAPLE, 418 }; 419 420 static const struct regmap_config axp717_regmap_config = { 421 .reg_bits = 8, 422 .val_bits = 8, 423 .wr_table = &axp717_writeable_table, 424 .volatile_table = &axp717_volatile_table, 425 .max_register = AXP717_CPUSLDO_CONTROL, 426 .cache_type = REGCACHE_MAPLE, 427 }; 428 429 static const struct regmap_config axp806_regmap_config = { 430 .reg_bits = 8, 431 .val_bits = 8, 432 .wr_table = &axp806_writeable_table, 433 .volatile_table = &axp806_volatile_table, 434 .max_register = AXP806_REG_ADDR_EXT, 435 .cache_type = REGCACHE_MAPLE, 436 }; 437 438 static const struct regmap_config axp15060_regmap_config = { 439 .reg_bits = 8, 440 .val_bits = 8, 441 .wr_table = &axp15060_writeable_table, 442 .volatile_table = &axp15060_volatile_table, 443 .max_register = AXP15060_IRQ2_STATE, 444 .cache_type = REGCACHE_MAPLE, 445 }; 446 447 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 448 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 449 450 static const struct regmap_irq axp152_regmap_irqs[] = { 451 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 452 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 453 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 454 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 455 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 456 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 457 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 458 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 459 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 460 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 461 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 462 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 463 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 464 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 465 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 466 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 467 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 468 }; 469 470 static const struct regmap_irq axp192_regmap_irqs[] = { 471 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7), 472 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6), 473 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5), 474 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4), 475 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3), 476 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2), 477 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1), 478 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7), 479 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6), 480 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5), 481 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4), 482 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3), 483 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2), 484 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1), 485 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0), 486 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7), 487 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6), 488 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5), 489 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4), 490 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3), 491 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1), 492 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0), 493 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7), 494 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6), 495 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5), 496 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4), 497 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3), 498 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2), 499 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0), 500 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7), 501 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2), 502 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1), 503 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0), 504 }; 505 506 static const struct regmap_irq axp20x_regmap_irqs[] = { 507 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 508 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 509 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 510 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 511 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 512 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 513 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 514 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 515 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 516 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 517 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 518 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 519 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 520 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 521 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 522 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 523 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 524 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 525 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 526 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 527 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 528 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 529 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 530 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 531 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 532 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 533 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 534 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 535 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 536 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 537 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 538 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 539 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 540 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 541 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 542 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 543 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 544 }; 545 546 static const struct regmap_irq axp22x_regmap_irqs[] = { 547 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 548 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 549 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 550 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 551 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 552 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 553 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 554 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 555 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 556 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 557 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 558 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 559 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 560 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 561 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 562 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 563 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 564 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 565 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 566 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 567 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 568 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 569 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 570 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 571 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 572 }; 573 574 /* some IRQs are compatible with axp20x models */ 575 static const struct regmap_irq axp288_regmap_irqs[] = { 576 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 577 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 578 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 579 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 580 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 581 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 582 583 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 584 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 585 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 586 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 587 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 588 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 589 590 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 591 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 592 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 593 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 594 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 595 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 596 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 597 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 598 599 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 600 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 601 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 602 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 603 604 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 605 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 606 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 607 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 608 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 609 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 610 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 611 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 612 613 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 614 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 615 }; 616 617 static const struct regmap_irq axp313a_regmap_irqs[] = { 618 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7), 619 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6), 620 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5), 621 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4), 622 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3), 623 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2), 624 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), 625 }; 626 627 static const struct regmap_irq axp717_regmap_irqs[] = { 628 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7), 629 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6), 630 INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC, 0, 4), 631 INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V, 0, 2), 632 INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V, 0, 1), 633 INIT_REGMAP_IRQ(AXP717, VBUS_FAULT, 0, 0), 634 INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN, 1, 7), 635 INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL, 1, 6), 636 INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN, 1, 5), 637 INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL, 1, 4), 638 INIT_REGMAP_IRQ(AXP717, PEK_SHORT, 1, 3), 639 INIT_REGMAP_IRQ(AXP717, PEK_LONG, 1, 2), 640 INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE, 1, 1), 641 INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE, 1, 0), 642 INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE, 2, 7), 643 INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR, 2, 6), 644 INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR, 2, 5), 645 INIT_REGMAP_IRQ(AXP717, CHARG_DONE, 2, 4), 646 INIT_REGMAP_IRQ(AXP717, CHARG, 2, 3), 647 INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH, 2, 2), 648 INIT_REGMAP_IRQ(AXP717, CHARG_TIMER, 2, 1), 649 INIT_REGMAP_IRQ(AXP717, BATT_OVER_V, 2, 0), 650 INIT_REGMAP_IRQ(AXP717, BC_USB_DONE, 3, 7), 651 INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG, 3, 6), 652 INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH, 3, 4), 653 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH, 3, 3), 654 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW, 3, 2), 655 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH, 3, 1), 656 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW, 3, 0), 657 INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE, 4, 6), 658 INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN, 4, 5), 659 }; 660 661 static const struct regmap_irq axp803_regmap_irqs[] = { 662 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 663 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 664 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 665 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 666 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 667 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 668 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 669 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 670 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 671 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 672 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 673 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 674 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 675 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 676 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 677 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 678 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 679 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 680 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 681 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 682 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 683 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 684 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 685 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 686 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 687 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 688 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 689 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 690 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 691 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 692 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 693 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 694 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 695 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 696 }; 697 698 static const struct regmap_irq axp806_regmap_irqs[] = { 699 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 700 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 701 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 702 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 703 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 704 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 705 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 706 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 707 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 708 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 709 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 710 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 711 }; 712 713 static const struct regmap_irq axp809_regmap_irqs[] = { 714 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 715 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 716 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 717 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 718 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 719 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 720 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 721 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 722 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 723 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 724 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 725 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 726 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 727 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 728 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 729 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 730 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 731 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 732 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 733 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 734 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 735 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 736 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 737 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 738 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 739 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 740 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 741 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 742 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 743 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 744 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 745 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 746 }; 747 748 static const struct regmap_irq axp15060_regmap_irqs[] = { 749 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0), 750 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1), 751 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2), 752 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3), 753 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4), 754 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5), 755 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6), 756 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7), 757 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0), 758 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1), 759 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2), 760 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3), 761 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4), 762 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5), 763 }; 764 765 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 766 .name = "axp152_irq_chip", 767 .status_base = AXP152_IRQ1_STATE, 768 .ack_base = AXP152_IRQ1_STATE, 769 .unmask_base = AXP152_IRQ1_EN, 770 .init_ack_masked = true, 771 .irqs = axp152_regmap_irqs, 772 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 773 .num_regs = 3, 774 }; 775 776 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data, 777 unsigned int base, int index) 778 { 779 /* linear mapping for IRQ1 to IRQ4 */ 780 if (index < 4) 781 return base + index; 782 783 /* handle IRQ5 separately */ 784 if (base == AXP192_IRQ1_EN) 785 return AXP192_IRQ5_EN; 786 787 return AXP192_IRQ5_STATE; 788 } 789 790 static const struct regmap_irq_chip axp192_regmap_irq_chip = { 791 .name = "axp192_irq_chip", 792 .status_base = AXP192_IRQ1_STATE, 793 .ack_base = AXP192_IRQ1_STATE, 794 .unmask_base = AXP192_IRQ1_EN, 795 .init_ack_masked = true, 796 .irqs = axp192_regmap_irqs, 797 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs), 798 .num_regs = 5, 799 .get_irq_reg = axp192_get_irq_reg, 800 }; 801 802 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 803 .name = "axp20x_irq_chip", 804 .status_base = AXP20X_IRQ1_STATE, 805 .ack_base = AXP20X_IRQ1_STATE, 806 .unmask_base = AXP20X_IRQ1_EN, 807 .init_ack_masked = true, 808 .irqs = axp20x_regmap_irqs, 809 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 810 .num_regs = 5, 811 812 }; 813 814 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 815 .name = "axp22x_irq_chip", 816 .status_base = AXP20X_IRQ1_STATE, 817 .ack_base = AXP20X_IRQ1_STATE, 818 .unmask_base = AXP20X_IRQ1_EN, 819 .init_ack_masked = true, 820 .irqs = axp22x_regmap_irqs, 821 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 822 .num_regs = 5, 823 }; 824 825 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 826 .name = "axp288_irq_chip", 827 .status_base = AXP20X_IRQ1_STATE, 828 .ack_base = AXP20X_IRQ1_STATE, 829 .unmask_base = AXP20X_IRQ1_EN, 830 .init_ack_masked = true, 831 .irqs = axp288_regmap_irqs, 832 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 833 .num_regs = 6, 834 835 }; 836 837 static const struct regmap_irq_chip axp313a_regmap_irq_chip = { 838 .name = "axp313a_irq_chip", 839 .status_base = AXP313A_IRQ_STATE, 840 .ack_base = AXP313A_IRQ_STATE, 841 .unmask_base = AXP313A_IRQ_EN, 842 .init_ack_masked = true, 843 .irqs = axp313a_regmap_irqs, 844 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs), 845 .num_regs = 1, 846 }; 847 848 static const struct regmap_irq_chip axp717_regmap_irq_chip = { 849 .name = "axp717_irq_chip", 850 .status_base = AXP717_IRQ0_STATE, 851 .ack_base = AXP717_IRQ0_STATE, 852 .unmask_base = AXP717_IRQ0_EN, 853 .init_ack_masked = true, 854 .irqs = axp717_regmap_irqs, 855 .num_irqs = ARRAY_SIZE(axp717_regmap_irqs), 856 .num_regs = 5, 857 }; 858 859 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 860 .name = "axp803", 861 .status_base = AXP20X_IRQ1_STATE, 862 .ack_base = AXP20X_IRQ1_STATE, 863 .unmask_base = AXP20X_IRQ1_EN, 864 .init_ack_masked = true, 865 .irqs = axp803_regmap_irqs, 866 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 867 .num_regs = 6, 868 }; 869 870 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 871 .name = "axp806", 872 .status_base = AXP20X_IRQ1_STATE, 873 .ack_base = AXP20X_IRQ1_STATE, 874 .unmask_base = AXP20X_IRQ1_EN, 875 .init_ack_masked = true, 876 .irqs = axp806_regmap_irqs, 877 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 878 .num_regs = 2, 879 }; 880 881 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 882 .name = "axp809", 883 .status_base = AXP20X_IRQ1_STATE, 884 .ack_base = AXP20X_IRQ1_STATE, 885 .unmask_base = AXP20X_IRQ1_EN, 886 .init_ack_masked = true, 887 .irqs = axp809_regmap_irqs, 888 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 889 .num_regs = 5, 890 }; 891 892 static const struct regmap_irq_chip axp15060_regmap_irq_chip = { 893 .name = "axp15060", 894 .status_base = AXP15060_IRQ1_STATE, 895 .ack_base = AXP15060_IRQ1_STATE, 896 .unmask_base = AXP15060_IRQ1_EN, 897 .init_ack_masked = true, 898 .irqs = axp15060_regmap_irqs, 899 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs), 900 .num_regs = 2, 901 }; 902 903 static const struct mfd_cell axp192_cells[] = { 904 { 905 .name = "axp192-adc", 906 .of_compatible = "x-powers,axp192-adc", 907 }, { 908 .name = "axp20x-battery-power-supply", 909 .of_compatible = "x-powers,axp192-battery-power-supply", 910 }, { 911 .name = "axp20x-ac-power-supply", 912 .of_compatible = "x-powers,axp202-ac-power-supply", 913 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources), 914 .resources = axp192_ac_power_supply_resources, 915 }, { 916 .name = "axp20x-usb-power-supply", 917 .of_compatible = "x-powers,axp192-usb-power-supply", 918 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources), 919 .resources = axp192_usb_power_supply_resources, 920 }, 921 { .name = "axp20x-regulator" }, 922 }; 923 924 static const struct mfd_cell axp20x_cells[] = { 925 { 926 .name = "axp20x-gpio", 927 .of_compatible = "x-powers,axp209-gpio", 928 }, { 929 .name = "axp20x-pek", 930 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 931 .resources = axp20x_pek_resources, 932 }, { 933 .name = "axp20x-regulator", 934 }, { 935 .name = "axp20x-adc", 936 .of_compatible = "x-powers,axp209-adc", 937 }, { 938 .name = "axp20x-battery-power-supply", 939 .of_compatible = "x-powers,axp209-battery-power-supply", 940 }, { 941 .name = "axp20x-ac-power-supply", 942 .of_compatible = "x-powers,axp202-ac-power-supply", 943 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 944 .resources = axp20x_ac_power_supply_resources, 945 }, { 946 .name = "axp20x-usb-power-supply", 947 .of_compatible = "x-powers,axp202-usb-power-supply", 948 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 949 .resources = axp20x_usb_power_supply_resources, 950 }, 951 }; 952 953 static const struct mfd_cell axp221_cells[] = { 954 { 955 .name = "axp20x-gpio", 956 .of_compatible = "x-powers,axp221-gpio", 957 }, { 958 .name = "axp221-pek", 959 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 960 .resources = axp22x_pek_resources, 961 }, { 962 .name = "axp20x-regulator", 963 }, { 964 .name = "axp22x-adc", 965 .of_compatible = "x-powers,axp221-adc", 966 }, { 967 .name = "axp20x-ac-power-supply", 968 .of_compatible = "x-powers,axp221-ac-power-supply", 969 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 970 .resources = axp20x_ac_power_supply_resources, 971 }, { 972 .name = "axp20x-battery-power-supply", 973 .of_compatible = "x-powers,axp221-battery-power-supply", 974 }, { 975 .name = "axp20x-usb-power-supply", 976 .of_compatible = "x-powers,axp221-usb-power-supply", 977 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 978 .resources = axp22x_usb_power_supply_resources, 979 }, 980 }; 981 982 static const struct mfd_cell axp223_cells[] = { 983 { 984 .name = "axp20x-gpio", 985 .of_compatible = "x-powers,axp221-gpio", 986 }, { 987 .name = "axp221-pek", 988 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 989 .resources = axp22x_pek_resources, 990 }, { 991 .name = "axp22x-adc", 992 .of_compatible = "x-powers,axp221-adc", 993 }, { 994 .name = "axp20x-battery-power-supply", 995 .of_compatible = "x-powers,axp221-battery-power-supply", 996 }, { 997 .name = "axp20x-regulator", 998 }, { 999 .name = "axp20x-ac-power-supply", 1000 .of_compatible = "x-powers,axp221-ac-power-supply", 1001 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1002 .resources = axp20x_ac_power_supply_resources, 1003 }, { 1004 .name = "axp20x-usb-power-supply", 1005 .of_compatible = "x-powers,axp223-usb-power-supply", 1006 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 1007 .resources = axp22x_usb_power_supply_resources, 1008 }, 1009 }; 1010 1011 static const struct mfd_cell axp152_cells[] = { 1012 { 1013 .name = "axp20x-pek", 1014 .num_resources = ARRAY_SIZE(axp152_pek_resources), 1015 .resources = axp152_pek_resources, 1016 }, 1017 }; 1018 1019 static struct mfd_cell axp313a_cells[] = { 1020 MFD_CELL_NAME("axp20x-regulator"), 1021 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), 1022 }; 1023 1024 static struct mfd_cell axp717_cells[] = { 1025 MFD_CELL_NAME("axp20x-regulator"), 1026 MFD_CELL_RES("axp20x-pek", axp717_pek_resources), 1027 }; 1028 1029 static const struct resource axp288_adc_resources[] = { 1030 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 1031 }; 1032 1033 static const struct resource axp288_extcon_resources[] = { 1034 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 1035 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 1036 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 1037 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 1038 }; 1039 1040 static const struct resource axp288_charger_resources[] = { 1041 DEFINE_RES_IRQ(AXP288_IRQ_OV), 1042 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 1043 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 1044 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 1045 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 1046 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 1047 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 1048 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 1049 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 1050 }; 1051 1052 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" }; 1053 1054 static const struct property_entry axp288_fuel_gauge_properties[] = { 1055 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers), 1056 { } 1057 }; 1058 1059 static const struct software_node axp288_fuel_gauge_sw_node = { 1060 .name = "axp288_fuel_gauge", 1061 .properties = axp288_fuel_gauge_properties, 1062 }; 1063 1064 static const struct mfd_cell axp288_cells[] = { 1065 { 1066 .name = "axp288_adc", 1067 .num_resources = ARRAY_SIZE(axp288_adc_resources), 1068 .resources = axp288_adc_resources, 1069 }, { 1070 .name = "axp288_extcon", 1071 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 1072 .resources = axp288_extcon_resources, 1073 }, { 1074 .name = "axp288_charger", 1075 .num_resources = ARRAY_SIZE(axp288_charger_resources), 1076 .resources = axp288_charger_resources, 1077 }, { 1078 .name = "axp288_fuel_gauge", 1079 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 1080 .resources = axp288_fuel_gauge_resources, 1081 .swnode = &axp288_fuel_gauge_sw_node, 1082 }, { 1083 .name = "axp221-pek", 1084 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 1085 .resources = axp288_power_button_resources, 1086 }, { 1087 .name = "axp288_pmic_acpi", 1088 }, 1089 }; 1090 1091 static const struct mfd_cell axp803_cells[] = { 1092 { 1093 .name = "axp221-pek", 1094 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1095 .resources = axp803_pek_resources, 1096 }, { 1097 .name = "axp20x-gpio", 1098 .of_compatible = "x-powers,axp813-gpio", 1099 }, { 1100 .name = "axp813-adc", 1101 .of_compatible = "x-powers,axp813-adc", 1102 }, { 1103 .name = "axp20x-battery-power-supply", 1104 .of_compatible = "x-powers,axp813-battery-power-supply", 1105 }, { 1106 .name = "axp20x-ac-power-supply", 1107 .of_compatible = "x-powers,axp813-ac-power-supply", 1108 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1109 .resources = axp20x_ac_power_supply_resources, 1110 }, { 1111 .name = "axp20x-usb-power-supply", 1112 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1113 .resources = axp803_usb_power_supply_resources, 1114 .of_compatible = "x-powers,axp813-usb-power-supply", 1115 }, 1116 { .name = "axp20x-regulator" }, 1117 }; 1118 1119 static const struct mfd_cell axp806_self_working_cells[] = { 1120 { 1121 .name = "axp221-pek", 1122 .num_resources = ARRAY_SIZE(axp806_pek_resources), 1123 .resources = axp806_pek_resources, 1124 }, 1125 { .name = "axp20x-regulator" }, 1126 }; 1127 1128 static const struct mfd_cell axp806_cells[] = { 1129 { 1130 .id = 2, 1131 .name = "axp20x-regulator", 1132 }, 1133 }; 1134 1135 static const struct mfd_cell axp809_cells[] = { 1136 { 1137 .name = "axp20x-gpio", 1138 .of_compatible = "x-powers,axp221-gpio", 1139 }, { 1140 .name = "axp221-pek", 1141 .num_resources = ARRAY_SIZE(axp809_pek_resources), 1142 .resources = axp809_pek_resources, 1143 }, { 1144 .id = 1, 1145 .name = "axp20x-regulator", 1146 }, 1147 }; 1148 1149 static const struct mfd_cell axp813_cells[] = { 1150 { 1151 .name = "axp221-pek", 1152 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1153 .resources = axp803_pek_resources, 1154 }, { 1155 .name = "axp20x-regulator", 1156 }, { 1157 .name = "axp20x-gpio", 1158 .of_compatible = "x-powers,axp813-gpio", 1159 }, { 1160 .name = "axp813-adc", 1161 .of_compatible = "x-powers,axp813-adc", 1162 }, { 1163 .name = "axp20x-battery-power-supply", 1164 .of_compatible = "x-powers,axp813-battery-power-supply", 1165 }, { 1166 .name = "axp20x-ac-power-supply", 1167 .of_compatible = "x-powers,axp813-ac-power-supply", 1168 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1169 .resources = axp20x_ac_power_supply_resources, 1170 }, { 1171 .name = "axp20x-usb-power-supply", 1172 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1173 .resources = axp803_usb_power_supply_resources, 1174 .of_compatible = "x-powers,axp813-usb-power-supply", 1175 }, 1176 }; 1177 1178 static const struct mfd_cell axp15060_cells[] = { 1179 { 1180 .name = "axp221-pek", 1181 .num_resources = ARRAY_SIZE(axp15060_pek_resources), 1182 .resources = axp15060_pek_resources, 1183 }, { 1184 .name = "axp20x-regulator", 1185 }, 1186 }; 1187 1188 /* For boards that don't have IRQ line connected to SOC. */ 1189 static const struct mfd_cell axp_regulator_only_cells[] = { 1190 { 1191 .name = "axp20x-regulator", 1192 }, 1193 }; 1194 1195 static int axp20x_power_off(struct sys_off_data *data) 1196 { 1197 struct axp20x_dev *axp20x = data->cb_data; 1198 unsigned int shutdown_reg; 1199 1200 switch (axp20x->variant) { 1201 case AXP313A_ID: 1202 shutdown_reg = AXP313A_SHUTDOWN_CTRL; 1203 break; 1204 default: 1205 shutdown_reg = AXP20X_OFF_CTRL; 1206 break; 1207 } 1208 1209 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF); 1210 1211 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 1212 mdelay(500); 1213 1214 return NOTIFY_DONE; 1215 } 1216 1217 int axp20x_match_device(struct axp20x_dev *axp20x) 1218 { 1219 struct device *dev = axp20x->dev; 1220 const struct mfd_cell *cells_no_irq = NULL; 1221 int nr_cells_no_irq = 0; 1222 1223 axp20x->variant = (long)device_get_match_data(dev); 1224 switch (axp20x->variant) { 1225 case AXP152_ID: 1226 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 1227 axp20x->cells = axp152_cells; 1228 axp20x->regmap_cfg = &axp152_regmap_config; 1229 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 1230 break; 1231 case AXP192_ID: 1232 axp20x->nr_cells = ARRAY_SIZE(axp192_cells); 1233 axp20x->cells = axp192_cells; 1234 axp20x->regmap_cfg = &axp192_regmap_config; 1235 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip; 1236 break; 1237 case AXP202_ID: 1238 case AXP209_ID: 1239 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 1240 axp20x->cells = axp20x_cells; 1241 axp20x->regmap_cfg = &axp20x_regmap_config; 1242 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 1243 break; 1244 case AXP221_ID: 1245 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 1246 axp20x->cells = axp221_cells; 1247 axp20x->regmap_cfg = &axp22x_regmap_config; 1248 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1249 break; 1250 case AXP223_ID: 1251 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 1252 axp20x->cells = axp223_cells; 1253 axp20x->regmap_cfg = &axp22x_regmap_config; 1254 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1255 break; 1256 case AXP288_ID: 1257 axp20x->cells = axp288_cells; 1258 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 1259 axp20x->regmap_cfg = &axp288_regmap_config; 1260 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 1261 axp20x->irq_flags = IRQF_TRIGGER_LOW; 1262 break; 1263 case AXP313A_ID: 1264 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 1265 axp20x->cells = axp313a_cells; 1266 axp20x->regmap_cfg = &axp313a_regmap_config; 1267 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 1268 break; 1269 case AXP717_ID: 1270 axp20x->nr_cells = ARRAY_SIZE(axp717_cells); 1271 axp20x->cells = axp717_cells; 1272 axp20x->regmap_cfg = &axp717_regmap_config; 1273 axp20x->regmap_irq_chip = &axp717_regmap_irq_chip; 1274 break; 1275 case AXP803_ID: 1276 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 1277 axp20x->cells = axp803_cells; 1278 axp20x->regmap_cfg = &axp288_regmap_config; 1279 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1280 break; 1281 case AXP806_ID: 1282 /* 1283 * Don't register the power key part if in slave mode or 1284 * if there is no interrupt line. 1285 */ 1286 if (of_property_read_bool(axp20x->dev->of_node, 1287 "x-powers,self-working-mode")) { 1288 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 1289 axp20x->cells = axp806_self_working_cells; 1290 } else { 1291 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 1292 axp20x->cells = axp806_cells; 1293 } 1294 nr_cells_no_irq = ARRAY_SIZE(axp806_cells); 1295 cells_no_irq = axp806_cells; 1296 axp20x->regmap_cfg = &axp806_regmap_config; 1297 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 1298 break; 1299 case AXP809_ID: 1300 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 1301 axp20x->cells = axp809_cells; 1302 axp20x->regmap_cfg = &axp22x_regmap_config; 1303 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 1304 break; 1305 case AXP813_ID: 1306 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 1307 axp20x->cells = axp813_cells; 1308 axp20x->regmap_cfg = &axp288_regmap_config; 1309 /* 1310 * The IRQ table given in the datasheet is incorrect. 1311 * In IRQ enable/status registers 1, there are separate 1312 * IRQs for ACIN and VBUS, instead of bits [7:5] being 1313 * the same as bits [4:2]. So it shares the same IRQs 1314 * as the AXP803, rather than the AXP288. 1315 */ 1316 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1317 break; 1318 case AXP15060_ID: 1319 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells); 1320 axp20x->cells = axp15060_cells; 1321 axp20x->regmap_cfg = &axp15060_regmap_config; 1322 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip; 1323 break; 1324 default: 1325 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 1326 return -EINVAL; 1327 } 1328 1329 /* 1330 * Use an alternative cell array when no interrupt line is connected, 1331 * since IRQs are required by some drivers. 1332 * The default is the safe "regulator-only", as this works fine without 1333 * an interrupt specified. 1334 */ 1335 if (axp20x->irq <= 0) { 1336 if (cells_no_irq) { 1337 axp20x->nr_cells = nr_cells_no_irq; 1338 axp20x->cells = cells_no_irq; 1339 } else { 1340 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells); 1341 axp20x->cells = axp_regulator_only_cells; 1342 } 1343 } 1344 1345 dev_info(dev, "AXP20x variant %s found\n", 1346 axp20x_model_names[axp20x->variant]); 1347 1348 return 0; 1349 } 1350 EXPORT_SYMBOL(axp20x_match_device); 1351 1352 int axp20x_device_probe(struct axp20x_dev *axp20x) 1353 { 1354 int ret; 1355 1356 /* 1357 * The AXP806 supports either master/standalone or slave mode. 1358 * Slave mode allows sharing the serial bus, even with multiple 1359 * AXP806 which all have the same hardware address. 1360 * 1361 * This is done with extra "serial interface address extension", 1362 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 1363 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1364 * 1 bit customizable at the factory, and 1 bit depending on the 1365 * state of an external pin. The latter is writable. The device 1366 * will only respond to operations to its other registers when 1367 * the these device addressing bits (in the upper 4 bits of the 1368 * registers) match. 1369 * 1370 * By default we support an AXP806 chained to an AXP809 in slave 1371 * mode. Boards which use an AXP806 in master mode can set the 1372 * property "x-powers,master-mode" to override the default. 1373 */ 1374 if (axp20x->variant == AXP806_ID) { 1375 if (of_property_read_bool(axp20x->dev->of_node, 1376 "x-powers,master-mode") || 1377 of_property_read_bool(axp20x->dev->of_node, 1378 "x-powers,self-working-mode")) 1379 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1380 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 1381 else 1382 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1383 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 1384 } 1385 1386 /* Only if there is an interrupt line connected towards the CPU. */ 1387 if (axp20x->irq > 0) { 1388 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 1389 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 1390 -1, axp20x->regmap_irq_chip, 1391 &axp20x->regmap_irqc); 1392 if (ret) { 1393 dev_err(axp20x->dev, "failed to add irq chip: %d\n", 1394 ret); 1395 return ret; 1396 } 1397 } 1398 1399 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 1400 axp20x->nr_cells, NULL, 0, NULL); 1401 1402 if (ret) { 1403 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 1404 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1405 return ret; 1406 } 1407 1408 if (axp20x->variant != AXP288_ID) 1409 devm_register_sys_off_handler(axp20x->dev, 1410 SYS_OFF_MODE_POWER_OFF, 1411 SYS_OFF_PRIO_DEFAULT, 1412 axp20x_power_off, axp20x); 1413 1414 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1415 1416 return 0; 1417 } 1418 EXPORT_SYMBOL(axp20x_device_probe); 1419 1420 void axp20x_device_remove(struct axp20x_dev *axp20x) 1421 { 1422 mfd_remove_devices(axp20x->dev); 1423 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1424 } 1425 EXPORT_SYMBOL(axp20x_device_remove); 1426 1427 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1428 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1429 MODULE_LICENSE("GPL"); 1430