1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MFD core driver for the X-Powers' Power Management ICs 4 * 5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 7 * as well as configurable GPIOs. 8 * 9 * This file contains the interface independent core functions. 10 * 11 * Copyright (C) 2014 Carlo Caione 12 * 13 * Author: Carlo Caione <carlo@caione.org> 14 */ 15 16 #include <linux/acpi.h> 17 #include <linux/bitops.h> 18 #include <linux/delay.h> 19 #include <linux/err.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/mfd/axp20x.h> 23 #include <linux/mfd/core.h> 24 #include <linux/module.h> 25 #include <linux/of.h> 26 #include <linux/property.h> 27 #include <linux/reboot.h> 28 #include <linux/regmap.h> 29 #include <linux/regulator/consumer.h> 30 31 #define AXP20X_OFF BIT(7) 32 33 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 35 36 static const char * const axp20x_model_names[] = { 37 [AXP152_ID] = "AXP152", 38 [AXP192_ID] = "AXP192", 39 [AXP202_ID] = "AXP202", 40 [AXP209_ID] = "AXP209", 41 [AXP221_ID] = "AXP221", 42 [AXP223_ID] = "AXP223", 43 [AXP288_ID] = "AXP288", 44 [AXP313A_ID] = "AXP313a", 45 [AXP323_ID] = "AXP323", 46 [AXP717_ID] = "AXP717", 47 [AXP803_ID] = "AXP803", 48 [AXP806_ID] = "AXP806", 49 [AXP809_ID] = "AXP809", 50 [AXP813_ID] = "AXP813", 51 [AXP15060_ID] = "AXP15060", 52 }; 53 54 static const struct regmap_range axp152_writeable_ranges[] = { 55 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 56 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 57 }; 58 59 static const struct regmap_range axp152_volatile_ranges[] = { 60 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 61 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 62 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 63 }; 64 65 static const struct regmap_access_table axp152_writeable_table = { 66 .yes_ranges = axp152_writeable_ranges, 67 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 68 }; 69 70 static const struct regmap_access_table axp152_volatile_table = { 71 .yes_ranges = axp152_volatile_ranges, 72 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 73 }; 74 75 static const struct regmap_range axp20x_writeable_ranges[] = { 76 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 77 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 78 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 79 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 80 }; 81 82 static const struct regmap_range axp20x_volatile_ranges[] = { 83 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 84 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 85 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 86 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 87 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 88 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 89 }; 90 91 static const struct regmap_access_table axp20x_writeable_table = { 92 .yes_ranges = axp20x_writeable_ranges, 93 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 94 }; 95 96 static const struct regmap_access_table axp20x_volatile_table = { 97 .yes_ranges = axp20x_volatile_ranges, 98 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 99 }; 100 101 static const struct regmap_range axp192_writeable_ranges[] = { 102 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)), 103 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE), 104 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL), 105 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL), 106 }; 107 108 static const struct regmap_range axp192_volatile_ranges[] = { 109 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS), 110 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE), 111 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE), 112 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 113 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 114 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE), 115 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE), 116 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL), 117 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL), 118 }; 119 120 static const struct regmap_access_table axp192_writeable_table = { 121 .yes_ranges = axp192_writeable_ranges, 122 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges), 123 }; 124 125 static const struct regmap_access_table axp192_volatile_table = { 126 .yes_ranges = axp192_volatile_ranges, 127 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges), 128 }; 129 130 /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 131 static const struct regmap_range axp22x_writeable_ranges[] = { 132 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 133 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 134 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 135 }; 136 137 static const struct regmap_range axp22x_volatile_ranges[] = { 138 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 139 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 140 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 141 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 142 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 143 }; 144 145 static const struct regmap_access_table axp22x_writeable_table = { 146 .yes_ranges = axp22x_writeable_ranges, 147 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 148 }; 149 150 static const struct regmap_access_table axp22x_volatile_table = { 151 .yes_ranges = axp22x_volatile_ranges, 152 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 153 }; 154 155 /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 156 static const struct regmap_range axp288_writeable_ranges[] = { 157 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON), 158 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 159 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 160 }; 161 162 static const struct regmap_range axp288_volatile_ranges[] = { 163 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 164 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT), 165 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 166 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT), 167 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 168 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 169 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 170 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE), 171 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 172 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 173 }; 174 175 static const struct regmap_access_table axp288_writeable_table = { 176 .yes_ranges = axp288_writeable_ranges, 177 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 178 }; 179 180 static const struct regmap_access_table axp288_volatile_table = { 181 .yes_ranges = axp288_volatile_ranges, 182 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 183 }; 184 185 static const struct regmap_range axp806_writeable_ranges[] = { 186 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 187 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 188 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 189 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 190 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 191 }; 192 193 static const struct regmap_range axp313a_writeable_ranges[] = { 194 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE), 195 }; 196 197 static const struct regmap_range axp323_writeable_ranges[] = { 198 regmap_reg_range(AXP313A_ON_INDICATE, AXP323_DCDC_MODE_CTRL2), 199 }; 200 201 static const struct regmap_range axp313a_volatile_ranges[] = { 202 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL), 203 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE), 204 }; 205 206 static const struct regmap_access_table axp313a_writeable_table = { 207 .yes_ranges = axp313a_writeable_ranges, 208 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges), 209 }; 210 211 static const struct regmap_access_table axp323_writeable_table = { 212 .yes_ranges = axp323_writeable_ranges, 213 .n_yes_ranges = ARRAY_SIZE(axp323_writeable_ranges), 214 }; 215 216 static const struct regmap_access_table axp313a_volatile_table = { 217 .yes_ranges = axp313a_volatile_ranges, 218 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges), 219 }; 220 221 static const struct regmap_range axp717_writeable_ranges[] = { 222 regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1), 223 regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL), 224 regmap_reg_range(AXP717_VSYS_V_POWEROFF, AXP717_VSYS_V_POWEROFF), 225 regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN), 226 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE), 227 regmap_reg_range(AXP717_ICC_CHG_SET, AXP717_CV_CHG_SET), 228 regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL), 229 regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL), 230 regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL), 231 }; 232 233 static const struct regmap_range axp717_volatile_ranges[] = { 234 regmap_reg_range(AXP717_ON_INDICATE, AXP717_PMU_FAULT), 235 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE), 236 regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA), 237 regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L), 238 regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L), 239 }; 240 241 static const struct regmap_access_table axp717_writeable_table = { 242 .yes_ranges = axp717_writeable_ranges, 243 .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges), 244 }; 245 246 static const struct regmap_access_table axp717_volatile_table = { 247 .yes_ranges = axp717_volatile_ranges, 248 .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges), 249 }; 250 251 static const struct regmap_range axp806_volatile_ranges[] = { 252 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 253 }; 254 255 static const struct regmap_access_table axp806_writeable_table = { 256 .yes_ranges = axp806_writeable_ranges, 257 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 258 }; 259 260 static const struct regmap_access_table axp806_volatile_table = { 261 .yes_ranges = axp806_volatile_ranges, 262 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 263 }; 264 265 static const struct regmap_range axp15060_writeable_ranges[] = { 266 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2), 267 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL), 268 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 269 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY), 270 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN), 271 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 272 }; 273 274 static const struct regmap_range axp15060_volatile_ranges[] = { 275 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC), 276 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 277 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 278 }; 279 280 static const struct regmap_access_table axp15060_writeable_table = { 281 .yes_ranges = axp15060_writeable_ranges, 282 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges), 283 }; 284 285 static const struct regmap_access_table axp15060_volatile_table = { 286 .yes_ranges = axp15060_volatile_ranges, 287 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges), 288 }; 289 290 static const struct resource axp152_pek_resources[] = { 291 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 292 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 293 }; 294 295 static const struct resource axp192_ac_power_supply_resources[] = { 296 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 297 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 298 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 299 }; 300 301 static const struct resource axp192_usb_power_supply_resources[] = { 302 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 303 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 304 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"), 305 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 306 }; 307 308 static const struct resource axp20x_ac_power_supply_resources[] = { 309 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 310 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 311 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 312 }; 313 314 static const struct resource axp20x_pek_resources[] = { 315 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 316 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 317 }; 318 319 static const struct resource axp20x_usb_power_supply_resources[] = { 320 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 321 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 322 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 323 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 324 }; 325 326 static const struct resource axp22x_usb_power_supply_resources[] = { 327 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 328 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 329 }; 330 331 static const struct resource axp717_usb_power_supply_resources[] = { 332 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_OVER_V, "VBUS_OVER_V"), 333 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 334 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 335 }; 336 337 /* AXP803 and AXP813/AXP818 share the same interrupts */ 338 static const struct resource axp803_usb_power_supply_resources[] = { 339 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 340 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 341 }; 342 343 static const struct resource axp22x_pek_resources[] = { 344 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 345 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 346 }; 347 348 static const struct resource axp288_power_button_resources[] = { 349 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 350 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 351 }; 352 353 static const struct resource axp288_fuel_gauge_resources[] = { 354 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 355 DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 356 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 357 DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 358 DEFINE_RES_IRQ(AXP288_IRQ_WL2), 359 DEFINE_RES_IRQ(AXP288_IRQ_WL1), 360 }; 361 362 static const struct resource axp313a_pek_resources[] = { 363 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 364 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 365 }; 366 367 static const struct resource axp717_pek_resources[] = { 368 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 369 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 370 }; 371 372 static const struct resource axp803_pek_resources[] = { 373 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 374 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 375 }; 376 377 static const struct resource axp806_pek_resources[] = { 378 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 379 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 380 }; 381 382 static const struct resource axp809_pek_resources[] = { 383 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 384 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 385 }; 386 387 static const struct resource axp15060_pek_resources[] = { 388 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 389 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 390 }; 391 392 static const struct regmap_config axp152_regmap_config = { 393 .reg_bits = 8, 394 .val_bits = 8, 395 .wr_table = &axp152_writeable_table, 396 .volatile_table = &axp152_volatile_table, 397 .max_register = AXP152_PWM1_DUTY_CYCLE, 398 .cache_type = REGCACHE_MAPLE, 399 }; 400 401 static const struct regmap_config axp192_regmap_config = { 402 .reg_bits = 8, 403 .val_bits = 8, 404 .wr_table = &axp192_writeable_table, 405 .volatile_table = &axp192_volatile_table, 406 .max_register = AXP20X_CC_CTRL, 407 .cache_type = REGCACHE_MAPLE, 408 }; 409 410 static const struct regmap_config axp20x_regmap_config = { 411 .reg_bits = 8, 412 .val_bits = 8, 413 .wr_table = &axp20x_writeable_table, 414 .volatile_table = &axp20x_volatile_table, 415 .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 416 .cache_type = REGCACHE_MAPLE, 417 }; 418 419 static const struct regmap_config axp22x_regmap_config = { 420 .reg_bits = 8, 421 .val_bits = 8, 422 .wr_table = &axp22x_writeable_table, 423 .volatile_table = &axp22x_volatile_table, 424 .max_register = AXP22X_BATLOW_THRES1, 425 .cache_type = REGCACHE_MAPLE, 426 }; 427 428 static const struct regmap_config axp288_regmap_config = { 429 .reg_bits = 8, 430 .val_bits = 8, 431 .wr_table = &axp288_writeable_table, 432 .volatile_table = &axp288_volatile_table, 433 .max_register = AXP288_FG_TUNE5, 434 .cache_type = REGCACHE_MAPLE, 435 }; 436 437 static const struct regmap_config axp313a_regmap_config = { 438 .reg_bits = 8, 439 .val_bits = 8, 440 .wr_table = &axp313a_writeable_table, 441 .volatile_table = &axp313a_volatile_table, 442 .max_register = AXP313A_IRQ_STATE, 443 .cache_type = REGCACHE_MAPLE, 444 }; 445 446 static const struct regmap_config axp323_regmap_config = { 447 .reg_bits = 8, 448 .val_bits = 8, 449 .wr_table = &axp323_writeable_table, 450 .volatile_table = &axp313a_volatile_table, 451 .max_register = AXP323_DCDC_MODE_CTRL2, 452 .cache_type = REGCACHE_MAPLE, 453 }; 454 455 static const struct regmap_config axp717_regmap_config = { 456 .reg_bits = 8, 457 .val_bits = 8, 458 .wr_table = &axp717_writeable_table, 459 .volatile_table = &axp717_volatile_table, 460 .max_register = AXP717_ADC_DATA_L, 461 .cache_type = REGCACHE_MAPLE, 462 }; 463 464 static const struct regmap_config axp806_regmap_config = { 465 .reg_bits = 8, 466 .val_bits = 8, 467 .wr_table = &axp806_writeable_table, 468 .volatile_table = &axp806_volatile_table, 469 .max_register = AXP806_REG_ADDR_EXT, 470 .cache_type = REGCACHE_MAPLE, 471 }; 472 473 static const struct regmap_config axp15060_regmap_config = { 474 .reg_bits = 8, 475 .val_bits = 8, 476 .wr_table = &axp15060_writeable_table, 477 .volatile_table = &axp15060_volatile_table, 478 .max_register = AXP15060_IRQ2_STATE, 479 .cache_type = REGCACHE_MAPLE, 480 }; 481 482 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 483 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 484 485 static const struct regmap_irq axp152_regmap_irqs[] = { 486 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 487 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 488 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 489 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 490 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 491 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 492 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 493 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 494 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 495 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 496 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 497 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 498 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 499 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 500 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 501 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 502 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 503 }; 504 505 static const struct regmap_irq axp192_regmap_irqs[] = { 506 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7), 507 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6), 508 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5), 509 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4), 510 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3), 511 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2), 512 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1), 513 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7), 514 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6), 515 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5), 516 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4), 517 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3), 518 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2), 519 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1), 520 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0), 521 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7), 522 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6), 523 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5), 524 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4), 525 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3), 526 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1), 527 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0), 528 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7), 529 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6), 530 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5), 531 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4), 532 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3), 533 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2), 534 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0), 535 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7), 536 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2), 537 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1), 538 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0), 539 }; 540 541 static const struct regmap_irq axp20x_regmap_irqs[] = { 542 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 543 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 544 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 545 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 546 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 547 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 548 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 549 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 550 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 551 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 552 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 553 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 554 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 555 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 556 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 557 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 558 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 559 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 560 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 561 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 562 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 563 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 564 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 565 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 566 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 567 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 568 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 569 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 570 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 571 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 572 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 573 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 574 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 575 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 576 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 577 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 578 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 579 }; 580 581 static const struct regmap_irq axp22x_regmap_irqs[] = { 582 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 583 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 584 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 585 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 586 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 587 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 588 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 589 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 590 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 591 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 592 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 593 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 594 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 595 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 596 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 597 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 598 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 599 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 600 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 601 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 602 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 603 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 604 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 605 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 606 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 607 }; 608 609 /* some IRQs are compatible with axp20x models */ 610 static const struct regmap_irq axp288_regmap_irqs[] = { 611 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 612 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 613 INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 614 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 615 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 616 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 617 618 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 619 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 620 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 621 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 622 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 623 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 624 625 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 626 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 627 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 628 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 629 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 630 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 631 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 632 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 633 634 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 635 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 636 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 637 INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 638 639 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 640 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 641 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 642 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 643 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 644 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 645 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 646 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 647 648 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 649 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 650 }; 651 652 static const struct regmap_irq axp313a_regmap_irqs[] = { 653 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7), 654 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6), 655 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5), 656 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4), 657 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3), 658 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2), 659 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), 660 }; 661 662 static const struct regmap_irq axp717_regmap_irqs[] = { 663 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7), 664 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6), 665 INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC, 0, 4), 666 INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V, 0, 2), 667 INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V, 0, 1), 668 INIT_REGMAP_IRQ(AXP717, VBUS_FAULT, 0, 0), 669 INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN, 1, 7), 670 INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL, 1, 6), 671 INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN, 1, 5), 672 INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL, 1, 4), 673 INIT_REGMAP_IRQ(AXP717, PEK_SHORT, 1, 3), 674 INIT_REGMAP_IRQ(AXP717, PEK_LONG, 1, 2), 675 INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE, 1, 1), 676 INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE, 1, 0), 677 INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE, 2, 7), 678 INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR, 2, 6), 679 INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR, 2, 5), 680 INIT_REGMAP_IRQ(AXP717, CHARG_DONE, 2, 4), 681 INIT_REGMAP_IRQ(AXP717, CHARG, 2, 3), 682 INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH, 2, 2), 683 INIT_REGMAP_IRQ(AXP717, CHARG_TIMER, 2, 1), 684 INIT_REGMAP_IRQ(AXP717, BATT_OVER_V, 2, 0), 685 INIT_REGMAP_IRQ(AXP717, BC_USB_DONE, 3, 7), 686 INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG, 3, 6), 687 INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH, 3, 4), 688 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH, 3, 3), 689 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW, 3, 2), 690 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH, 3, 1), 691 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW, 3, 0), 692 INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE, 4, 6), 693 INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN, 4, 5), 694 }; 695 696 static const struct regmap_irq axp803_regmap_irqs[] = { 697 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 698 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 699 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 700 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 701 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 702 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 703 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 704 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 705 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 706 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 707 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 708 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 709 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 710 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 711 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 712 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 713 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 714 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 715 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 716 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 717 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 718 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 719 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 720 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 721 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 722 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 723 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 724 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 725 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 726 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 727 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 728 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 729 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 730 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 731 }; 732 733 static const struct regmap_irq axp806_regmap_irqs[] = { 734 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 735 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 736 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 737 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 738 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 739 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 740 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 741 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 742 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 743 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 744 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 745 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 746 }; 747 748 static const struct regmap_irq axp809_regmap_irqs[] = { 749 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 750 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 751 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 752 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 753 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 754 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 755 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 756 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 757 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 758 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 759 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 760 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 761 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 762 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 763 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 764 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 765 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 766 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 767 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 768 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 769 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 770 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 771 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 772 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 773 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 774 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 775 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 776 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 777 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 778 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 779 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 780 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 781 }; 782 783 static const struct regmap_irq axp15060_regmap_irqs[] = { 784 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0), 785 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1), 786 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2), 787 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3), 788 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4), 789 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5), 790 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6), 791 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7), 792 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0), 793 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1), 794 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2), 795 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3), 796 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4), 797 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5), 798 }; 799 800 static const struct regmap_irq_chip axp152_regmap_irq_chip = { 801 .name = "axp152_irq_chip", 802 .status_base = AXP152_IRQ1_STATE, 803 .ack_base = AXP152_IRQ1_STATE, 804 .unmask_base = AXP152_IRQ1_EN, 805 .init_ack_masked = true, 806 .irqs = axp152_regmap_irqs, 807 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 808 .num_regs = 3, 809 }; 810 811 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data, 812 unsigned int base, int index) 813 { 814 /* linear mapping for IRQ1 to IRQ4 */ 815 if (index < 4) 816 return base + index; 817 818 /* handle IRQ5 separately */ 819 if (base == AXP192_IRQ1_EN) 820 return AXP192_IRQ5_EN; 821 822 return AXP192_IRQ5_STATE; 823 } 824 825 static const struct regmap_irq_chip axp192_regmap_irq_chip = { 826 .name = "axp192_irq_chip", 827 .status_base = AXP192_IRQ1_STATE, 828 .ack_base = AXP192_IRQ1_STATE, 829 .unmask_base = AXP192_IRQ1_EN, 830 .init_ack_masked = true, 831 .irqs = axp192_regmap_irqs, 832 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs), 833 .num_regs = 5, 834 .get_irq_reg = axp192_get_irq_reg, 835 }; 836 837 static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 838 .name = "axp20x_irq_chip", 839 .status_base = AXP20X_IRQ1_STATE, 840 .ack_base = AXP20X_IRQ1_STATE, 841 .unmask_base = AXP20X_IRQ1_EN, 842 .init_ack_masked = true, 843 .irqs = axp20x_regmap_irqs, 844 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 845 .num_regs = 5, 846 847 }; 848 849 static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 850 .name = "axp22x_irq_chip", 851 .status_base = AXP20X_IRQ1_STATE, 852 .ack_base = AXP20X_IRQ1_STATE, 853 .unmask_base = AXP20X_IRQ1_EN, 854 .init_ack_masked = true, 855 .irqs = axp22x_regmap_irqs, 856 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 857 .num_regs = 5, 858 }; 859 860 static const struct regmap_irq_chip axp288_regmap_irq_chip = { 861 .name = "axp288_irq_chip", 862 .status_base = AXP20X_IRQ1_STATE, 863 .ack_base = AXP20X_IRQ1_STATE, 864 .unmask_base = AXP20X_IRQ1_EN, 865 .init_ack_masked = true, 866 .irqs = axp288_regmap_irqs, 867 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 868 .num_regs = 6, 869 870 }; 871 872 static const struct regmap_irq_chip axp313a_regmap_irq_chip = { 873 .name = "axp313a_irq_chip", 874 .status_base = AXP313A_IRQ_STATE, 875 .ack_base = AXP313A_IRQ_STATE, 876 .unmask_base = AXP313A_IRQ_EN, 877 .init_ack_masked = true, 878 .irqs = axp313a_regmap_irqs, 879 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs), 880 .num_regs = 1, 881 }; 882 883 static const struct regmap_irq_chip axp717_regmap_irq_chip = { 884 .name = "axp717_irq_chip", 885 .status_base = AXP717_IRQ0_STATE, 886 .ack_base = AXP717_IRQ0_STATE, 887 .unmask_base = AXP717_IRQ0_EN, 888 .init_ack_masked = true, 889 .irqs = axp717_regmap_irqs, 890 .num_irqs = ARRAY_SIZE(axp717_regmap_irqs), 891 .num_regs = 5, 892 }; 893 894 static const struct regmap_irq_chip axp803_regmap_irq_chip = { 895 .name = "axp803", 896 .status_base = AXP20X_IRQ1_STATE, 897 .ack_base = AXP20X_IRQ1_STATE, 898 .unmask_base = AXP20X_IRQ1_EN, 899 .init_ack_masked = true, 900 .irqs = axp803_regmap_irqs, 901 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 902 .num_regs = 6, 903 }; 904 905 static const struct regmap_irq_chip axp806_regmap_irq_chip = { 906 .name = "axp806", 907 .status_base = AXP20X_IRQ1_STATE, 908 .ack_base = AXP20X_IRQ1_STATE, 909 .unmask_base = AXP20X_IRQ1_EN, 910 .init_ack_masked = true, 911 .irqs = axp806_regmap_irqs, 912 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 913 .num_regs = 2, 914 }; 915 916 static const struct regmap_irq_chip axp809_regmap_irq_chip = { 917 .name = "axp809", 918 .status_base = AXP20X_IRQ1_STATE, 919 .ack_base = AXP20X_IRQ1_STATE, 920 .unmask_base = AXP20X_IRQ1_EN, 921 .init_ack_masked = true, 922 .irqs = axp809_regmap_irqs, 923 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 924 .num_regs = 5, 925 }; 926 927 static const struct regmap_irq_chip axp15060_regmap_irq_chip = { 928 .name = "axp15060", 929 .status_base = AXP15060_IRQ1_STATE, 930 .ack_base = AXP15060_IRQ1_STATE, 931 .unmask_base = AXP15060_IRQ1_EN, 932 .init_ack_masked = true, 933 .irqs = axp15060_regmap_irqs, 934 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs), 935 .num_regs = 2, 936 }; 937 938 static const struct mfd_cell axp192_cells[] = { 939 { 940 .name = "axp192-adc", 941 .of_compatible = "x-powers,axp192-adc", 942 }, { 943 .name = "axp20x-battery-power-supply", 944 .of_compatible = "x-powers,axp192-battery-power-supply", 945 }, { 946 .name = "axp20x-ac-power-supply", 947 .of_compatible = "x-powers,axp202-ac-power-supply", 948 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources), 949 .resources = axp192_ac_power_supply_resources, 950 }, { 951 .name = "axp20x-usb-power-supply", 952 .of_compatible = "x-powers,axp192-usb-power-supply", 953 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources), 954 .resources = axp192_usb_power_supply_resources, 955 }, 956 { .name = "axp20x-regulator" }, 957 }; 958 959 static const struct mfd_cell axp20x_cells[] = { 960 { 961 .name = "axp20x-gpio", 962 .of_compatible = "x-powers,axp209-gpio", 963 }, { 964 .name = "axp20x-pek", 965 .num_resources = ARRAY_SIZE(axp20x_pek_resources), 966 .resources = axp20x_pek_resources, 967 }, { 968 .name = "axp20x-regulator", 969 }, { 970 .name = "axp20x-adc", 971 .of_compatible = "x-powers,axp209-adc", 972 }, { 973 .name = "axp20x-battery-power-supply", 974 .of_compatible = "x-powers,axp209-battery-power-supply", 975 }, { 976 .name = "axp20x-ac-power-supply", 977 .of_compatible = "x-powers,axp202-ac-power-supply", 978 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 979 .resources = axp20x_ac_power_supply_resources, 980 }, { 981 .name = "axp20x-usb-power-supply", 982 .of_compatible = "x-powers,axp202-usb-power-supply", 983 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 984 .resources = axp20x_usb_power_supply_resources, 985 }, 986 }; 987 988 static const struct mfd_cell axp221_cells[] = { 989 { 990 .name = "axp20x-gpio", 991 .of_compatible = "x-powers,axp221-gpio", 992 }, { 993 .name = "axp221-pek", 994 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 995 .resources = axp22x_pek_resources, 996 }, { 997 .name = "axp20x-regulator", 998 }, { 999 .name = "axp22x-adc", 1000 .of_compatible = "x-powers,axp221-adc", 1001 }, { 1002 .name = "axp20x-ac-power-supply", 1003 .of_compatible = "x-powers,axp221-ac-power-supply", 1004 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1005 .resources = axp20x_ac_power_supply_resources, 1006 }, { 1007 .name = "axp20x-battery-power-supply", 1008 .of_compatible = "x-powers,axp221-battery-power-supply", 1009 }, { 1010 .name = "axp20x-usb-power-supply", 1011 .of_compatible = "x-powers,axp221-usb-power-supply", 1012 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 1013 .resources = axp22x_usb_power_supply_resources, 1014 }, 1015 }; 1016 1017 static const struct mfd_cell axp223_cells[] = { 1018 { 1019 .name = "axp20x-gpio", 1020 .of_compatible = "x-powers,axp221-gpio", 1021 }, { 1022 .name = "axp221-pek", 1023 .num_resources = ARRAY_SIZE(axp22x_pek_resources), 1024 .resources = axp22x_pek_resources, 1025 }, { 1026 .name = "axp22x-adc", 1027 .of_compatible = "x-powers,axp221-adc", 1028 }, { 1029 .name = "axp20x-battery-power-supply", 1030 .of_compatible = "x-powers,axp221-battery-power-supply", 1031 }, { 1032 .name = "axp20x-regulator", 1033 }, { 1034 .name = "axp20x-ac-power-supply", 1035 .of_compatible = "x-powers,axp221-ac-power-supply", 1036 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1037 .resources = axp20x_ac_power_supply_resources, 1038 }, { 1039 .name = "axp20x-usb-power-supply", 1040 .of_compatible = "x-powers,axp223-usb-power-supply", 1041 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 1042 .resources = axp22x_usb_power_supply_resources, 1043 }, 1044 }; 1045 1046 static const struct mfd_cell axp152_cells[] = { 1047 { 1048 .name = "axp20x-pek", 1049 .num_resources = ARRAY_SIZE(axp152_pek_resources), 1050 .resources = axp152_pek_resources, 1051 }, 1052 }; 1053 1054 static struct mfd_cell axp313a_cells[] = { 1055 MFD_CELL_NAME("axp20x-regulator"), 1056 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), 1057 }; 1058 1059 static struct mfd_cell axp717_cells[] = { 1060 MFD_CELL_NAME("axp20x-regulator"), 1061 MFD_CELL_RES("axp20x-pek", axp717_pek_resources), 1062 MFD_CELL_OF("axp717-adc", 1063 NULL, NULL, 0, 0, "x-powers,axp717-adc"), 1064 MFD_CELL_OF("axp20x-usb-power-supply", 1065 axp717_usb_power_supply_resources, NULL, 0, 0, 1066 "x-powers,axp717-usb-power-supply"), 1067 MFD_CELL_OF("axp20x-battery-power-supply", 1068 NULL, NULL, 0, 0, "x-powers,axp717-battery-power-supply"), 1069 }; 1070 1071 static const struct resource axp288_adc_resources[] = { 1072 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 1073 }; 1074 1075 static const struct resource axp288_extcon_resources[] = { 1076 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 1077 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 1078 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 1079 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 1080 }; 1081 1082 static const struct resource axp288_charger_resources[] = { 1083 DEFINE_RES_IRQ(AXP288_IRQ_OV), 1084 DEFINE_RES_IRQ(AXP288_IRQ_DONE), 1085 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 1086 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 1087 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 1088 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 1089 DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 1090 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 1091 DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 1092 }; 1093 1094 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" }; 1095 1096 static const struct property_entry axp288_fuel_gauge_properties[] = { 1097 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers), 1098 { } 1099 }; 1100 1101 static const struct software_node axp288_fuel_gauge_sw_node = { 1102 .name = "axp288_fuel_gauge", 1103 .properties = axp288_fuel_gauge_properties, 1104 }; 1105 1106 static const struct mfd_cell axp288_cells[] = { 1107 { 1108 .name = "axp288_adc", 1109 .num_resources = ARRAY_SIZE(axp288_adc_resources), 1110 .resources = axp288_adc_resources, 1111 }, { 1112 .name = "axp288_extcon", 1113 .num_resources = ARRAY_SIZE(axp288_extcon_resources), 1114 .resources = axp288_extcon_resources, 1115 }, { 1116 .name = "axp288_charger", 1117 .num_resources = ARRAY_SIZE(axp288_charger_resources), 1118 .resources = axp288_charger_resources, 1119 }, { 1120 .name = "axp288_fuel_gauge", 1121 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 1122 .resources = axp288_fuel_gauge_resources, 1123 .swnode = &axp288_fuel_gauge_sw_node, 1124 }, { 1125 .name = "axp221-pek", 1126 .num_resources = ARRAY_SIZE(axp288_power_button_resources), 1127 .resources = axp288_power_button_resources, 1128 }, { 1129 .name = "axp288_pmic_acpi", 1130 }, 1131 }; 1132 1133 static const struct mfd_cell axp803_cells[] = { 1134 { 1135 .name = "axp221-pek", 1136 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1137 .resources = axp803_pek_resources, 1138 }, { 1139 .name = "axp20x-gpio", 1140 .of_compatible = "x-powers,axp813-gpio", 1141 }, { 1142 .name = "axp813-adc", 1143 .of_compatible = "x-powers,axp813-adc", 1144 }, { 1145 .name = "axp20x-battery-power-supply", 1146 .of_compatible = "x-powers,axp813-battery-power-supply", 1147 }, { 1148 .name = "axp20x-ac-power-supply", 1149 .of_compatible = "x-powers,axp813-ac-power-supply", 1150 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1151 .resources = axp20x_ac_power_supply_resources, 1152 }, { 1153 .name = "axp20x-usb-power-supply", 1154 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1155 .resources = axp803_usb_power_supply_resources, 1156 .of_compatible = "x-powers,axp813-usb-power-supply", 1157 }, 1158 { .name = "axp20x-regulator" }, 1159 }; 1160 1161 static const struct mfd_cell axp806_self_working_cells[] = { 1162 { 1163 .name = "axp221-pek", 1164 .num_resources = ARRAY_SIZE(axp806_pek_resources), 1165 .resources = axp806_pek_resources, 1166 }, 1167 { .name = "axp20x-regulator" }, 1168 }; 1169 1170 static const struct mfd_cell axp806_cells[] = { 1171 { 1172 .id = 2, 1173 .name = "axp20x-regulator", 1174 }, 1175 }; 1176 1177 static const struct mfd_cell axp809_cells[] = { 1178 { 1179 .name = "axp20x-gpio", 1180 .of_compatible = "x-powers,axp221-gpio", 1181 }, { 1182 .name = "axp221-pek", 1183 .num_resources = ARRAY_SIZE(axp809_pek_resources), 1184 .resources = axp809_pek_resources, 1185 }, { 1186 .id = 1, 1187 .name = "axp20x-regulator", 1188 }, 1189 }; 1190 1191 static const struct mfd_cell axp813_cells[] = { 1192 { 1193 .name = "axp221-pek", 1194 .num_resources = ARRAY_SIZE(axp803_pek_resources), 1195 .resources = axp803_pek_resources, 1196 }, { 1197 .name = "axp20x-regulator", 1198 }, { 1199 .name = "axp20x-gpio", 1200 .of_compatible = "x-powers,axp813-gpio", 1201 }, { 1202 .name = "axp813-adc", 1203 .of_compatible = "x-powers,axp813-adc", 1204 }, { 1205 .name = "axp20x-battery-power-supply", 1206 .of_compatible = "x-powers,axp813-battery-power-supply", 1207 }, { 1208 .name = "axp20x-ac-power-supply", 1209 .of_compatible = "x-powers,axp813-ac-power-supply", 1210 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1211 .resources = axp20x_ac_power_supply_resources, 1212 }, { 1213 .name = "axp20x-usb-power-supply", 1214 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1215 .resources = axp803_usb_power_supply_resources, 1216 .of_compatible = "x-powers,axp813-usb-power-supply", 1217 }, 1218 }; 1219 1220 static const struct mfd_cell axp15060_cells[] = { 1221 { 1222 .name = "axp221-pek", 1223 .num_resources = ARRAY_SIZE(axp15060_pek_resources), 1224 .resources = axp15060_pek_resources, 1225 }, { 1226 .name = "axp20x-regulator", 1227 }, 1228 }; 1229 1230 /* For boards that don't have IRQ line connected to SOC. */ 1231 static const struct mfd_cell axp_regulator_only_cells[] = { 1232 { 1233 .name = "axp20x-regulator", 1234 }, 1235 }; 1236 1237 static int axp20x_power_off(struct sys_off_data *data) 1238 { 1239 struct axp20x_dev *axp20x = data->cb_data; 1240 unsigned int shutdown_reg; 1241 1242 switch (axp20x->variant) { 1243 case AXP323_ID: 1244 case AXP313A_ID: 1245 shutdown_reg = AXP313A_SHUTDOWN_CTRL; 1246 break; 1247 default: 1248 shutdown_reg = AXP20X_OFF_CTRL; 1249 break; 1250 } 1251 1252 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF); 1253 1254 /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 1255 mdelay(500); 1256 1257 return NOTIFY_DONE; 1258 } 1259 1260 int axp20x_match_device(struct axp20x_dev *axp20x) 1261 { 1262 struct device *dev = axp20x->dev; 1263 const struct mfd_cell *cells_no_irq = NULL; 1264 int nr_cells_no_irq = 0; 1265 1266 axp20x->variant = (long)device_get_match_data(dev); 1267 switch (axp20x->variant) { 1268 case AXP152_ID: 1269 axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 1270 axp20x->cells = axp152_cells; 1271 axp20x->regmap_cfg = &axp152_regmap_config; 1272 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 1273 break; 1274 case AXP192_ID: 1275 axp20x->nr_cells = ARRAY_SIZE(axp192_cells); 1276 axp20x->cells = axp192_cells; 1277 axp20x->regmap_cfg = &axp192_regmap_config; 1278 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip; 1279 break; 1280 case AXP202_ID: 1281 case AXP209_ID: 1282 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 1283 axp20x->cells = axp20x_cells; 1284 axp20x->regmap_cfg = &axp20x_regmap_config; 1285 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 1286 break; 1287 case AXP221_ID: 1288 axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 1289 axp20x->cells = axp221_cells; 1290 axp20x->regmap_cfg = &axp22x_regmap_config; 1291 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1292 break; 1293 case AXP223_ID: 1294 axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 1295 axp20x->cells = axp223_cells; 1296 axp20x->regmap_cfg = &axp22x_regmap_config; 1297 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1298 break; 1299 case AXP288_ID: 1300 axp20x->cells = axp288_cells; 1301 axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 1302 axp20x->regmap_cfg = &axp288_regmap_config; 1303 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 1304 axp20x->irq_flags = IRQF_TRIGGER_LOW; 1305 break; 1306 case AXP313A_ID: 1307 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 1308 axp20x->cells = axp313a_cells; 1309 axp20x->regmap_cfg = &axp313a_regmap_config; 1310 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 1311 break; 1312 case AXP323_ID: 1313 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 1314 axp20x->cells = axp313a_cells; 1315 axp20x->regmap_cfg = &axp323_regmap_config; 1316 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 1317 break; 1318 case AXP717_ID: 1319 axp20x->nr_cells = ARRAY_SIZE(axp717_cells); 1320 axp20x->cells = axp717_cells; 1321 axp20x->regmap_cfg = &axp717_regmap_config; 1322 axp20x->regmap_irq_chip = &axp717_regmap_irq_chip; 1323 break; 1324 case AXP803_ID: 1325 axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 1326 axp20x->cells = axp803_cells; 1327 axp20x->regmap_cfg = &axp288_regmap_config; 1328 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1329 break; 1330 case AXP806_ID: 1331 /* 1332 * Don't register the power key part if in slave mode or 1333 * if there is no interrupt line. 1334 */ 1335 if (of_property_read_bool(axp20x->dev->of_node, 1336 "x-powers,self-working-mode")) { 1337 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 1338 axp20x->cells = axp806_self_working_cells; 1339 } else { 1340 axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 1341 axp20x->cells = axp806_cells; 1342 } 1343 nr_cells_no_irq = ARRAY_SIZE(axp806_cells); 1344 cells_no_irq = axp806_cells; 1345 axp20x->regmap_cfg = &axp806_regmap_config; 1346 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 1347 break; 1348 case AXP809_ID: 1349 axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 1350 axp20x->cells = axp809_cells; 1351 axp20x->regmap_cfg = &axp22x_regmap_config; 1352 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 1353 break; 1354 case AXP813_ID: 1355 axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 1356 axp20x->cells = axp813_cells; 1357 axp20x->regmap_cfg = &axp288_regmap_config; 1358 /* 1359 * The IRQ table given in the datasheet is incorrect. 1360 * In IRQ enable/status registers 1, there are separate 1361 * IRQs for ACIN and VBUS, instead of bits [7:5] being 1362 * the same as bits [4:2]. So it shares the same IRQs 1363 * as the AXP803, rather than the AXP288. 1364 */ 1365 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 1366 break; 1367 case AXP15060_ID: 1368 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells); 1369 axp20x->cells = axp15060_cells; 1370 axp20x->regmap_cfg = &axp15060_regmap_config; 1371 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip; 1372 break; 1373 default: 1374 dev_err(dev, "unsupported AXP20X ID %u\n", axp20x->variant); 1375 return -EINVAL; 1376 } 1377 1378 /* 1379 * Use an alternative cell array when no interrupt line is connected, 1380 * since IRQs are required by some drivers. 1381 * The default is the safe "regulator-only", as this works fine without 1382 * an interrupt specified. 1383 */ 1384 if (axp20x->irq <= 0) { 1385 if (cells_no_irq) { 1386 axp20x->nr_cells = nr_cells_no_irq; 1387 axp20x->cells = cells_no_irq; 1388 } else { 1389 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells); 1390 axp20x->cells = axp_regulator_only_cells; 1391 } 1392 } 1393 1394 dev_info(dev, "AXP20x variant %s found\n", 1395 axp20x_model_names[axp20x->variant]); 1396 1397 return 0; 1398 } 1399 EXPORT_SYMBOL(axp20x_match_device); 1400 1401 int axp20x_device_probe(struct axp20x_dev *axp20x) 1402 { 1403 int ret; 1404 1405 /* 1406 * The AXP806 supports either master/standalone or slave mode. 1407 * Slave mode allows sharing the serial bus, even with multiple 1408 * AXP806 which all have the same hardware address. 1409 * 1410 * This is done with extra "serial interface address extension", 1411 * or AXP806_BUS_ADDR_EXT, and "register address extension", or 1412 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1413 * 1 bit customizable at the factory, and 1 bit depending on the 1414 * state of an external pin. The latter is writable. The device 1415 * will only respond to operations to its other registers when 1416 * the these device addressing bits (in the upper 4 bits of the 1417 * registers) match. 1418 * 1419 * By default we support an AXP806 chained to an AXP809 in slave 1420 * mode. Boards which use an AXP806 in master mode can set the 1421 * property "x-powers,master-mode" to override the default. 1422 */ 1423 if (axp20x->variant == AXP806_ID) { 1424 if (of_property_read_bool(axp20x->dev->of_node, 1425 "x-powers,master-mode") || 1426 of_property_read_bool(axp20x->dev->of_node, 1427 "x-powers,self-working-mode")) 1428 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1429 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 1430 else 1431 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1432 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 1433 } 1434 1435 /* Only if there is an interrupt line connected towards the CPU. */ 1436 if (axp20x->irq > 0) { 1437 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 1438 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 1439 -1, axp20x->regmap_irq_chip, 1440 &axp20x->regmap_irqc); 1441 if (ret) { 1442 dev_err(axp20x->dev, "failed to add irq chip: %d\n", 1443 ret); 1444 return ret; 1445 } 1446 } 1447 1448 ret = mfd_add_devices(axp20x->dev, PLATFORM_DEVID_AUTO, axp20x->cells, 1449 axp20x->nr_cells, NULL, 0, NULL); 1450 1451 if (ret) { 1452 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 1453 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1454 return ret; 1455 } 1456 1457 if (axp20x->variant != AXP288_ID) 1458 devm_register_sys_off_handler(axp20x->dev, 1459 SYS_OFF_MODE_POWER_OFF, 1460 SYS_OFF_PRIO_DEFAULT, 1461 axp20x_power_off, axp20x); 1462 1463 dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1464 1465 return 0; 1466 } 1467 EXPORT_SYMBOL(axp20x_device_probe); 1468 1469 void axp20x_device_remove(struct axp20x_dev *axp20x) 1470 { 1471 mfd_remove_devices(axp20x->dev); 1472 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1473 } 1474 EXPORT_SYMBOL(axp20x_device_remove); 1475 1476 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1477 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1478 MODULE_LICENSE("GPL"); 1479