xref: /linux/drivers/mfd/arizona-core.c (revision c5aec4c76af1a2d89ee2f2d4d5463b2ad2d85de5)
1 /*
2  * Arizona core driver
3  *
4  * Copyright 2012 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27 
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30 
31 #include "arizona.h"
32 
33 static const char *wm5102_core_supplies[] = {
34 	"AVDD",
35 	"DBVDD1",
36 };
37 
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 	int ret = 0;
41 
42 	mutex_lock(&arizona->clk_lock);
43 
44 	arizona->clk32k_ref++;
45 
46 	if (arizona->clk32k_ref == 1) {
47 		switch (arizona->pdata.clk32k_src) {
48 		case ARIZONA_32KZ_MCLK1:
49 			ret = pm_runtime_get_sync(arizona->dev);
50 			if (ret != 0)
51 				goto out;
52 			break;
53 		}
54 
55 		ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 					 ARIZONA_CLK_32K_ENA,
57 					 ARIZONA_CLK_32K_ENA);
58 	}
59 
60 out:
61 	if (ret != 0)
62 		arizona->clk32k_ref--;
63 
64 	mutex_unlock(&arizona->clk_lock);
65 
66 	return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69 
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 	int ret = 0;
73 
74 	mutex_lock(&arizona->clk_lock);
75 
76 	BUG_ON(arizona->clk32k_ref <= 0);
77 
78 	arizona->clk32k_ref--;
79 
80 	if (arizona->clk32k_ref == 0) {
81 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 				   ARIZONA_CLK_32K_ENA, 0);
83 
84 		switch (arizona->pdata.clk32k_src) {
85 		case ARIZONA_32KZ_MCLK1:
86 			pm_runtime_put_sync(arizona->dev);
87 			break;
88 		}
89 	}
90 
91 	mutex_unlock(&arizona->clk_lock);
92 
93 	return ret;
94 }
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96 
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
98 {
99 	struct arizona *arizona = data;
100 
101 	dev_err(arizona->dev, "CLKGEN error\n");
102 
103 	return IRQ_HANDLED;
104 }
105 
106 static irqreturn_t arizona_underclocked(int irq, void *data)
107 {
108 	struct arizona *arizona = data;
109 	unsigned int val;
110 	int ret;
111 
112 	ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 			  &val);
114 	if (ret != 0) {
115 		dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 			ret);
117 		return IRQ_NONE;
118 	}
119 
120 	if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 		dev_err(arizona->dev, "AIF3 underclocked\n");
122 	if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 		dev_err(arizona->dev, "AIF2 underclocked\n");
124 	if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 		dev_err(arizona->dev, "AIF1 underclocked\n");
126 	if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 		dev_err(arizona->dev, "ISRC2 underclocked\n");
128 	if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 		dev_err(arizona->dev, "ISRC1 underclocked\n");
130 	if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 		dev_err(arizona->dev, "FX underclocked\n");
132 	if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 		dev_err(arizona->dev, "ASRC underclocked\n");
134 	if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 		dev_err(arizona->dev, "DAC underclocked\n");
136 	if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 		dev_err(arizona->dev, "ADC underclocked\n");
138 	if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 		dev_err(arizona->dev, "Mixer dropped sample\n");
140 
141 	return IRQ_HANDLED;
142 }
143 
144 static irqreturn_t arizona_overclocked(int irq, void *data)
145 {
146 	struct arizona *arizona = data;
147 	unsigned int val[2];
148 	int ret;
149 
150 	ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 			       &val[0], 2);
152 	if (ret != 0) {
153 		dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 			ret);
155 		return IRQ_NONE;
156 	}
157 
158 	if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 		dev_err(arizona->dev, "PWM overclocked\n");
160 	if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 		dev_err(arizona->dev, "FX core overclocked\n");
162 	if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 		dev_err(arizona->dev, "DAC SYS overclocked\n");
164 	if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 		dev_err(arizona->dev, "DAC WARP overclocked\n");
166 	if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 		dev_err(arizona->dev, "ADC overclocked\n");
168 	if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 		dev_err(arizona->dev, "Mixer overclocked\n");
170 	if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 		dev_err(arizona->dev, "AIF3 overclocked\n");
172 	if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 		dev_err(arizona->dev, "AIF2 overclocked\n");
174 	if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 		dev_err(arizona->dev, "AIF1 overclocked\n");
176 	if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 		dev_err(arizona->dev, "Pad control overclocked\n");
178 
179 	if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 		dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 	if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 		dev_err(arizona->dev, "Slimbus async overclocked\n");
183 	if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 		dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 	if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 		dev_err(arizona->dev, "ASRC async system overclocked\n");
187 	if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 		dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 	if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 		dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 	if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 		dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 	if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 		dev_err(arizona->dev, "DSP1 overclocked\n");
195 	if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 		dev_err(arizona->dev, "ISRC2 overclocked\n");
197 	if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 		dev_err(arizona->dev, "ISRC1 overclocked\n");
199 
200 	return IRQ_HANDLED;
201 }
202 
203 static int arizona_poll_reg(struct arizona *arizona,
204 			    int timeout, unsigned int reg,
205 			    unsigned int mask, unsigned int target)
206 {
207 	unsigned int val = 0;
208 	int ret, i;
209 
210 	for (i = 0; i < timeout; i++) {
211 		ret = regmap_read(arizona->regmap, reg, &val);
212 		if (ret != 0) {
213 			dev_err(arizona->dev, "Failed to read reg %u: %d\n",
214 				reg, ret);
215 			continue;
216 		}
217 
218 		if ((val & mask) == target)
219 			return 0;
220 
221 		msleep(1);
222 	}
223 
224 	dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
225 	return -ETIMEDOUT;
226 }
227 
228 static int arizona_wait_for_boot(struct arizona *arizona)
229 {
230 	int ret;
231 
232 	/*
233 	 * We can't use an interrupt as we need to runtime resume to do so,
234 	 * we won't race with the interrupt handler as it'll be blocked on
235 	 * runtime resume.
236 	 */
237 	ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 			       ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
239 
240 	if (!ret)
241 		regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 			     ARIZONA_BOOT_DONE_STS);
243 
244 	pm_runtime_mark_last_busy(arizona->dev);
245 
246 	return ret;
247 }
248 
249 static int arizona_apply_hardware_patch(struct arizona* arizona)
250 {
251 	unsigned int fll, sysclk;
252 	int ret, err;
253 
254 	/* Cache existing FLL and SYSCLK settings */
255 	ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
256 	if (ret != 0) {
257 		dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
258 			ret);
259 		return ret;
260 	}
261 	ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
262 	if (ret != 0) {
263 		dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
264 			ret);
265 		return ret;
266 	}
267 
268 	/* Start up SYSCLK using the FLL in free running mode */
269 	ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
270 			ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
271 	if (ret != 0) {
272 		dev_err(arizona->dev,
273 			"Failed to start FLL in freerunning mode: %d\n",
274 			ret);
275 		return ret;
276 	}
277 	ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
278 			       ARIZONA_FLL1_CLOCK_OK_STS,
279 			       ARIZONA_FLL1_CLOCK_OK_STS);
280 	if (ret != 0) {
281 		ret = -ETIMEDOUT;
282 		goto err_fll;
283 	}
284 
285 	ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
286 	if (ret != 0) {
287 		dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
288 		goto err_fll;
289 	}
290 
291 	/* Start the write sequencer and wait for it to finish */
292 	ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
293 			ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
294 	if (ret != 0) {
295 		dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
296 			ret);
297 		goto err_sysclk;
298 	}
299 	ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
300 			       ARIZONA_WSEQ_BUSY, 0);
301 	if (ret != 0) {
302 		regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
303 				ARIZONA_WSEQ_ABORT);
304 		ret = -ETIMEDOUT;
305 	}
306 
307 err_sysclk:
308 	err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
309 	if (err != 0) {
310 		dev_err(arizona->dev,
311 			"Failed to re-apply old SYSCLK settings: %d\n",
312 			err);
313 	}
314 
315 err_fll:
316 	err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
317 	if (err != 0) {
318 		dev_err(arizona->dev,
319 			"Failed to re-apply old FLL settings: %d\n",
320 			err);
321 	}
322 
323 	if (ret != 0)
324 		return ret;
325 	else
326 		return err;
327 }
328 
329 #ifdef CONFIG_PM_RUNTIME
330 static int arizona_runtime_resume(struct device *dev)
331 {
332 	struct arizona *arizona = dev_get_drvdata(dev);
333 	int ret;
334 
335 	dev_dbg(arizona->dev, "Leaving AoD mode\n");
336 
337 	ret = regulator_enable(arizona->dcvdd);
338 	if (ret != 0) {
339 		dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
340 		return ret;
341 	}
342 
343 	regcache_cache_only(arizona->regmap, false);
344 
345 	switch (arizona->type) {
346 	case WM5102:
347 		if (arizona->external_dcvdd) {
348 			ret = regmap_update_bits(arizona->regmap,
349 						 ARIZONA_ISOLATION_CONTROL,
350 						 ARIZONA_ISOLATE_DCVDD1, 0);
351 			if (ret != 0) {
352 				dev_err(arizona->dev,
353 					"Failed to connect DCVDD: %d\n", ret);
354 				goto err;
355 			}
356 		}
357 
358 		ret = wm5102_patch(arizona);
359 		if (ret != 0) {
360 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
361 				ret);
362 			goto err;
363 		}
364 
365 		ret = arizona_apply_hardware_patch(arizona);
366 		if (ret != 0) {
367 			dev_err(arizona->dev,
368 				"Failed to apply hardware patch: %d\n",
369 				ret);
370 			goto err;
371 		}
372 		break;
373 	default:
374 		ret = arizona_wait_for_boot(arizona);
375 		if (ret != 0) {
376 			goto err;
377 		}
378 
379 		if (arizona->external_dcvdd) {
380 			ret = regmap_update_bits(arizona->regmap,
381 						 ARIZONA_ISOLATION_CONTROL,
382 						 ARIZONA_ISOLATE_DCVDD1, 0);
383 			if (ret != 0) {
384 				dev_err(arizona->dev,
385 					"Failed to connect DCVDD: %d\n", ret);
386 				goto err;
387 			}
388 		}
389 		break;
390 	}
391 
392 	switch (arizona->type) {
393 	case WM5102:
394 		ret = wm5102_patch(arizona);
395 		if (ret != 0) {
396 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
397 				ret);
398 			goto err;
399 		}
400 	default:
401 		break;
402 	}
403 
404 	ret = regcache_sync(arizona->regmap);
405 	if (ret != 0) {
406 		dev_err(arizona->dev, "Failed to restore register cache\n");
407 		goto err;
408 	}
409 
410 	return 0;
411 
412 err:
413 	regcache_cache_only(arizona->regmap, true);
414 	regulator_disable(arizona->dcvdd);
415 	return ret;
416 }
417 
418 static int arizona_runtime_suspend(struct device *dev)
419 {
420 	struct arizona *arizona = dev_get_drvdata(dev);
421 	int ret;
422 
423 	dev_dbg(arizona->dev, "Entering AoD mode\n");
424 
425 	if (arizona->external_dcvdd) {
426 		ret = regmap_update_bits(arizona->regmap,
427 					 ARIZONA_ISOLATION_CONTROL,
428 					 ARIZONA_ISOLATE_DCVDD1,
429 					 ARIZONA_ISOLATE_DCVDD1);
430 		if (ret != 0) {
431 			dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
432 				ret);
433 			return ret;
434 		}
435 	}
436 
437 	regcache_cache_only(arizona->regmap, true);
438 	regcache_mark_dirty(arizona->regmap);
439 	regulator_disable(arizona->dcvdd);
440 
441 	return 0;
442 }
443 #endif
444 
445 #ifdef CONFIG_PM_SLEEP
446 static int arizona_suspend(struct device *dev)
447 {
448 	struct arizona *arizona = dev_get_drvdata(dev);
449 
450 	dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
451 	disable_irq(arizona->irq);
452 
453 	return 0;
454 }
455 
456 static int arizona_suspend_late(struct device *dev)
457 {
458 	struct arizona *arizona = dev_get_drvdata(dev);
459 
460 	dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
461 	enable_irq(arizona->irq);
462 
463 	return 0;
464 }
465 
466 static int arizona_resume_noirq(struct device *dev)
467 {
468 	struct arizona *arizona = dev_get_drvdata(dev);
469 
470 	dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
471 	disable_irq(arizona->irq);
472 
473 	return 0;
474 }
475 
476 static int arizona_resume(struct device *dev)
477 {
478 	struct arizona *arizona = dev_get_drvdata(dev);
479 
480 	dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
481 	enable_irq(arizona->irq);
482 
483 	return 0;
484 }
485 #endif
486 
487 const struct dev_pm_ops arizona_pm_ops = {
488 	SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
489 			   arizona_runtime_resume,
490 			   NULL)
491 	SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
492 #ifdef CONFIG_PM_SLEEP
493 	.suspend_late = arizona_suspend_late,
494 	.resume_noirq = arizona_resume_noirq,
495 #endif
496 };
497 EXPORT_SYMBOL_GPL(arizona_pm_ops);
498 
499 #ifdef CONFIG_OF
500 int arizona_of_get_type(struct device *dev)
501 {
502 	const struct of_device_id *id = of_match_device(arizona_of_match, dev);
503 
504 	if (id)
505 		return (int)id->data;
506 	else
507 		return 0;
508 }
509 EXPORT_SYMBOL_GPL(arizona_of_get_type);
510 
511 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
512 			      bool mandatory)
513 {
514 	int gpio;
515 
516 	gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
517 	if (gpio < 0) {
518 		if (mandatory)
519 			dev_err(arizona->dev,
520 				"Mandatory DT gpio %s missing/malformed: %d\n",
521 				prop, gpio);
522 
523 		gpio = 0;
524 	}
525 
526 	return gpio;
527 }
528 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
529 
530 static int arizona_of_get_core_pdata(struct arizona *arizona)
531 {
532 	struct arizona_pdata *pdata = &arizona->pdata;
533 	int ret, i;
534 
535 	pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
536 
537 	ret = of_property_read_u32_array(arizona->dev->of_node,
538 					 "wlf,gpio-defaults",
539 					 arizona->pdata.gpio_defaults,
540 					 ARRAY_SIZE(arizona->pdata.gpio_defaults));
541 	if (ret >= 0) {
542 		/*
543 		 * All values are literal except out of range values
544 		 * which are chip default, translate into platform
545 		 * data which uses 0 as chip default and out of range
546 		 * as zero.
547 		 */
548 		for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
549 			if (arizona->pdata.gpio_defaults[i] > 0xffff)
550 				arizona->pdata.gpio_defaults[i] = 0;
551 			else if (arizona->pdata.gpio_defaults[i] == 0)
552 				arizona->pdata.gpio_defaults[i] = 0x10000;
553 		}
554 	} else {
555 		dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
556 			ret);
557 	}
558 
559 	return 0;
560 }
561 
562 const struct of_device_id arizona_of_match[] = {
563 	{ .compatible = "wlf,wm5102", .data = (void *)WM5102 },
564 	{ .compatible = "wlf,wm5110", .data = (void *)WM5110 },
565 	{ .compatible = "wlf,wm8997", .data = (void *)WM8997 },
566 	{},
567 };
568 EXPORT_SYMBOL_GPL(arizona_of_match);
569 #else
570 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
571 {
572 	return 0;
573 }
574 #endif
575 
576 static const struct mfd_cell early_devs[] = {
577 	{ .name = "arizona-ldo1" },
578 };
579 
580 static const char *wm5102_supplies[] = {
581 	"DBVDD2",
582 	"DBVDD3",
583 	"CPVDD",
584 	"SPKVDDL",
585 	"SPKVDDR",
586 	"MICVDD",
587 };
588 
589 static const struct mfd_cell wm5102_devs[] = {
590 	{ .name = "arizona-micsupp" },
591 	{ .name = "arizona-extcon" },
592 	{ .name = "arizona-gpio" },
593 	{ .name = "arizona-haptics" },
594 	{ .name = "arizona-pwm" },
595 	{
596 		.name = "wm5102-codec",
597 		.parent_supplies = wm5102_supplies,
598 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
599 	},
600 };
601 
602 static const struct mfd_cell wm5110_devs[] = {
603 	{ .name = "arizona-micsupp" },
604 	{ .name = "arizona-extcon" },
605 	{ .name = "arizona-gpio" },
606 	{ .name = "arizona-haptics" },
607 	{ .name = "arizona-pwm" },
608 	{
609 		.name = "wm5110-codec",
610 		.parent_supplies = wm5102_supplies,
611 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
612 	},
613 };
614 
615 static const char *wm8997_supplies[] = {
616 	"DBVDD2",
617 	"CPVDD",
618 	"SPKVDD",
619 };
620 
621 static const struct mfd_cell wm8997_devs[] = {
622 	{ .name = "arizona-micsupp" },
623 	{ .name = "arizona-extcon" },
624 	{ .name = "arizona-gpio" },
625 	{ .name = "arizona-haptics" },
626 	{ .name = "arizona-pwm" },
627 	{
628 		.name = "wm8997-codec",
629 		.parent_supplies = wm8997_supplies,
630 		.num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
631 	},
632 };
633 
634 int arizona_dev_init(struct arizona *arizona)
635 {
636 	struct device *dev = arizona->dev;
637 	const char *type_name;
638 	unsigned int reg, val;
639 	int (*apply_patch)(struct arizona *) = NULL;
640 	int ret, i;
641 
642 	dev_set_drvdata(arizona->dev, arizona);
643 	mutex_init(&arizona->clk_lock);
644 
645 	if (dev_get_platdata(arizona->dev))
646 		memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
647 		       sizeof(arizona->pdata));
648 	else
649 		arizona_of_get_core_pdata(arizona);
650 
651 	regcache_cache_only(arizona->regmap, true);
652 
653 	switch (arizona->type) {
654 	case WM5102:
655 	case WM5110:
656 	case WM8997:
657 		for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
658 			arizona->core_supplies[i].supply
659 				= wm5102_core_supplies[i];
660 		arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
661 		break;
662 	default:
663 		dev_err(arizona->dev, "Unknown device type %d\n",
664 			arizona->type);
665 		return -EINVAL;
666 	}
667 
668 	/* Mark DCVDD as external, LDO1 driver will clear if internal */
669 	arizona->external_dcvdd = true;
670 
671 	ret = mfd_add_devices(arizona->dev, -1, early_devs,
672 			      ARRAY_SIZE(early_devs), NULL, 0, NULL);
673 	if (ret != 0) {
674 		dev_err(dev, "Failed to add early children: %d\n", ret);
675 		return ret;
676 	}
677 
678 	ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
679 				      arizona->core_supplies);
680 	if (ret != 0) {
681 		dev_err(dev, "Failed to request core supplies: %d\n",
682 			ret);
683 		goto err_early;
684 	}
685 
686 	arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
687 	if (IS_ERR(arizona->dcvdd)) {
688 		ret = PTR_ERR(arizona->dcvdd);
689 		dev_err(dev, "Failed to request DCVDD: %d\n", ret);
690 		goto err_early;
691 	}
692 
693 	if (arizona->pdata.reset) {
694 		/* Start out with /RESET low to put the chip into reset */
695 		ret = gpio_request_one(arizona->pdata.reset,
696 				       GPIOF_DIR_OUT | GPIOF_INIT_LOW,
697 				       "arizona /RESET");
698 		if (ret != 0) {
699 			dev_err(dev, "Failed to request /RESET: %d\n", ret);
700 			goto err_early;
701 		}
702 	}
703 
704 	ret = regulator_bulk_enable(arizona->num_core_supplies,
705 				    arizona->core_supplies);
706 	if (ret != 0) {
707 		dev_err(dev, "Failed to enable core supplies: %d\n",
708 			ret);
709 		goto err_early;
710 	}
711 
712 	ret = regulator_enable(arizona->dcvdd);
713 	if (ret != 0) {
714 		dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
715 		goto err_enable;
716 	}
717 
718 	if (arizona->pdata.reset) {
719 		gpio_set_value_cansleep(arizona->pdata.reset, 1);
720 		msleep(1);
721 	}
722 
723 	regcache_cache_only(arizona->regmap, false);
724 
725 	/* Verify that this is a chip we know about */
726 	ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
727 	if (ret != 0) {
728 		dev_err(dev, "Failed to read ID register: %d\n", ret);
729 		goto err_reset;
730 	}
731 
732 	switch (reg) {
733 	case 0x5102:
734 	case 0x5110:
735 	case 0x8997:
736 		break;
737 	default:
738 		dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
739 		goto err_reset;
740 	}
741 
742 	/* If we have a /RESET GPIO we'll already be reset */
743 	if (!arizona->pdata.reset) {
744 		regcache_mark_dirty(arizona->regmap);
745 
746 		ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
747 		if (ret != 0) {
748 			dev_err(dev, "Failed to reset device: %d\n", ret);
749 			goto err_reset;
750 		}
751 
752 		msleep(1);
753 
754 		ret = regcache_sync(arizona->regmap);
755 		if (ret != 0) {
756 			dev_err(dev, "Failed to sync device: %d\n", ret);
757 			goto err_reset;
758 		}
759 	}
760 
761 	/* Ensure device startup is complete */
762 	switch (arizona->type) {
763 	case WM5102:
764 		ret = regmap_read(arizona->regmap, 0x19, &val);
765 		if (ret != 0)
766 			dev_err(dev,
767 				"Failed to check write sequencer state: %d\n",
768 				ret);
769 		else if (val & 0x01)
770 			break;
771 		/* Fall through */
772 	default:
773 		ret = arizona_wait_for_boot(arizona);
774 		if (ret != 0) {
775 			dev_err(arizona->dev,
776 				"Device failed initial boot: %d\n", ret);
777 			goto err_reset;
778 		}
779 		break;
780 	}
781 
782 	/* Read the device ID information & do device specific stuff */
783 	ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
784 	if (ret != 0) {
785 		dev_err(dev, "Failed to read ID register: %d\n", ret);
786 		goto err_reset;
787 	}
788 
789 	ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
790 			  &arizona->rev);
791 	if (ret != 0) {
792 		dev_err(dev, "Failed to read revision register: %d\n", ret);
793 		goto err_reset;
794 	}
795 	arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
796 
797 	switch (reg) {
798 #ifdef CONFIG_MFD_WM5102
799 	case 0x5102:
800 		type_name = "WM5102";
801 		if (arizona->type != WM5102) {
802 			dev_err(arizona->dev, "WM5102 registered as %d\n",
803 				arizona->type);
804 			arizona->type = WM5102;
805 		}
806 		apply_patch = wm5102_patch;
807 		arizona->rev &= 0x7;
808 		break;
809 #endif
810 #ifdef CONFIG_MFD_WM5110
811 	case 0x5110:
812 		type_name = "WM5110";
813 		if (arizona->type != WM5110) {
814 			dev_err(arizona->dev, "WM5110 registered as %d\n",
815 				arizona->type);
816 			arizona->type = WM5110;
817 		}
818 		apply_patch = wm5110_patch;
819 		break;
820 #endif
821 #ifdef CONFIG_MFD_WM8997
822 	case 0x8997:
823 		type_name = "WM8997";
824 		if (arizona->type != WM8997) {
825 			dev_err(arizona->dev, "WM8997 registered as %d\n",
826 				arizona->type);
827 			arizona->type = WM8997;
828 		}
829 		apply_patch = wm8997_patch;
830 		break;
831 #endif
832 	default:
833 		dev_err(arizona->dev, "Unknown device ID %x\n", reg);
834 		goto err_reset;
835 	}
836 
837 	dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
838 
839 	if (apply_patch) {
840 		ret = apply_patch(arizona);
841 		if (ret != 0) {
842 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
843 				ret);
844 			goto err_reset;
845 		}
846 
847 		switch (arizona->type) {
848 		case WM5102:
849 			ret = arizona_apply_hardware_patch(arizona);
850 			if (ret != 0) {
851 				dev_err(arizona->dev,
852 					"Failed to apply hardware patch: %d\n",
853 					ret);
854 				goto err_reset;
855 			}
856 			break;
857 		default:
858 			break;
859 		}
860 	}
861 
862 	for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
863 		if (!arizona->pdata.gpio_defaults[i])
864 			continue;
865 
866 		regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
867 			     arizona->pdata.gpio_defaults[i]);
868 	}
869 
870 	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
871 	pm_runtime_use_autosuspend(arizona->dev);
872 	pm_runtime_enable(arizona->dev);
873 
874 	/* Chip default */
875 	if (!arizona->pdata.clk32k_src)
876 		arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
877 
878 	switch (arizona->pdata.clk32k_src) {
879 	case ARIZONA_32KZ_MCLK1:
880 	case ARIZONA_32KZ_MCLK2:
881 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
882 				   ARIZONA_CLK_32K_SRC_MASK,
883 				   arizona->pdata.clk32k_src - 1);
884 		arizona_clk32k_enable(arizona);
885 		break;
886 	case ARIZONA_32KZ_NONE:
887 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
888 				   ARIZONA_CLK_32K_SRC_MASK, 2);
889 		break;
890 	default:
891 		dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
892 			arizona->pdata.clk32k_src);
893 		ret = -EINVAL;
894 		goto err_reset;
895 	}
896 
897 	for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
898 		if (!arizona->pdata.micbias[i].mV &&
899 		    !arizona->pdata.micbias[i].bypass)
900 			continue;
901 
902 		/* Apply default for bypass mode */
903 		if (!arizona->pdata.micbias[i].mV)
904 			arizona->pdata.micbias[i].mV = 2800;
905 
906 		val = (arizona->pdata.micbias[i].mV - 1500) / 100;
907 
908 		val <<= ARIZONA_MICB1_LVL_SHIFT;
909 
910 		if (arizona->pdata.micbias[i].ext_cap)
911 			val |= ARIZONA_MICB1_EXT_CAP;
912 
913 		if (arizona->pdata.micbias[i].discharge)
914 			val |= ARIZONA_MICB1_DISCH;
915 
916 		if (arizona->pdata.micbias[i].soft_start)
917 			val |= ARIZONA_MICB1_RATE;
918 
919 		if (arizona->pdata.micbias[i].bypass)
920 			val |= ARIZONA_MICB1_BYPASS;
921 
922 		regmap_update_bits(arizona->regmap,
923 				   ARIZONA_MIC_BIAS_CTRL_1 + i,
924 				   ARIZONA_MICB1_LVL_MASK |
925 				   ARIZONA_MICB1_DISCH |
926 				   ARIZONA_MICB1_BYPASS |
927 				   ARIZONA_MICB1_RATE, val);
928 	}
929 
930 	for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
931 		/* Default for both is 0 so noop with defaults */
932 		val = arizona->pdata.dmic_ref[i]
933 			<< ARIZONA_IN1_DMIC_SUP_SHIFT;
934 		val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
935 
936 		regmap_update_bits(arizona->regmap,
937 				   ARIZONA_IN1L_CONTROL + (i * 8),
938 				   ARIZONA_IN1_DMIC_SUP_MASK |
939 				   ARIZONA_IN1_MODE_MASK, val);
940 	}
941 
942 	for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
943 		/* Default is 0 so noop with defaults */
944 		if (arizona->pdata.out_mono[i])
945 			val = ARIZONA_OUT1_MONO;
946 		else
947 			val = 0;
948 
949 		regmap_update_bits(arizona->regmap,
950 				   ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
951 				   ARIZONA_OUT1_MONO, val);
952 	}
953 
954 	for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
955 		if (arizona->pdata.spk_mute[i])
956 			regmap_update_bits(arizona->regmap,
957 					   ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
958 					   ARIZONA_SPK1_MUTE_ENDIAN_MASK |
959 					   ARIZONA_SPK1_MUTE_SEQ1_MASK,
960 					   arizona->pdata.spk_mute[i]);
961 
962 		if (arizona->pdata.spk_fmt[i])
963 			regmap_update_bits(arizona->regmap,
964 					   ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
965 					   ARIZONA_SPK1_FMT_MASK,
966 					   arizona->pdata.spk_fmt[i]);
967 	}
968 
969 	/* Set up for interrupts */
970 	ret = arizona_irq_init(arizona);
971 	if (ret != 0)
972 		goto err_reset;
973 
974 	arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
975 			    arizona_clkgen_err, arizona);
976 	arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
977 			    arizona_overclocked, arizona);
978 	arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
979 			    arizona_underclocked, arizona);
980 
981 	switch (arizona->type) {
982 	case WM5102:
983 		ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
984 				      ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
985 		break;
986 	case WM5110:
987 		ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
988 				      ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
989 		break;
990 	case WM8997:
991 		ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
992 				      ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
993 		break;
994 	}
995 
996 	if (ret != 0) {
997 		dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
998 		goto err_irq;
999 	}
1000 
1001 #ifdef CONFIG_PM_RUNTIME
1002 	regulator_disable(arizona->dcvdd);
1003 #endif
1004 
1005 	return 0;
1006 
1007 err_irq:
1008 	arizona_irq_exit(arizona);
1009 err_reset:
1010 	if (arizona->pdata.reset) {
1011 		gpio_set_value_cansleep(arizona->pdata.reset, 0);
1012 		gpio_free(arizona->pdata.reset);
1013 	}
1014 	regulator_disable(arizona->dcvdd);
1015 err_enable:
1016 	regulator_bulk_disable(arizona->num_core_supplies,
1017 			       arizona->core_supplies);
1018 err_early:
1019 	mfd_remove_devices(dev);
1020 	return ret;
1021 }
1022 EXPORT_SYMBOL_GPL(arizona_dev_init);
1023 
1024 int arizona_dev_exit(struct arizona *arizona)
1025 {
1026 	mfd_remove_devices(arizona->dev);
1027 	arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1028 	arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1029 	arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1030 	pm_runtime_disable(arizona->dev);
1031 	arizona_irq_exit(arizona);
1032 	if (arizona->pdata.reset)
1033 		gpio_set_value_cansleep(arizona->pdata.reset, 0);
1034 	regulator_disable(arizona->dcvdd);
1035 	regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
1036 			       arizona->core_supplies);
1037 	return 0;
1038 }
1039 EXPORT_SYMBOL_GPL(arizona_dev_exit);
1040