1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) ST-Ericsson SA 2010 4 * 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/slab.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/irqdomain.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/moduleparam.h> 18 #include <linux/platform_device.h> 19 #include <linux/mfd/core.h> 20 #include <linux/mfd/abx500.h> 21 #include <linux/mfd/abx500/ab8500.h> 22 #include <linux/mfd/abx500/ab8500-bm.h> 23 #include <linux/mfd/dbx500-prcmu.h> 24 #include <linux/of.h> 25 #include <linux/of_device.h> 26 27 /* 28 * Interrupt register offsets 29 * Bank : 0x0E 30 */ 31 #define AB8500_IT_SOURCE1_REG 0x00 32 #define AB8500_IT_SOURCE2_REG 0x01 33 #define AB8500_IT_SOURCE3_REG 0x02 34 #define AB8500_IT_SOURCE4_REG 0x03 35 #define AB8500_IT_SOURCE5_REG 0x04 36 #define AB8500_IT_SOURCE6_REG 0x05 37 #define AB8500_IT_SOURCE7_REG 0x06 38 #define AB8500_IT_SOURCE8_REG 0x07 39 #define AB9540_IT_SOURCE13_REG 0x0C 40 #define AB8500_IT_SOURCE19_REG 0x12 41 #define AB8500_IT_SOURCE20_REG 0x13 42 #define AB8500_IT_SOURCE21_REG 0x14 43 #define AB8500_IT_SOURCE22_REG 0x15 44 #define AB8500_IT_SOURCE23_REG 0x16 45 #define AB8500_IT_SOURCE24_REG 0x17 46 47 /* 48 * latch registers 49 */ 50 #define AB8500_IT_LATCH1_REG 0x20 51 #define AB8500_IT_LATCH2_REG 0x21 52 #define AB8500_IT_LATCH3_REG 0x22 53 #define AB8500_IT_LATCH4_REG 0x23 54 #define AB8500_IT_LATCH5_REG 0x24 55 #define AB8500_IT_LATCH6_REG 0x25 56 #define AB8500_IT_LATCH7_REG 0x26 57 #define AB8500_IT_LATCH8_REG 0x27 58 #define AB8500_IT_LATCH9_REG 0x28 59 #define AB8500_IT_LATCH10_REG 0x29 60 #define AB8500_IT_LATCH12_REG 0x2B 61 #define AB9540_IT_LATCH13_REG 0x2C 62 #define AB8500_IT_LATCH19_REG 0x32 63 #define AB8500_IT_LATCH20_REG 0x33 64 #define AB8500_IT_LATCH21_REG 0x34 65 #define AB8500_IT_LATCH22_REG 0x35 66 #define AB8500_IT_LATCH23_REG 0x36 67 #define AB8500_IT_LATCH24_REG 0x37 68 69 /* 70 * mask registers 71 */ 72 73 #define AB8500_IT_MASK1_REG 0x40 74 #define AB8500_IT_MASK2_REG 0x41 75 #define AB8500_IT_MASK3_REG 0x42 76 #define AB8500_IT_MASK4_REG 0x43 77 #define AB8500_IT_MASK5_REG 0x44 78 #define AB8500_IT_MASK6_REG 0x45 79 #define AB8500_IT_MASK7_REG 0x46 80 #define AB8500_IT_MASK8_REG 0x47 81 #define AB8500_IT_MASK9_REG 0x48 82 #define AB8500_IT_MASK10_REG 0x49 83 #define AB8500_IT_MASK11_REG 0x4A 84 #define AB8500_IT_MASK12_REG 0x4B 85 #define AB8500_IT_MASK13_REG 0x4C 86 #define AB8500_IT_MASK14_REG 0x4D 87 #define AB8500_IT_MASK15_REG 0x4E 88 #define AB8500_IT_MASK16_REG 0x4F 89 #define AB8500_IT_MASK17_REG 0x50 90 #define AB8500_IT_MASK18_REG 0x51 91 #define AB8500_IT_MASK19_REG 0x52 92 #define AB8500_IT_MASK20_REG 0x53 93 #define AB8500_IT_MASK21_REG 0x54 94 #define AB8500_IT_MASK22_REG 0x55 95 #define AB8500_IT_MASK23_REG 0x56 96 #define AB8500_IT_MASK24_REG 0x57 97 #define AB8500_IT_MASK25_REG 0x58 98 99 /* 100 * latch hierarchy registers 101 */ 102 #define AB8500_IT_LATCHHIER1_REG 0x60 103 #define AB8500_IT_LATCHHIER2_REG 0x61 104 #define AB8500_IT_LATCHHIER3_REG 0x62 105 #define AB8540_IT_LATCHHIER4_REG 0x63 106 107 #define AB8500_IT_LATCHHIER_NUM 3 108 #define AB8540_IT_LATCHHIER_NUM 4 109 110 #define AB8500_REV_REG 0x80 111 #define AB8500_IC_NAME_REG 0x82 112 #define AB8500_SWITCH_OFF_STATUS 0x00 113 114 #define AB8500_TURN_ON_STATUS 0x00 115 #define AB8505_TURN_ON_STATUS_2 0x04 116 117 #define AB8500_CH_USBCH_STAT1_REG 0x02 118 #define VBUS_DET_DBNC100 0x02 119 #define VBUS_DET_DBNC1 0x01 120 121 static DEFINE_SPINLOCK(on_stat_lock); 122 static u8 turn_on_stat_mask = 0xFF; 123 static u8 turn_on_stat_set; 124 static bool no_bm; /* No battery management */ 125 /* 126 * not really modular, but the easiest way to keep compat with existing 127 * bootargs behaviour is to continue using module_param here. 128 */ 129 module_param(no_bm, bool, S_IRUGO); 130 131 #define AB9540_MODEM_CTRL2_REG 0x23 132 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 133 134 /* 135 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 136 * numbers are indexed into this array with (num / 8). The interupts are 137 * defined in linux/mfd/ab8500.h 138 * 139 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 140 * offset 0. 141 */ 142 /* AB8500 support */ 143 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 144 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 145 }; 146 147 /* AB9540 / AB8505 support */ 148 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 149 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23 150 }; 151 152 /* AB8540 support */ 153 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = { 154 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 155 23, 25, 26, 27, 28, 29, 30, 31, 156 }; 157 158 static const char ab8500_version_str[][7] = { 159 [AB8500_VERSION_AB8500] = "AB8500", 160 [AB8500_VERSION_AB8505] = "AB8505", 161 [AB8500_VERSION_AB9540] = "AB9540", 162 [AB8500_VERSION_AB8540] = "AB8540", 163 }; 164 165 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) 166 { 167 int ret; 168 169 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 170 if (ret < 0) 171 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 172 return ret; 173 } 174 175 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, 176 u8 data) 177 { 178 int ret; 179 180 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 181 &mask, 1); 182 if (ret < 0) 183 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 184 return ret; 185 } 186 187 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) 188 { 189 int ret; 190 u8 data; 191 192 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); 193 if (ret < 0) { 194 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); 195 return ret; 196 } 197 return (int)data; 198 } 199 200 static int ab8500_get_chip_id(struct device *dev) 201 { 202 struct ab8500 *ab8500; 203 204 if (!dev) 205 return -EINVAL; 206 ab8500 = dev_get_drvdata(dev->parent); 207 return ab8500 ? (int)ab8500->chip_id : -EINVAL; 208 } 209 210 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 211 u8 reg, u8 data) 212 { 213 int ret; 214 /* 215 * Put the u8 bank and u8 register together into a an u16. 216 * The bank on higher 8 bits and register in lower 8 bits. 217 */ 218 u16 addr = ((u16)bank) << 8 | reg; 219 220 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 221 222 mutex_lock(&ab8500->lock); 223 224 ret = ab8500->write(ab8500, addr, data); 225 if (ret < 0) 226 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 227 addr, ret); 228 mutex_unlock(&ab8500->lock); 229 230 return ret; 231 } 232 233 static int ab8500_set_register(struct device *dev, u8 bank, 234 u8 reg, u8 value) 235 { 236 int ret; 237 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 238 239 atomic_inc(&ab8500->transfer_ongoing); 240 ret = set_register_interruptible(ab8500, bank, reg, value); 241 atomic_dec(&ab8500->transfer_ongoing); 242 return ret; 243 } 244 245 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 246 u8 reg, u8 *value) 247 { 248 int ret; 249 u16 addr = ((u16)bank) << 8 | reg; 250 251 mutex_lock(&ab8500->lock); 252 253 ret = ab8500->read(ab8500, addr); 254 if (ret < 0) 255 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 256 addr, ret); 257 else 258 *value = ret; 259 260 mutex_unlock(&ab8500->lock); 261 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 262 263 return (ret < 0) ? ret : 0; 264 } 265 266 static int ab8500_get_register(struct device *dev, u8 bank, 267 u8 reg, u8 *value) 268 { 269 int ret; 270 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 271 272 atomic_inc(&ab8500->transfer_ongoing); 273 ret = get_register_interruptible(ab8500, bank, reg, value); 274 atomic_dec(&ab8500->transfer_ongoing); 275 return ret; 276 } 277 278 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 279 u8 reg, u8 bitmask, u8 bitvalues) 280 { 281 int ret; 282 u16 addr = ((u16)bank) << 8 | reg; 283 284 mutex_lock(&ab8500->lock); 285 286 if (ab8500->write_masked == NULL) { 287 u8 data; 288 289 ret = ab8500->read(ab8500, addr); 290 if (ret < 0) { 291 dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 292 addr, ret); 293 goto out; 294 } 295 296 data = (u8)ret; 297 data = (~bitmask & data) | (bitmask & bitvalues); 298 299 ret = ab8500->write(ab8500, addr, data); 300 if (ret < 0) 301 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 302 addr, ret); 303 304 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 305 data); 306 goto out; 307 } 308 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 309 if (ret < 0) 310 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 311 ret); 312 out: 313 mutex_unlock(&ab8500->lock); 314 return ret; 315 } 316 317 static int ab8500_mask_and_set_register(struct device *dev, 318 u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 319 { 320 int ret; 321 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 322 323 atomic_inc(&ab8500->transfer_ongoing); 324 ret = mask_and_set_register_interruptible(ab8500, bank, reg, 325 bitmask, bitvalues); 326 atomic_dec(&ab8500->transfer_ongoing); 327 return ret; 328 } 329 330 static struct abx500_ops ab8500_ops = { 331 .get_chip_id = ab8500_get_chip_id, 332 .get_register = ab8500_get_register, 333 .set_register = ab8500_set_register, 334 .get_register_page = NULL, 335 .set_register_page = NULL, 336 .mask_and_set_register = ab8500_mask_and_set_register, 337 .event_registers_startup_state_get = NULL, 338 .startup_irq_enabled = NULL, 339 .dump_all_banks = ab8500_dump_all_banks, 340 }; 341 342 static void ab8500_irq_lock(struct irq_data *data) 343 { 344 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 345 346 mutex_lock(&ab8500->irq_lock); 347 atomic_inc(&ab8500->transfer_ongoing); 348 } 349 350 static void ab8500_irq_sync_unlock(struct irq_data *data) 351 { 352 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 353 int i; 354 355 for (i = 0; i < ab8500->mask_size; i++) { 356 u8 old = ab8500->oldmask[i]; 357 u8 new = ab8500->mask[i]; 358 int reg; 359 360 if (new == old) 361 continue; 362 363 /* 364 * Interrupt register 12 doesn't exist prior to AB8500 version 365 * 2.0 366 */ 367 if (ab8500->irq_reg_offset[i] == 11 && 368 is_ab8500_1p1_or_earlier(ab8500)) 369 continue; 370 371 if (ab8500->irq_reg_offset[i] < 0) 372 continue; 373 374 ab8500->oldmask[i] = new; 375 376 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 377 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 378 } 379 atomic_dec(&ab8500->transfer_ongoing); 380 mutex_unlock(&ab8500->irq_lock); 381 } 382 383 static void ab8500_irq_mask(struct irq_data *data) 384 { 385 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 386 int offset = data->hwirq; 387 int index = offset / 8; 388 int mask = 1 << (offset % 8); 389 390 ab8500->mask[index] |= mask; 391 392 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 393 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 394 ab8500->mask[index + 2] |= mask; 395 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) 396 ab8500->mask[index + 1] |= mask; 397 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) 398 /* Here the falling IRQ is one bit lower */ 399 ab8500->mask[index] |= (mask << 1); 400 } 401 402 static void ab8500_irq_unmask(struct irq_data *data) 403 { 404 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 405 unsigned int type = irqd_get_trigger_type(data); 406 int offset = data->hwirq; 407 int index = offset / 8; 408 int mask = 1 << (offset % 8); 409 410 if (type & IRQ_TYPE_EDGE_RISING) 411 ab8500->mask[index] &= ~mask; 412 413 /* The AB8500 GPIOs have two interrupts each (rising & falling). */ 414 if (type & IRQ_TYPE_EDGE_FALLING) { 415 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) 416 ab8500->mask[index + 2] &= ~mask; 417 else if (offset >= AB9540_INT_GPIO50R && 418 offset <= AB9540_INT_GPIO54R) 419 ab8500->mask[index + 1] &= ~mask; 420 else if (offset == AB8540_INT_GPIO43R || 421 offset == AB8540_INT_GPIO44R) 422 /* Here the falling IRQ is one bit lower */ 423 ab8500->mask[index] &= ~(mask << 1); 424 else 425 ab8500->mask[index] &= ~mask; 426 } else { 427 /* Satisfies the case where type is not set. */ 428 ab8500->mask[index] &= ~mask; 429 } 430 } 431 432 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type) 433 { 434 return 0; 435 } 436 437 static struct irq_chip ab8500_irq_chip = { 438 .name = "ab8500", 439 .irq_bus_lock = ab8500_irq_lock, 440 .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 441 .irq_mask = ab8500_irq_mask, 442 .irq_disable = ab8500_irq_mask, 443 .irq_unmask = ab8500_irq_unmask, 444 .irq_set_type = ab8500_irq_set_type, 445 }; 446 447 static void update_latch_offset(u8 *offset, int i) 448 { 449 /* Fix inconsistent ITFromLatch25 bit mapping... */ 450 if (unlikely(*offset == 17)) 451 *offset = 24; 452 /* Fix inconsistent ab8540 bit mapping... */ 453 if (unlikely(*offset == 16)) 454 *offset = 25; 455 if ((i == 3) && (*offset >= 24)) 456 *offset += 2; 457 } 458 459 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 460 int latch_offset, u8 latch_val) 461 { 462 int int_bit, line, i; 463 464 for (i = 0; i < ab8500->mask_size; i++) 465 if (ab8500->irq_reg_offset[i] == latch_offset) 466 break; 467 468 if (i >= ab8500->mask_size) { 469 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 470 latch_offset); 471 return -ENXIO; 472 } 473 474 /* ignore masked out interrupts */ 475 latch_val &= ~ab8500->mask[i]; 476 477 while (latch_val) { 478 int_bit = __ffs(latch_val); 479 line = (i << 3) + int_bit; 480 latch_val &= ~(1 << int_bit); 481 482 /* 483 * This handles the falling edge hwirqs from the GPIO 484 * lines. Route them back to the line registered for the 485 * rising IRQ, as this is merely a flag for the same IRQ 486 * in linux terms. 487 */ 488 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F) 489 line -= 16; 490 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F) 491 line -= 8; 492 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F) 493 line += 1; 494 495 handle_nested_irq(irq_create_mapping(ab8500->domain, line)); 496 } 497 498 return 0; 499 } 500 501 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 502 int hier_offset, u8 hier_val) 503 { 504 int latch_bit, status; 505 u8 latch_offset, latch_val; 506 507 do { 508 latch_bit = __ffs(hier_val); 509 latch_offset = (hier_offset << 3) + latch_bit; 510 511 update_latch_offset(&latch_offset, hier_offset); 512 513 status = get_register_interruptible(ab8500, 514 AB8500_INTERRUPT, 515 AB8500_IT_LATCH1_REG + latch_offset, 516 &latch_val); 517 if (status < 0 || latch_val == 0) 518 goto discard; 519 520 status = ab8500_handle_hierarchical_line(ab8500, 521 latch_offset, latch_val); 522 if (status < 0) 523 return status; 524 discard: 525 hier_val &= ~(1 << latch_bit); 526 } while (hier_val); 527 528 return 0; 529 } 530 531 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 532 { 533 struct ab8500 *ab8500 = dev; 534 u8 i; 535 536 dev_vdbg(ab8500->dev, "interrupt\n"); 537 538 /* Hierarchical interrupt version */ 539 for (i = 0; i < (ab8500->it_latchhier_num); i++) { 540 int status; 541 u8 hier_val; 542 543 status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 544 AB8500_IT_LATCHHIER1_REG + i, &hier_val); 545 if (status < 0 || hier_val == 0) 546 continue; 547 548 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 549 if (status < 0) 550 break; 551 } 552 return IRQ_HANDLED; 553 } 554 555 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 556 irq_hw_number_t hwirq) 557 { 558 struct ab8500 *ab8500 = d->host_data; 559 560 if (!ab8500) 561 return -EINVAL; 562 563 irq_set_chip_data(virq, ab8500); 564 irq_set_chip_and_handler(virq, &ab8500_irq_chip, 565 handle_simple_irq); 566 irq_set_nested_thread(virq, 1); 567 irq_set_noprobe(virq); 568 569 return 0; 570 } 571 572 static const struct irq_domain_ops ab8500_irq_ops = { 573 .map = ab8500_irq_map, 574 .xlate = irq_domain_xlate_twocell, 575 }; 576 577 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) 578 { 579 int num_irqs; 580 581 if (is_ab8540(ab8500)) 582 num_irqs = AB8540_NR_IRQS; 583 else if (is_ab9540(ab8500)) 584 num_irqs = AB9540_NR_IRQS; 585 else if (is_ab8505(ab8500)) 586 num_irqs = AB8505_NR_IRQS; 587 else 588 num_irqs = AB8500_NR_IRQS; 589 590 /* If ->irq_base is zero this will give a linear mapping */ 591 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node, 592 num_irqs, 0, 593 &ab8500_irq_ops, ab8500); 594 595 if (!ab8500->domain) { 596 dev_err(ab8500->dev, "Failed to create irqdomain\n"); 597 return -ENODEV; 598 } 599 600 return 0; 601 } 602 603 int ab8500_suspend(struct ab8500 *ab8500) 604 { 605 if (atomic_read(&ab8500->transfer_ongoing)) 606 return -EINVAL; 607 608 return 0; 609 } 610 611 static const struct mfd_cell ab8500_bm_devs[] = { 612 MFD_CELL_OF("ab8500-charger", NULL, &ab8500_bm_data, 613 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-charger"), 614 MFD_CELL_OF("ab8500-btemp", NULL, &ab8500_bm_data, 615 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-btemp"), 616 MFD_CELL_OF("ab8500-fg", NULL, &ab8500_bm_data, 617 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-fg"), 618 MFD_CELL_OF("ab8500-chargalg", NULL, &ab8500_bm_data, 619 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-chargalg"), 620 }; 621 622 static const struct mfd_cell ab8500_devs[] = { 623 #ifdef CONFIG_DEBUG_FS 624 MFD_CELL_OF("ab8500-debug", 625 NULL, NULL, 0, 0, "stericsson,ab8500-debug"), 626 #endif 627 MFD_CELL_OF("ab8500-sysctrl", 628 NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"), 629 MFD_CELL_OF("ab8500-ext-regulator", 630 NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"), 631 MFD_CELL_OF("ab8500-regulator", 632 NULL, NULL, 0, 0, "stericsson,ab8500-regulator"), 633 MFD_CELL_OF("ab8500-clk", 634 NULL, NULL, 0, 0, "stericsson,ab8500-clk"), 635 MFD_CELL_OF("ab8500-gpadc", 636 NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"), 637 MFD_CELL_OF("ab8500-rtc", 638 NULL, NULL, 0, 0, "stericsson,ab8500-rtc"), 639 MFD_CELL_OF("ab8500-acc-det", 640 NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"), 641 MFD_CELL_OF("ab8500-poweron-key", 642 NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"), 643 MFD_CELL_OF("ab8500-pwm", 644 NULL, NULL, 0, 1, "stericsson,ab8500-pwm"), 645 MFD_CELL_OF("ab8500-pwm", 646 NULL, NULL, 0, 2, "stericsson,ab8500-pwm"), 647 MFD_CELL_OF("ab8500-pwm", 648 NULL, NULL, 0, 3, "stericsson,ab8500-pwm"), 649 MFD_CELL_OF("ab8500-denc", 650 NULL, NULL, 0, 0, "stericsson,ab8500-denc"), 651 MFD_CELL_OF("pinctrl-ab8500", 652 NULL, NULL, 0, 0, "stericsson,ab8500-gpio"), 653 MFD_CELL_OF("abx500-temp", 654 NULL, NULL, 0, 0, "stericsson,abx500-temp"), 655 MFD_CELL_OF("ab8500-usb", 656 NULL, NULL, 0, 0, "stericsson,ab8500-usb"), 657 MFD_CELL_OF("ab8500-codec", 658 NULL, NULL, 0, 0, "stericsson,ab8500-codec"), 659 }; 660 661 static const struct mfd_cell ab9540_devs[] = { 662 #ifdef CONFIG_DEBUG_FS 663 { 664 .name = "ab8500-debug", 665 }, 666 #endif 667 { 668 .name = "ab8500-sysctrl", 669 }, 670 { 671 .name = "ab8500-ext-regulator", 672 }, 673 { 674 .name = "ab8500-regulator", 675 }, 676 { 677 .name = "abx500-clk", 678 .of_compatible = "stericsson,abx500-clk", 679 }, 680 { 681 .name = "ab8500-gpadc", 682 .of_compatible = "stericsson,ab8500-gpadc", 683 }, 684 { 685 .name = "ab8500-rtc", 686 }, 687 { 688 .name = "ab8500-acc-det", 689 }, 690 { 691 .name = "ab8500-poweron-key", 692 }, 693 { 694 .name = "ab8500-pwm", 695 .id = 1, 696 }, 697 { 698 .name = "abx500-temp", 699 }, 700 { 701 .name = "pinctrl-ab9540", 702 .of_compatible = "stericsson,ab9540-gpio", 703 }, 704 { 705 .name = "ab9540-usb", 706 }, 707 { 708 .name = "ab9540-codec", 709 }, 710 { 711 .name = "ab-iddet", 712 }, 713 }; 714 715 /* Device list for ab8505 */ 716 static const struct mfd_cell ab8505_devs[] = { 717 #ifdef CONFIG_DEBUG_FS 718 { 719 .name = "ab8500-debug", 720 .of_compatible = "stericsson,ab8500-debug", 721 }, 722 #endif 723 { 724 .name = "ab8500-sysctrl", 725 .of_compatible = "stericsson,ab8500-sysctrl", 726 }, 727 { 728 .name = "ab8500-regulator", 729 .of_compatible = "stericsson,ab8505-regulator", 730 }, 731 { 732 .name = "abx500-clk", 733 .of_compatible = "stericsson,ab8500-clk", 734 }, 735 { 736 .name = "ab8500-gpadc", 737 .of_compatible = "stericsson,ab8500-gpadc", 738 }, 739 { 740 .name = "ab8500-rtc", 741 .of_compatible = "stericsson,ab8500-rtc", 742 }, 743 { 744 .name = "ab8500-acc-det", 745 .of_compatible = "stericsson,ab8500-acc-det", 746 }, 747 { 748 .name = "ab8500-poweron-key", 749 .of_compatible = "stericsson,ab8500-poweron-key", 750 }, 751 { 752 .name = "ab8500-pwm", 753 .of_compatible = "stericsson,ab8500-pwm", 754 .id = 1, 755 }, 756 { 757 .name = "pinctrl-ab8505", 758 .of_compatible = "stericsson,ab8505-gpio", 759 }, 760 { 761 .name = "ab8500-usb", 762 .of_compatible = "stericsson,ab8500-usb", 763 }, 764 { 765 .name = "ab8500-codec", 766 .of_compatible = "stericsson,ab8500-codec", 767 }, 768 { 769 .name = "ab-iddet", 770 }, 771 }; 772 773 static const struct mfd_cell ab8540_devs[] = { 774 #ifdef CONFIG_DEBUG_FS 775 { 776 .name = "ab8500-debug", 777 }, 778 #endif 779 { 780 .name = "ab8500-sysctrl", 781 }, 782 { 783 .name = "ab8500-ext-regulator", 784 }, 785 { 786 .name = "ab8500-regulator", 787 }, 788 { 789 .name = "abx500-clk", 790 .of_compatible = "stericsson,abx500-clk", 791 }, 792 { 793 .name = "ab8500-gpadc", 794 .of_compatible = "stericsson,ab8500-gpadc", 795 }, 796 { 797 .name = "ab8500-acc-det", 798 }, 799 { 800 .name = "ab8500-poweron-key", 801 }, 802 { 803 .name = "ab8500-pwm", 804 .id = 1, 805 }, 806 { 807 .name = "abx500-temp", 808 }, 809 { 810 .name = "pinctrl-ab8540", 811 }, 812 { 813 .name = "ab8540-usb", 814 }, 815 { 816 .name = "ab8540-codec", 817 }, 818 { 819 .name = "ab-iddet", 820 }, 821 }; 822 823 static const struct mfd_cell ab8540_cut1_devs[] = { 824 { 825 .name = "ab8500-rtc", 826 .of_compatible = "stericsson,ab8500-rtc", 827 }, 828 }; 829 830 static const struct mfd_cell ab8540_cut2_devs[] = { 831 { 832 .name = "ab8540-rtc", 833 .of_compatible = "stericsson,ab8540-rtc", 834 }, 835 }; 836 837 static ssize_t show_chip_id(struct device *dev, 838 struct device_attribute *attr, char *buf) 839 { 840 struct ab8500 *ab8500; 841 842 ab8500 = dev_get_drvdata(dev); 843 844 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 845 } 846 847 /* 848 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 849 * 0x01 Swoff bit programming 850 * 0x02 Thermal protection activation 851 * 0x04 Vbat lower then BattOk falling threshold 852 * 0x08 Watchdog expired 853 * 0x10 Non presence of 32kHz clock 854 * 0x20 Battery level lower than power on reset threshold 855 * 0x40 Power on key 1 pressed longer than 10 seconds 856 * 0x80 DB8500 thermal shutdown 857 */ 858 static ssize_t show_switch_off_status(struct device *dev, 859 struct device_attribute *attr, char *buf) 860 { 861 int ret; 862 u8 value; 863 struct ab8500 *ab8500; 864 865 ab8500 = dev_get_drvdata(dev); 866 ret = get_register_interruptible(ab8500, AB8500_RTC, 867 AB8500_SWITCH_OFF_STATUS, &value); 868 if (ret < 0) 869 return ret; 870 return sprintf(buf, "%#x\n", value); 871 } 872 873 /* use mask and set to override the register turn_on_stat value */ 874 void ab8500_override_turn_on_stat(u8 mask, u8 set) 875 { 876 spin_lock(&on_stat_lock); 877 turn_on_stat_mask = mask; 878 turn_on_stat_set = set; 879 spin_unlock(&on_stat_lock); 880 } 881 882 /* 883 * ab8500 has turned on due to (TURN_ON_STATUS): 884 * 0x01 PORnVbat 885 * 0x02 PonKey1dbF 886 * 0x04 PonKey2dbF 887 * 0x08 RTCAlarm 888 * 0x10 MainChDet 889 * 0x20 VbusDet 890 * 0x40 UsbIDDetect 891 * 0x80 Reserved 892 */ 893 static ssize_t show_turn_on_status(struct device *dev, 894 struct device_attribute *attr, char *buf) 895 { 896 int ret; 897 u8 value; 898 struct ab8500 *ab8500; 899 900 ab8500 = dev_get_drvdata(dev); 901 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 902 AB8500_TURN_ON_STATUS, &value); 903 if (ret < 0) 904 return ret; 905 906 /* 907 * In L9540, turn_on_status register is not updated correctly if 908 * the device is rebooted with AC/USB charger connected. Due to 909 * this, the device boots android instead of entering into charge 910 * only mode. Read the AC/USB status register to detect the charger 911 * presence and update the turn on status manually. 912 */ 913 if (is_ab9540(ab8500)) { 914 spin_lock(&on_stat_lock); 915 value = (value & turn_on_stat_mask) | turn_on_stat_set; 916 spin_unlock(&on_stat_lock); 917 } 918 919 return sprintf(buf, "%#x\n", value); 920 } 921 922 static ssize_t show_turn_on_status_2(struct device *dev, 923 struct device_attribute *attr, char *buf) 924 { 925 int ret; 926 u8 value; 927 struct ab8500 *ab8500; 928 929 ab8500 = dev_get_drvdata(dev); 930 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 931 AB8505_TURN_ON_STATUS_2, &value); 932 if (ret < 0) 933 return ret; 934 return sprintf(buf, "%#x\n", (value & 0x1)); 935 } 936 937 static ssize_t show_ab9540_dbbrstn(struct device *dev, 938 struct device_attribute *attr, char *buf) 939 { 940 struct ab8500 *ab8500; 941 int ret; 942 u8 value; 943 944 ab8500 = dev_get_drvdata(dev); 945 946 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 947 AB9540_MODEM_CTRL2_REG, &value); 948 if (ret < 0) 949 return ret; 950 951 return sprintf(buf, "%d\n", 952 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 953 } 954 955 static ssize_t store_ab9540_dbbrstn(struct device *dev, 956 struct device_attribute *attr, const char *buf, size_t count) 957 { 958 struct ab8500 *ab8500; 959 int ret = count; 960 int err; 961 u8 bitvalues; 962 963 ab8500 = dev_get_drvdata(dev); 964 965 if (count > 0) { 966 switch (buf[0]) { 967 case '0': 968 bitvalues = 0; 969 break; 970 case '1': 971 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 972 break; 973 default: 974 goto exit; 975 } 976 977 err = mask_and_set_register_interruptible(ab8500, 978 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 979 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 980 if (err) 981 dev_info(ab8500->dev, 982 "Failed to set DBBRSTN %c, err %#x\n", 983 buf[0], err); 984 } 985 986 exit: 987 return ret; 988 } 989 990 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 991 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 992 static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 993 static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL); 994 static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 995 show_ab9540_dbbrstn, store_ab9540_dbbrstn); 996 997 static struct attribute *ab8500_sysfs_entries[] = { 998 &dev_attr_chip_id.attr, 999 &dev_attr_switch_off_status.attr, 1000 &dev_attr_turn_on_status.attr, 1001 NULL, 1002 }; 1003 1004 static struct attribute *ab8505_sysfs_entries[] = { 1005 &dev_attr_turn_on_status_2.attr, 1006 NULL, 1007 }; 1008 1009 static struct attribute *ab9540_sysfs_entries[] = { 1010 &dev_attr_chip_id.attr, 1011 &dev_attr_switch_off_status.attr, 1012 &dev_attr_turn_on_status.attr, 1013 &dev_attr_dbbrstn.attr, 1014 NULL, 1015 }; 1016 1017 static const struct attribute_group ab8500_attr_group = { 1018 .attrs = ab8500_sysfs_entries, 1019 }; 1020 1021 static const struct attribute_group ab8505_attr_group = { 1022 .attrs = ab8505_sysfs_entries, 1023 }; 1024 1025 static const struct attribute_group ab9540_attr_group = { 1026 .attrs = ab9540_sysfs_entries, 1027 }; 1028 1029 static int ab8500_probe(struct platform_device *pdev) 1030 { 1031 static const char * const switch_off_status[] = { 1032 "Swoff bit programming", 1033 "Thermal protection activation", 1034 "Vbat lower then BattOk falling threshold", 1035 "Watchdog expired", 1036 "Non presence of 32kHz clock", 1037 "Battery level lower than power on reset threshold", 1038 "Power on key 1 pressed longer than 10 seconds", 1039 "DB8500 thermal shutdown"}; 1040 static const char * const turn_on_status[] = { 1041 "Battery rising (Vbat)", 1042 "Power On Key 1 dbF", 1043 "Power On Key 2 dbF", 1044 "RTC Alarm", 1045 "Main Charger Detect", 1046 "Vbus Detect (USB)", 1047 "USB ID Detect", 1048 "UART Factory Mode Detect"}; 1049 const struct platform_device_id *platid = platform_get_device_id(pdev); 1050 enum ab8500_version version = AB8500_VERSION_UNDEFINED; 1051 struct device_node *np = pdev->dev.of_node; 1052 struct ab8500 *ab8500; 1053 struct resource *resource; 1054 int ret; 1055 int i; 1056 u8 value; 1057 1058 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL); 1059 if (!ab8500) 1060 return -ENOMEM; 1061 1062 ab8500->dev = &pdev->dev; 1063 1064 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1065 if (!resource) { 1066 dev_err(&pdev->dev, "no IRQ resource\n"); 1067 return -ENODEV; 1068 } 1069 1070 ab8500->irq = resource->start; 1071 1072 ab8500->read = ab8500_prcmu_read; 1073 ab8500->write = ab8500_prcmu_write; 1074 ab8500->write_masked = ab8500_prcmu_write_masked; 1075 1076 mutex_init(&ab8500->lock); 1077 mutex_init(&ab8500->irq_lock); 1078 atomic_set(&ab8500->transfer_ongoing, 0); 1079 1080 platform_set_drvdata(pdev, ab8500); 1081 1082 if (platid) 1083 version = platid->driver_data; 1084 1085 if (version != AB8500_VERSION_UNDEFINED) 1086 ab8500->version = version; 1087 else { 1088 ret = get_register_interruptible(ab8500, AB8500_MISC, 1089 AB8500_IC_NAME_REG, &value); 1090 if (ret < 0) { 1091 dev_err(&pdev->dev, "could not probe HW\n"); 1092 return ret; 1093 } 1094 1095 ab8500->version = value; 1096 } 1097 1098 ret = get_register_interruptible(ab8500, AB8500_MISC, 1099 AB8500_REV_REG, &value); 1100 if (ret < 0) 1101 return ret; 1102 1103 ab8500->chip_id = value; 1104 1105 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 1106 ab8500_version_str[ab8500->version], 1107 ab8500->chip_id >> 4, 1108 ab8500->chip_id & 0x0F); 1109 1110 /* Configure AB8540 */ 1111 if (is_ab8540(ab8500)) { 1112 ab8500->mask_size = AB8540_NUM_IRQ_REGS; 1113 ab8500->irq_reg_offset = ab8540_irq_regoffset; 1114 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM; 1115 } /* Configure AB8500 or AB9540 IRQ */ 1116 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1117 ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1118 ab8500->irq_reg_offset = ab9540_irq_regoffset; 1119 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1120 } else { 1121 ab8500->mask_size = AB8500_NUM_IRQ_REGS; 1122 ab8500->irq_reg_offset = ab8500_irq_regoffset; 1123 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM; 1124 } 1125 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1126 GFP_KERNEL); 1127 if (!ab8500->mask) 1128 return -ENOMEM; 1129 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, 1130 GFP_KERNEL); 1131 if (!ab8500->oldmask) 1132 return -ENOMEM; 1133 1134 /* 1135 * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1136 * 0x01 Swoff bit programming 1137 * 0x02 Thermal protection activation 1138 * 0x04 Vbat lower then BattOk falling threshold 1139 * 0x08 Watchdog expired 1140 * 0x10 Non presence of 32kHz clock 1141 * 0x20 Battery level lower than power on reset threshold 1142 * 0x40 Power on key 1 pressed longer than 10 seconds 1143 * 0x80 DB8500 thermal shutdown 1144 */ 1145 1146 ret = get_register_interruptible(ab8500, AB8500_RTC, 1147 AB8500_SWITCH_OFF_STATUS, &value); 1148 if (ret < 0) 1149 return ret; 1150 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); 1151 1152 if (value) { 1153 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { 1154 if (value & 1) 1155 pr_cont(" \"%s\"", switch_off_status[i]); 1156 value = value >> 1; 1157 1158 } 1159 pr_cont("\n"); 1160 } else { 1161 pr_cont(" None\n"); 1162 } 1163 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1164 AB8500_TURN_ON_STATUS, &value); 1165 if (ret < 0) 1166 return ret; 1167 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value); 1168 1169 if (value) { 1170 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) { 1171 if (value & 1) 1172 pr_cont("\"%s\" ", turn_on_status[i]); 1173 value = value >> 1; 1174 } 1175 pr_cont("\n"); 1176 } else { 1177 pr_cont("None\n"); 1178 } 1179 1180 if (is_ab9540(ab8500)) { 1181 ret = get_register_interruptible(ab8500, AB8500_CHARGER, 1182 AB8500_CH_USBCH_STAT1_REG, &value); 1183 if (ret < 0) 1184 return ret; 1185 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100)) 1186 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON, 1187 AB8500_VBUS_DET); 1188 } 1189 1190 /* Clear and mask all interrupts */ 1191 for (i = 0; i < ab8500->mask_size; i++) { 1192 /* 1193 * Interrupt register 12 doesn't exist prior to AB8500 version 1194 * 2.0 1195 */ 1196 if (ab8500->irq_reg_offset[i] == 11 && 1197 is_ab8500_1p1_or_earlier(ab8500)) 1198 continue; 1199 1200 if (ab8500->irq_reg_offset[i] < 0) 1201 continue; 1202 1203 get_register_interruptible(ab8500, AB8500_INTERRUPT, 1204 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 1205 &value); 1206 set_register_interruptible(ab8500, AB8500_INTERRUPT, 1207 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 1208 } 1209 1210 ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 1211 if (ret) 1212 return ret; 1213 1214 for (i = 0; i < ab8500->mask_size; i++) 1215 ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 1216 1217 ret = ab8500_irq_init(ab8500, np); 1218 if (ret) 1219 return ret; 1220 1221 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL, 1222 ab8500_hierarchical_irq, 1223 IRQF_ONESHOT | IRQF_NO_SUSPEND, 1224 "ab8500", ab8500); 1225 if (ret) 1226 return ret; 1227 1228 if (is_ab9540(ab8500)) 1229 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1230 ARRAY_SIZE(ab9540_devs), NULL, 1231 0, ab8500->domain); 1232 else if (is_ab8540(ab8500)) { 1233 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs, 1234 ARRAY_SIZE(ab8540_devs), NULL, 1235 0, ab8500->domain); 1236 if (ret) 1237 return ret; 1238 1239 if (is_ab8540_1p2_or_earlier(ab8500)) 1240 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs, 1241 ARRAY_SIZE(ab8540_cut1_devs), NULL, 1242 0, ab8500->domain); 1243 else /* ab8540 >= cut2 */ 1244 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs, 1245 ARRAY_SIZE(ab8540_cut2_devs), NULL, 1246 0, ab8500->domain); 1247 } else if (is_ab8505(ab8500)) 1248 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs, 1249 ARRAY_SIZE(ab8505_devs), NULL, 1250 0, ab8500->domain); 1251 else 1252 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1253 ARRAY_SIZE(ab8500_devs), NULL, 1254 0, ab8500->domain); 1255 if (ret) 1256 return ret; 1257 1258 if (!no_bm) { 1259 /* Add battery management devices */ 1260 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1261 ARRAY_SIZE(ab8500_bm_devs), NULL, 1262 0, ab8500->domain); 1263 if (ret) 1264 dev_err(ab8500->dev, "error adding bm devices\n"); 1265 } 1266 1267 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1268 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500)) 1269 ret = sysfs_create_group(&ab8500->dev->kobj, 1270 &ab9540_attr_group); 1271 else 1272 ret = sysfs_create_group(&ab8500->dev->kobj, 1273 &ab8500_attr_group); 1274 1275 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) && 1276 ab8500->chip_id >= AB8500_CUT2P0) 1277 ret = sysfs_create_group(&ab8500->dev->kobj, 1278 &ab8505_attr_group); 1279 1280 if (ret) 1281 dev_err(ab8500->dev, "error creating sysfs entries\n"); 1282 1283 return ret; 1284 } 1285 1286 static const struct platform_device_id ab8500_id[] = { 1287 { "ab8500-core", AB8500_VERSION_AB8500 }, 1288 { "ab8505-core", AB8500_VERSION_AB8505 }, 1289 { "ab9540-i2c", AB8500_VERSION_AB9540 }, 1290 { "ab8540-i2c", AB8500_VERSION_AB8540 }, 1291 { } 1292 }; 1293 1294 static struct platform_driver ab8500_core_driver = { 1295 .driver = { 1296 .name = "ab8500-core", 1297 .suppress_bind_attrs = true, 1298 }, 1299 .probe = ab8500_probe, 1300 .id_table = ab8500_id, 1301 }; 1302 1303 static int __init ab8500_core_init(void) 1304 { 1305 return platform_driver_register(&ab8500_core_driver); 1306 } 1307 core_initcall(ab8500_core_init); 1308