1 /* 2 * Copyright (c) 2000-2004 LSI Logic Corporation. 3 * 4 * 5 * Name: mpi_targ.h 6 * Title: MPI Target mode messages and structures 7 * Creation Date: June 22, 2000 8 * 9 * mpi_targ.h Version: 01.05.04 10 * 11 * Version History 12 * --------------- 13 * 14 * Date Version Description 15 * -------- -------- ------------------------------------------------------ 16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 17 * 06-06-00 01.00.01 Update version number for 1.0 release. 18 * 06-22-00 01.00.02 Added _MSG_TARGET_CMD_BUFFER_POST_REPLY structure. 19 * Corrected DECSRIPTOR typo to DESCRIPTOR. 20 * 11-02-00 01.01.01 Original release for post 1.0 work 21 * Modified target mode to use IoIndex instead of 22 * HostIndex and IocIndex. Added Alias. 23 * 01-09-01 01.01.02 Added defines for TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER 24 * and TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER. 25 * 02-20-01 01.01.03 Started using MPI_POINTER. 26 * Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and 27 * MPI_TARGET_FCP_CMD_BUFFER. 28 * 03-27-01 01.01.04 Added structure offset comments. 29 * 08-08-01 01.02.01 Original release for v1.2 work. 30 * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU. 31 * Added PriorityReason field to some replies and 32 * defined more PriorityReason codes. 33 * Added some defines for to support previous version 34 * of MPI. 35 * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY. 36 * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY. 37 * 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper 38 * byte ordering. 39 * 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include 40 * one bit. 41 * Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER. 42 * 09-16-02 01.02.07 Added flags for confirmed completion. 43 * Added PRIORITY_REASON_TARGET_BUSY. 44 * 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER. 45 * 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER. 46 * 05-11-04 01.03.01 Original release for MPI v1.3. 47 * 08-19-04 01.05.01 Added new request message structures for 48 * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST, 49 * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and 50 * MSG_TARGET_ASSIST_EXT_REQUEST. 51 * Added new structures for SAS SSP Command buffer, SSP 52 * Task buffer, and SSP Status IU. 53 * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added. 54 * 02-22-05 01.05.03 Changed a comment. 55 * 03-11-05 01.05.04 Removed TargetAssistExtended Request. 56 * -------------------------------------------------------------------------- 57 */ 58 59 #ifndef MPI_TARG_H 60 #define MPI_TARG_H 61 62 63 /****************************************************************************** 64 * 65 * S C S I T a r g e t M e s s a g e s 66 * 67 *******************************************************************************/ 68 69 typedef struct _CMD_BUFFER_DESCRIPTOR 70 { 71 U16 IoIndex; /* 00h */ 72 U16 Reserved; /* 02h */ 73 union /* 04h */ 74 { 75 U32 PhysicalAddress32; 76 U64 PhysicalAddress64; 77 } u; 78 } CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR, 79 CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t; 80 81 82 /****************************************************************************/ 83 /* Target Command Buffer Post Request */ 84 /****************************************************************************/ 85 86 typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST 87 { 88 U8 BufferPostFlags; /* 00h */ 89 U8 BufferCount; /* 01h */ 90 U8 ChainOffset; /* 02h */ 91 U8 Function; /* 03h */ 92 U8 BufferLength; /* 04h */ 93 U8 Reserved; /* 05h */ 94 U8 Reserved1; /* 06h */ 95 U8 MsgFlags; /* 07h */ 96 U32 MsgContext; /* 08h */ 97 CMD_BUFFER_DESCRIPTOR Buffer[1]; /* 0Ch */ 98 } MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST, 99 TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t; 100 101 #define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01) 102 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80) 103 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0) 104 #define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1) 105 #define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80) 106 107 #define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF) 108 #define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF) /* obsolete */ 109 110 111 typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY 112 { 113 U8 BufferPostFlags; /* 00h */ 114 U8 BufferCount; /* 01h */ 115 U8 MsgLength; /* 02h */ 116 U8 Function; /* 03h */ 117 U8 BufferLength; /* 04h */ 118 U8 Reserved; /* 05h */ 119 U8 Reserved1; /* 06h */ 120 U8 MsgFlags; /* 07h */ 121 U32 MsgContext; /* 08h */ 122 U16 Reserved2; /* 0Ch */ 123 U16 IOCStatus; /* 0Eh */ 124 U32 IOCLogInfo; /* 10h */ 125 } MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY, 126 TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t; 127 128 /* the following structure is obsolete as of MPI v1.2 */ 129 typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY 130 { 131 U16 Reserved; /* 00h */ 132 U8 MsgLength; /* 02h */ 133 U8 Function; /* 03h */ 134 U16 Reserved1; /* 04h */ 135 U8 Reserved2; /* 06h */ 136 U8 MsgFlags; /* 07h */ 137 U32 MsgContext; /* 08h */ 138 U8 PriorityReason; /* 0Ch */ 139 U8 Reserved3; /* 0Dh */ 140 U16 IOCStatus; /* 0Eh */ 141 U32 IOCLogInfo; /* 10h */ 142 U32 ReplyWord; /* 14h */ 143 } MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY, 144 PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t; 145 146 147 typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY 148 { 149 U16 Reserved; /* 00h */ 150 U8 MsgLength; /* 02h */ 151 U8 Function; /* 03h */ 152 U16 Reserved1; /* 04h */ 153 U8 Reserved2; /* 06h */ 154 U8 MsgFlags; /* 07h */ 155 U32 MsgContext; /* 08h */ 156 U8 PriorityReason; /* 0Ch */ 157 U8 Reserved3; /* 0Dh */ 158 U16 IOCStatus; /* 0Eh */ 159 U32 IOCLogInfo; /* 10h */ 160 U32 ReplyWord; /* 14h */ 161 } MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY, 162 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY, 163 TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t; 164 165 #define PRIORITY_REASON_NO_DISCONNECT (0x00) 166 #define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01) 167 #define PRIORITY_REASON_CMD_PARITY_ERR (0x02) 168 #define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03) 169 #define PRIORITY_REASON_LQ_CRC_ERR (0x04) 170 #define PRIORITY_REASON_CMD_CRC_ERR (0x05) 171 #define PRIORITY_REASON_PROTOCOL_ERR (0x06) 172 #define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07) 173 #define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08) 174 #define PRIORITY_REASON_TARGET_BUSY (0x09) 175 #define PRIORITY_REASON_UNKNOWN (0xFF) 176 177 178 /****************************************************************************/ 179 /* Target Command Buffer Post Base Request */ 180 /****************************************************************************/ 181 182 typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST 183 { 184 U8 BufferPostFlags; /* 00h */ 185 U8 PortNumber; /* 01h */ 186 U8 ChainOffset; /* 02h */ 187 U8 Function; /* 03h */ 188 U16 TotalCmdBuffers; /* 04h */ 189 U8 Reserved; /* 06h */ 190 U8 MsgFlags; /* 07h */ 191 U32 MsgContext; /* 08h */ 192 U32 Reserved1; /* 0Ch */ 193 U16 CmdBufferLength; /* 10h */ 194 U16 NextCmdBufferOffset; /* 12h */ 195 U32 BaseAddressLow; /* 14h */ 196 U32 BaseAddressHigh; /* 18h */ 197 } MSG_TARGET_CMD_BUF_POST_BASE_REQUEST, 198 MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST, 199 TargetCmdBufferPostBaseRequest_t, 200 MPI_POINTER pTargetCmdBufferPostBaseRequest_t; 201 202 #define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01) 203 204 205 typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY 206 { 207 U16 Reserved; /* 00h */ 208 U8 MsgLength; /* 02h */ 209 U8 Function; /* 03h */ 210 U16 Reserved1; /* 04h */ 211 U8 Reserved2; /* 06h */ 212 U8 MsgFlags; /* 07h */ 213 U32 MsgContext; /* 08h */ 214 U16 Reserved3; /* 0Ch */ 215 U16 IOCStatus; /* 0Eh */ 216 U32 IOCLogInfo; /* 10h */ 217 } MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY, 218 MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY, 219 TargetCmdBufferPostBaseListReply_t, 220 MPI_POINTER pTargetCmdBufferPostBaseListReply_t; 221 222 223 /****************************************************************************/ 224 /* Target Command Buffer Post List Request */ 225 /****************************************************************************/ 226 227 typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST 228 { 229 U8 Reserved; /* 00h */ 230 U8 PortNumber; /* 01h */ 231 U8 ChainOffset; /* 02h */ 232 U8 Function; /* 03h */ 233 U16 CmdBufferCount; /* 04h */ 234 U8 Reserved1; /* 06h */ 235 U8 MsgFlags; /* 07h */ 236 U32 MsgContext; /* 08h */ 237 U32 Reserved2; /* 0Ch */ 238 U16 IoIndex[2]; /* 10h */ 239 } MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, 240 MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, 241 TargetCmdBufferPostListRequest_t, 242 MPI_POINTER pTargetCmdBufferPostListRequest_t; 243 244 245 /****************************************************************************/ 246 /* Command Buffer Formats (with 16 byte CDB) */ 247 /****************************************************************************/ 248 249 typedef struct _MPI_TARGET_FCP_CMD_BUFFER 250 { 251 U8 FcpLun[8]; /* 00h */ 252 U8 FcpCntl[4]; /* 08h */ 253 U8 FcpCdb[16]; /* 0Ch */ 254 U32 FcpDl; /* 1Ch */ 255 U8 AliasIndex; /* 20h */ 256 U8 Reserved1; /* 21h */ 257 U16 OptionalOxid; /* 22h */ 258 } MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER, 259 MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer; 260 261 262 typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER 263 { 264 /* SPI L_Q information unit */ 265 U8 L_QType; /* 00h */ 266 U8 Reserved; /* 01h */ 267 U16 Tag; /* 02h */ 268 U8 LogicalUnitNumber[8]; /* 04h */ 269 U32 DataLength; /* 0Ch */ 270 /* SPI command information unit */ 271 U8 ReservedFirstByteOfCommandIU; /* 10h */ 272 U8 TaskAttribute; /* 11h */ 273 U8 TaskManagementFlags; /* 12h */ 274 U8 AdditionalCDBLength; /* 13h */ 275 U8 CDB[16]; /* 14h */ 276 /* Alias ID */ 277 U8 AliasID; /* 24h */ 278 U8 Reserved1; /* 25h */ 279 U16 Reserved2; /* 26h */ 280 } MPI_TARGET_SCSI_SPI_CMD_BUFFER, 281 MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER, 282 MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer; 283 284 285 typedef struct _MPI_TARGET_SSP_CMD_BUFFER 286 { 287 U8 FrameType; /* 00h */ 288 U8 Reserved1; /* 01h */ 289 U16 Reserved2; /* 02h */ 290 U16 InitiatorTag; /* 04h */ 291 U16 DevHandle; /* 06h */ 292 /* COMMAND information unit starts here */ 293 U8 LogicalUnitNumber[8]; /* 08h */ 294 U8 Reserved3; /* 10h */ 295 U8 TaskAttribute; /* lower 3 bits */ /* 11h */ 296 U8 Reserved4; /* 12h */ 297 U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */ 298 U8 CDB[16]; /* 14h */ 299 /* Additional CDB bytes extend past the CDB field */ 300 } MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER, 301 MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer; 302 303 typedef struct _MPI_TARGET_SSP_TASK_BUFFER 304 { 305 U8 FrameType; /* 00h */ 306 U8 Reserved1; /* 01h */ 307 U16 Reserved2; /* 02h */ 308 U16 InitiatorTag; /* 04h */ 309 U16 DevHandle; /* 06h */ 310 /* TASK information unit starts here */ 311 U8 LogicalUnitNumber[8]; /* 08h */ 312 U8 Reserved3; /* 10h */ 313 U8 Reserved4; /* 11h */ 314 U8 TaskManagementFunction; /* 12h */ 315 U8 Reserved5; /* 13h */ 316 U16 ManagedTaskTag; /* 14h */ 317 U16 Reserved6; /* 16h */ 318 U32 Reserved7; /* 18h */ 319 U32 Reserved8; /* 1Ch */ 320 U32 Reserved9; /* 20h */ 321 } MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER, 322 MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer; 323 324 325 /****************************************************************************/ 326 /* Target Assist Request */ 327 /****************************************************************************/ 328 329 typedef struct _MSG_TARGET_ASSIST_REQUEST 330 { 331 U8 StatusCode; /* 00h */ 332 U8 TargetAssistFlags; /* 01h */ 333 U8 ChainOffset; /* 02h */ 334 U8 Function; /* 03h */ 335 U16 QueueTag; /* 04h */ 336 U8 Reserved; /* 06h */ 337 U8 MsgFlags; /* 07h */ 338 U32 MsgContext; /* 08h */ 339 U32 ReplyWord; /* 0Ch */ 340 U8 LUN[8]; /* 10h */ 341 U32 RelativeOffset; /* 18h */ 342 U32 DataLength; /* 1Ch */ 343 SGE_IO_UNION SGL[1]; /* 20h */ 344 } MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST, 345 TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t; 346 347 #define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01) 348 #define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02) 349 #define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04) 350 #define TARGET_ASSIST_FLAGS_CONFIRMED (0x08) 351 #define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80) 352 353 354 typedef struct _MSG_TARGET_ERROR_REPLY 355 { 356 U16 Reserved; /* 00h */ 357 U8 MsgLength; /* 02h */ 358 U8 Function; /* 03h */ 359 U16 Reserved1; /* 04h */ 360 U8 Reserved2; /* 06h */ 361 U8 MsgFlags; /* 07h */ 362 U32 MsgContext; /* 08h */ 363 U8 PriorityReason; /* 0Ch */ 364 U8 Reserved3; /* 0Dh */ 365 U16 IOCStatus; /* 0Eh */ 366 U32 IOCLogInfo; /* 10h */ 367 U32 ReplyWord; /* 14h */ 368 U32 TransferCount; /* 18h */ 369 } MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY, 370 TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t; 371 372 373 /****************************************************************************/ 374 /* Target Status Send Request */ 375 /****************************************************************************/ 376 377 typedef struct _MSG_TARGET_STATUS_SEND_REQUEST 378 { 379 U8 StatusCode; /* 00h */ 380 U8 StatusFlags; /* 01h */ 381 U8 ChainOffset; /* 02h */ 382 U8 Function; /* 03h */ 383 U16 QueueTag; /* 04h */ 384 U8 Reserved; /* 06h */ 385 U8 MsgFlags; /* 07h */ 386 U32 MsgContext; /* 08h */ 387 U32 ReplyWord; /* 0Ch */ 388 U8 LUN[8]; /* 10h */ 389 SGE_SIMPLE_UNION StatusDataSGE; /* 18h */ 390 } MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST, 391 TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t; 392 393 #define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01) 394 #define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04) 395 #define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08) 396 #define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80) 397 398 /* 399 * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this 400 * structure properly orders the bytes. 401 */ 402 typedef struct _MPI_TARGET_FCP_RSP_BUFFER 403 { 404 U8 Reserved0[8]; /* 00h */ 405 U8 Reserved1[2]; /* 08h */ 406 U8 FcpFlags; /* 0Ah */ 407 U8 FcpStatus; /* 0Bh */ 408 U32 FcpResid; /* 0Ch */ 409 U32 FcpSenseLength; /* 10h */ 410 U32 FcpResponseLength; /* 14h */ 411 U8 FcpResponseData[8]; /* 18h */ 412 U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */ 413 } MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER, 414 MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer; 415 416 /* 417 * NOTE: The SPI status IU is big-endian. When used on a little-endian system, 418 * this structure properly orders the bytes. 419 */ 420 typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU 421 { 422 U8 Reserved0; /* 00h */ 423 U8 Reserved1; /* 01h */ 424 U8 Valid; /* 02h */ 425 U8 Status; /* 03h */ 426 U32 SenseDataListLength; /* 04h */ 427 U32 PktFailuresListLength; /* 08h */ 428 U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */ 429 } MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU, 430 TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t; 431 432 /* 433 * NOTE: The SSP status IU is big-endian. When used on a little-endian system, 434 * this structure properly orders the bytes. 435 */ 436 typedef struct _MPI_TARGET_SSP_RSP_IU 437 { 438 U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */ 439 /* start of RESPONSE information unit */ 440 U32 Reserved1; /* 18h */ 441 U32 Reserved2; /* 1Ch */ 442 U16 Reserved3; /* 20h */ 443 U8 DataPres; /* lower 2 bits */ /* 22h */ 444 U8 Status; /* 23h */ 445 U32 Reserved4; /* 24h */ 446 U32 SenseDataLength; /* 28h */ 447 U32 ResponseDataLength; /* 2Ch */ 448 U8 ResponseSenseData[4]; /* 30h */ 449 } MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU, 450 MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t; 451 452 453 /****************************************************************************/ 454 /* Target Mode Abort Request */ 455 /****************************************************************************/ 456 457 typedef struct _MSG_TARGET_MODE_ABORT_REQUEST 458 { 459 U8 AbortType; /* 00h */ 460 U8 Reserved; /* 01h */ 461 U8 ChainOffset; /* 02h */ 462 U8 Function; /* 03h */ 463 U16 Reserved1; /* 04h */ 464 U8 Reserved2; /* 06h */ 465 U8 MsgFlags; /* 07h */ 466 U32 MsgContext; /* 08h */ 467 U32 ReplyWord; /* 0Ch */ 468 U32 MsgContextToAbort; /* 10h */ 469 } MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT, 470 TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t; 471 472 #define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00) 473 #define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01) 474 #define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02) 475 #define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03) 476 477 /* Target Mode Abort Reply */ 478 479 typedef struct _MSG_TARGET_MODE_ABORT_REPLY 480 { 481 U16 Reserved; /* 00h */ 482 U8 MsgLength; /* 02h */ 483 U8 Function; /* 03h */ 484 U16 Reserved1; /* 04h */ 485 U8 Reserved2; /* 06h */ 486 U8 MsgFlags; /* 07h */ 487 U32 MsgContext; /* 08h */ 488 U16 Reserved3; /* 0Ch */ 489 U16 IOCStatus; /* 0Eh */ 490 U32 IOCLogInfo; /* 10h */ 491 U32 AbortCount; /* 14h */ 492 } MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY, 493 TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t; 494 495 496 /****************************************************************************/ 497 /* Target Mode Context Reply */ 498 /****************************************************************************/ 499 500 #define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF) 501 #define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0) 502 #define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000) 503 #define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14) 504 #define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000) 505 #define TARGET_MODE_REPLY_ALIAS_SHIFT (26) 506 #define TARGET_MODE_REPLY_PORT_MASK (0x10000000) 507 #define TARGET_MODE_REPLY_PORT_SHIFT (28) 508 509 510 #define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \ 511 >> TARGET_MODE_REPLY_IO_INDEX_SHIFT) 512 513 #define SET_IO_INDEX(t, i) \ 514 ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \ 515 (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \ 516 TARGET_MODE_REPLY_IO_INDEX_MASK)) 517 518 #define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \ 519 >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) 520 521 #define SET_INITIATOR_INDEX(t, ii) \ 522 ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \ 523 (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \ 524 TARGET_MODE_REPLY_INITIATOR_INDEX_MASK)) 525 526 #define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \ 527 >> TARGET_MODE_REPLY_ALIAS_SHIFT) 528 529 #define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \ 530 (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \ 531 TARGET_MODE_REPLY_ALIAS_MASK)) 532 533 #define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \ 534 >> TARGET_MODE_REPLY_PORT_SHIFT) 535 536 #define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \ 537 (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \ 538 TARGET_MODE_REPLY_PORT_MASK)) 539 540 /* the following obsolete values are for MPI v1.0 support */ 541 #define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF) 542 #define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0) 543 #define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800) 544 #define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11) 545 #define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000) 546 #define TARGET_MODE_REPLY_0100_PORT_SHIFT (22) 547 #define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000) 548 #define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23) 549 550 #define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \ 551 >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) 552 553 #define SET_HOST_INDEX_0100(t, hi) \ 554 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \ 555 (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \ 556 TARGET_MODE_REPLY_0100_MASK_HOST_INDEX)) 557 558 #define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \ 559 >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) 560 561 #define SET_IOC_INDEX_0100(t, ii) \ 562 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \ 563 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \ 564 TARGET_MODE_REPLY_0100_MASK_IOC_INDEX)) 565 566 #define GET_INITIATOR_INDEX_0100(x) \ 567 (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \ 568 >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) 569 570 #define SET_INITIATOR_INDEX_0100(t, ii) \ 571 ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \ 572 (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \ 573 TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX)) 574 575 576 #endif 577 578