1 /* 2 * Copyright (c) 2000-2005 LSI Logic Corporation. 3 * 4 * 5 * Name: mpi_ioc.h 6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 7 * Creation Date: August 11, 2000 8 * 9 * mpi_ioc.h Version: 01.05.09 10 * 11 * Version History 12 * --------------- 13 * 14 * Date Version Description 15 * -------- -------- ------------------------------------------------------ 16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 17 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure. 18 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY. 19 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure. 20 * Added _MSG_EVENT_ACK_REPLY structure. 21 * Added _MSG_FW_DOWNLOAD_REPLY structure. 22 * Added _MSG_TOOLBOX_REPLY structure. 23 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure. 24 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI, 25 * _LINK_STATUS, _LOOP_STATE and _LOGOUT. 26 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in 27 * _MSG_EVENT_ACK_REPLY structure to match specification. 28 * 11-02-00 01.01.01 Original release for post 1.0 work. 29 * Added a value for Manufacturer to WhoInit. 30 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and 31 * removed toolbox message. 32 * 01-09-01 01.01.03 Added event enabled and disabled defines. 33 * Added structures for FwHeader and DataHeader. 34 * Added ImageType to FwUpload reply. 35 * 02-20-01 01.01.04 Started using MPI_POINTER. 36 * 02-27-01 01.01.05 Added event for RAID status change and its event data. 37 * Added IocNumber field to MSG_IOC_FACTS_REPLY. 38 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER. 39 * Added structure offset comments. 40 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE. 41 * 08-08-01 01.02.01 Original release for v1.2 work. 42 * New format for FWVersion and ProductId in 43 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER. 44 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and 45 * related structure and defines. 46 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED. 47 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE. 48 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with 49 * IOCExceptions and changed DataImageSize to reserved. 50 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and 51 * MPI_FW_UPLOAD_ITYPE_NVDATA. 52 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID. 53 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field. 54 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY. 55 * 05-31-02 01.02.06 Added define for 56 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID. 57 * Added AliasIndex to EVENT_DATA_LOGOUT structure. 58 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_. 59 * 06-26-03 01.02.08 Added new values to the product family defines. 60 * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and 61 * added related defines. 62 * 05-11-04 01.03.01 Original release for MPI v1.3. 63 * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT. 64 * Added three new fields to MSG_IOC_FACTS_REPLY. 65 * Defined four new bits for the IOCCapabilities field of 66 * the IOCFacts reply. 67 * Added two new PortTypes for the PortFacts reply. 68 * Added six new events along with their EventData 69 * structures. 70 * Added a new MsgFlag to the FwDownload request to 71 * indicate last segment. 72 * Defined a new image type of boot loader. 73 * Added FW family codes for SAS product families. 74 * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to 75 * MSG_IOC_FACTS_REPLY. 76 * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event. 77 * 12-09-04 01.05.04 Added Unsupported device to SAS Device event. 78 * 01-15-05 01.05.05 Added event data for SAS SES Event. 79 * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define. 80 * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts 81 * Reply and IOC Init Request. 82 * 03-11-05 01.05.08 Added family code for 1068E family. 83 * Removed IOCFacts Reply EEDP Capability bit. 84 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits. 85 * Added Max SATA Targets to SAS Discovery Error event. 86 * -------------------------------------------------------------------------- 87 */ 88 89 #ifndef MPI_IOC_H 90 #define MPI_IOC_H 91 92 93 /***************************************************************************** 94 * 95 * I O C M e s s a g e s 96 * 97 *****************************************************************************/ 98 99 /****************************************************************************/ 100 /* IOCInit message */ 101 /****************************************************************************/ 102 103 typedef struct _MSG_IOC_INIT 104 { 105 U8 WhoInit; /* 00h */ 106 U8 Reserved; /* 01h */ 107 U8 ChainOffset; /* 02h */ 108 U8 Function; /* 03h */ 109 U8 Flags; /* 04h */ 110 U8 MaxDevices; /* 05h */ 111 U8 MaxBuses; /* 06h */ 112 U8 MsgFlags; /* 07h */ 113 U32 MsgContext; /* 08h */ 114 U16 ReplyFrameSize; /* 0Ch */ 115 U8 Reserved1[2]; /* 0Eh */ 116 U32 HostMfaHighAddr; /* 10h */ 117 U32 SenseBufferHighAddr; /* 14h */ 118 U32 ReplyFifoHostSignalingAddr; /* 18h */ 119 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */ 120 U16 MsgVersion; /* 28h */ 121 U16 HeaderVersion; /* 2Ah */ 122 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT, 123 IOCInit_t, MPI_POINTER pIOCInit_t; 124 125 /* WhoInit values */ 126 #define MPI_WHOINIT_NO_ONE (0x00) 127 #define MPI_WHOINIT_SYSTEM_BIOS (0x01) 128 #define MPI_WHOINIT_ROM_BIOS (0x02) 129 #define MPI_WHOINIT_PCI_PEER (0x03) 130 #define MPI_WHOINIT_HOST_DRIVER (0x04) 131 #define MPI_WHOINIT_MANUFACTURER (0x05) 132 133 /* Flags values */ 134 #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 135 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 136 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01) 137 138 /* MsgVersion */ 139 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) 140 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) 141 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) 142 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0) 143 144 /* HeaderVersion */ 145 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00) 146 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8) 147 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF) 148 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0) 149 150 151 typedef struct _MSG_IOC_INIT_REPLY 152 { 153 U8 WhoInit; /* 00h */ 154 U8 Reserved; /* 01h */ 155 U8 MsgLength; /* 02h */ 156 U8 Function; /* 03h */ 157 U8 Flags; /* 04h */ 158 U8 MaxDevices; /* 05h */ 159 U8 MaxBuses; /* 06h */ 160 U8 MsgFlags; /* 07h */ 161 U32 MsgContext; /* 08h */ 162 U16 Reserved2; /* 0Ch */ 163 U16 IOCStatus; /* 0Eh */ 164 U32 IOCLogInfo; /* 10h */ 165 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY, 166 IOCInitReply_t, MPI_POINTER pIOCInitReply_t; 167 168 169 170 /****************************************************************************/ 171 /* IOC Facts message */ 172 /****************************************************************************/ 173 174 typedef struct _MSG_IOC_FACTS 175 { 176 U8 Reserved[2]; /* 00h */ 177 U8 ChainOffset; /* 01h */ 178 U8 Function; /* 02h */ 179 U8 Reserved1[3]; /* 03h */ 180 U8 MsgFlags; /* 04h */ 181 U32 MsgContext; /* 08h */ 182 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS, 183 IOCFacts_t, MPI_POINTER pIOCFacts_t; 184 185 typedef struct _MPI_FW_VERSION_STRUCT 186 { 187 U8 Dev; /* 00h */ 188 U8 Unit; /* 01h */ 189 U8 Minor; /* 02h */ 190 U8 Major; /* 03h */ 191 } MPI_FW_VERSION_STRUCT; 192 193 typedef union _MPI_FW_VERSION 194 { 195 MPI_FW_VERSION_STRUCT Struct; 196 U32 Word; 197 } MPI_FW_VERSION; 198 199 /* IOC Facts Reply */ 200 typedef struct _MSG_IOC_FACTS_REPLY 201 { 202 U16 MsgVersion; /* 00h */ 203 U8 MsgLength; /* 02h */ 204 U8 Function; /* 03h */ 205 U16 HeaderVersion; /* 04h */ 206 U8 IOCNumber; /* 06h */ 207 U8 MsgFlags; /* 07h */ 208 U32 MsgContext; /* 08h */ 209 U16 IOCExceptions; /* 0Ch */ 210 U16 IOCStatus; /* 0Eh */ 211 U32 IOCLogInfo; /* 10h */ 212 U8 MaxChainDepth; /* 14h */ 213 U8 WhoInit; /* 15h */ 214 U8 BlockSize; /* 16h */ 215 U8 Flags; /* 17h */ 216 U16 ReplyQueueDepth; /* 18h */ 217 U16 RequestFrameSize; /* 1Ah */ 218 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */ 219 U16 ProductID; /* 1Eh */ 220 U32 CurrentHostMfaHighAddr; /* 20h */ 221 U16 GlobalCredits; /* 24h */ 222 U8 NumberOfPorts; /* 26h */ 223 U8 EventState; /* 27h */ 224 U32 CurrentSenseBufferHighAddr; /* 28h */ 225 U16 CurReplyFrameSize; /* 2Ch */ 226 U8 MaxDevices; /* 2Eh */ 227 U8 MaxBuses; /* 2Fh */ 228 U32 FWImageSize; /* 30h */ 229 U32 IOCCapabilities; /* 34h */ 230 MPI_FW_VERSION FWVersion; /* 38h */ 231 U16 HighPriorityQueueDepth; /* 3Ch */ 232 U16 Reserved2; /* 3Eh */ 233 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */ 234 U32 ReplyFifoHostSignalingAddr; /* 4Ch */ 235 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY, 236 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t; 237 238 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 239 #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) 240 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 241 #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) 242 243 #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) 244 #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) 245 #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) 246 #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0) 247 248 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 249 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) 250 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) 251 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008) 252 253 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01) 254 #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 255 #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 256 257 #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00) 258 #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01) 259 260 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001) 261 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002) 262 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004) 263 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) 264 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) 265 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) 266 #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040) 267 #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080) 268 #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) 269 #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200) 270 #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400) 271 272 273 /***************************************************************************** 274 * 275 * P o r t M e s s a g e s 276 * 277 *****************************************************************************/ 278 279 /****************************************************************************/ 280 /* Port Facts message and Reply */ 281 /****************************************************************************/ 282 283 typedef struct _MSG_PORT_FACTS 284 { 285 U8 Reserved[2]; /* 00h */ 286 U8 ChainOffset; /* 02h */ 287 U8 Function; /* 03h */ 288 U8 Reserved1[2]; /* 04h */ 289 U8 PortNumber; /* 06h */ 290 U8 MsgFlags; /* 07h */ 291 U32 MsgContext; /* 08h */ 292 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS, 293 PortFacts_t, MPI_POINTER pPortFacts_t; 294 295 typedef struct _MSG_PORT_FACTS_REPLY 296 { 297 U16 Reserved; /* 00h */ 298 U8 MsgLength; /* 02h */ 299 U8 Function; /* 03h */ 300 U16 Reserved1; /* 04h */ 301 U8 PortNumber; /* 06h */ 302 U8 MsgFlags; /* 07h */ 303 U32 MsgContext; /* 08h */ 304 U16 Reserved2; /* 0Ch */ 305 U16 IOCStatus; /* 0Eh */ 306 U32 IOCLogInfo; /* 10h */ 307 U8 Reserved3; /* 14h */ 308 U8 PortType; /* 15h */ 309 U16 MaxDevices; /* 16h */ 310 U16 PortSCSIID; /* 18h */ 311 U16 ProtocolFlags; /* 1Ah */ 312 U16 MaxPostedCmdBuffers; /* 1Ch */ 313 U16 MaxPersistentIDs; /* 1Eh */ 314 U16 MaxLanBuckets; /* 20h */ 315 U16 Reserved4; /* 22h */ 316 U32 Reserved5; /* 24h */ 317 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY, 318 PortFactsReply_t, MPI_POINTER pPortFactsReply_t; 319 320 321 /* PortTypes values */ 322 323 #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00) 324 #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01) 325 #define MPI_PORTFACTS_PORTTYPE_FC (0x10) 326 #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20) 327 #define MPI_PORTFACTS_PORTTYPE_SAS (0x30) 328 329 /* ProtocolFlags values */ 330 331 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01) 332 #define MPI_PORTFACTS_PROTOCOL_LAN (0x02) 333 #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04) 334 #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08) 335 336 337 /****************************************************************************/ 338 /* Port Enable Message */ 339 /****************************************************************************/ 340 341 typedef struct _MSG_PORT_ENABLE 342 { 343 U8 Reserved[2]; /* 00h */ 344 U8 ChainOffset; /* 02h */ 345 U8 Function; /* 03h */ 346 U8 Reserved1[2]; /* 04h */ 347 U8 PortNumber; /* 06h */ 348 U8 MsgFlags; /* 07h */ 349 U32 MsgContext; /* 08h */ 350 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE, 351 PortEnable_t, MPI_POINTER pPortEnable_t; 352 353 typedef struct _MSG_PORT_ENABLE_REPLY 354 { 355 U8 Reserved[2]; /* 00h */ 356 U8 MsgLength; /* 02h */ 357 U8 Function; /* 03h */ 358 U8 Reserved1[2]; /* 04h */ 359 U8 PortNumber; /* 05h */ 360 U8 MsgFlags; /* 07h */ 361 U32 MsgContext; /* 08h */ 362 U16 Reserved2; /* 0Ch */ 363 U16 IOCStatus; /* 0Eh */ 364 U32 IOCLogInfo; /* 10h */ 365 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY, 366 PortEnableReply_t, MPI_POINTER pPortEnableReply_t; 367 368 369 /***************************************************************************** 370 * 371 * E v e n t M e s s a g e s 372 * 373 *****************************************************************************/ 374 375 /****************************************************************************/ 376 /* Event Notification messages */ 377 /****************************************************************************/ 378 379 typedef struct _MSG_EVENT_NOTIFY 380 { 381 U8 Switch; /* 00h */ 382 U8 Reserved; /* 01h */ 383 U8 ChainOffset; /* 02h */ 384 U8 Function; /* 03h */ 385 U8 Reserved1[3]; /* 04h */ 386 U8 MsgFlags; /* 07h */ 387 U32 MsgContext; /* 08h */ 388 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY, 389 EventNotification_t, MPI_POINTER pEventNotification_t; 390 391 /* Event Notification Reply */ 392 393 typedef struct _MSG_EVENT_NOTIFY_REPLY 394 { 395 U16 EventDataLength; /* 00h */ 396 U8 MsgLength; /* 02h */ 397 U8 Function; /* 03h */ 398 U8 Reserved1[2]; /* 04h */ 399 U8 AckRequired; /* 06h */ 400 U8 MsgFlags; /* 07h */ 401 U32 MsgContext; /* 08h */ 402 U8 Reserved2[2]; /* 0Ch */ 403 U16 IOCStatus; /* 0Eh */ 404 U32 IOCLogInfo; /* 10h */ 405 U32 Event; /* 14h */ 406 U32 EventContext; /* 18h */ 407 U32 Data[1]; /* 1Ch */ 408 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY, 409 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t; 410 411 /* Event Acknowledge */ 412 413 typedef struct _MSG_EVENT_ACK 414 { 415 U8 Reserved[2]; /* 00h */ 416 U8 ChainOffset; /* 02h */ 417 U8 Function; /* 03h */ 418 U8 Reserved1[3]; /* 04h */ 419 U8 MsgFlags; /* 07h */ 420 U32 MsgContext; /* 08h */ 421 U32 Event; /* 0Ch */ 422 U32 EventContext; /* 10h */ 423 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK, 424 EventAck_t, MPI_POINTER pEventAck_t; 425 426 typedef struct _MSG_EVENT_ACK_REPLY 427 { 428 U8 Reserved[2]; /* 00h */ 429 U8 MsgLength; /* 02h */ 430 U8 Function; /* 03h */ 431 U8 Reserved1[3]; /* 04h */ 432 U8 MsgFlags; /* 07h */ 433 U32 MsgContext; /* 08h */ 434 U16 Reserved2; /* 0Ch */ 435 U16 IOCStatus; /* 0Eh */ 436 U32 IOCLogInfo; /* 10h */ 437 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY, 438 EventAckReply_t, MPI_POINTER pEventAckReply_t; 439 440 /* Switch */ 441 442 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00) 443 #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01) 444 445 /* Event */ 446 447 #define MPI_EVENT_NONE (0x00000000) 448 #define MPI_EVENT_LOG_DATA (0x00000001) 449 #define MPI_EVENT_STATE_CHANGE (0x00000002) 450 #define MPI_EVENT_UNIT_ATTENTION (0x00000003) 451 #define MPI_EVENT_IOC_BUS_RESET (0x00000004) 452 #define MPI_EVENT_EXT_BUS_RESET (0x00000005) 453 #define MPI_EVENT_RESCAN (0x00000006) 454 #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007) 455 #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008) 456 #define MPI_EVENT_LOGOUT (0x00000009) 457 #define MPI_EVENT_EVENT_CHANGE (0x0000000A) 458 #define MPI_EVENT_INTEGRATED_RAID (0x0000000B) 459 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C) 460 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D) 461 #define MPI_EVENT_QUEUE_FULL (0x0000000E) 462 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F) 463 #define MPI_EVENT_SAS_SES (0x00000010) 464 #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011) 465 #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012) 466 #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013) 467 468 /* AckRequired field values */ 469 470 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 471 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 472 473 /* EventChange Event data */ 474 475 typedef struct _EVENT_DATA_EVENT_CHANGE 476 { 477 U8 EventState; /* 00h */ 478 U8 Reserved; /* 01h */ 479 U16 Reserved1; /* 02h */ 480 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE, 481 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t; 482 483 /* SCSI Event data for Port, Bus and Device forms */ 484 485 typedef struct _EVENT_DATA_SCSI 486 { 487 U8 TargetID; /* 00h */ 488 U8 BusPort; /* 01h */ 489 U16 Reserved; /* 02h */ 490 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI, 491 EventDataScsi_t, MPI_POINTER pEventDataScsi_t; 492 493 /* SCSI Device Status Change Event data */ 494 495 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE 496 { 497 U8 TargetID; /* 00h */ 498 U8 Bus; /* 01h */ 499 U8 ReasonCode; /* 02h */ 500 U8 LUN; /* 03h */ 501 U8 ASC; /* 04h */ 502 U8 ASCQ; /* 05h */ 503 U16 Reserved; /* 06h */ 504 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 505 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 506 MpiEventDataScsiDeviceStatusChange_t, 507 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t; 508 509 /* MPI SCSI Device Status Change Event data ReasonCode values */ 510 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03) 511 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04) 512 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05) 513 514 /* SAS Device Status Change Event data */ 515 516 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE 517 { 518 U8 TargetID; /* 00h */ 519 U8 Bus; /* 01h */ 520 U8 ReasonCode; /* 02h */ 521 U8 Reserved; /* 03h */ 522 U8 ASC; /* 04h */ 523 U8 ASCQ; /* 05h */ 524 U16 DevHandle; /* 06h */ 525 U32 DeviceInfo; /* 08h */ 526 U16 ParentDevHandle; /* 0Ch */ 527 U8 PhyNum; /* 0Eh */ 528 U8 Reserved1; /* 0Fh */ 529 U64 SASAddress; /* 10h */ 530 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 531 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 532 MpiEventDataSasDeviceStatusChange_t, 533 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t; 534 535 /* MPI SAS Device Status Change Event data ReasonCode values */ 536 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03) 537 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04) 538 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) 539 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06) 540 #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) 541 542 543 /* SCSI Event data for Queue Full event */ 544 545 typedef struct _EVENT_DATA_QUEUE_FULL 546 { 547 U8 TargetID; /* 00h */ 548 U8 Bus; /* 01h */ 549 U16 CurrentDepth; /* 02h */ 550 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL, 551 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t; 552 553 /* MPI Integrated RAID Event data */ 554 555 typedef struct _EVENT_DATA_RAID 556 { 557 U8 VolumeID; /* 00h */ 558 U8 VolumeBus; /* 01h */ 559 U8 ReasonCode; /* 02h */ 560 U8 PhysDiskNum; /* 03h */ 561 U8 ASC; /* 04h */ 562 U8 ASCQ; /* 05h */ 563 U16 Reserved; /* 06h */ 564 U32 SettingsStatus; /* 08h */ 565 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID, 566 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t; 567 568 /* MPI Integrated RAID Event data ReasonCode values */ 569 #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00) 570 #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01) 571 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02) 572 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03) 573 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04) 574 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05) 575 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06) 576 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07) 577 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08) 578 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09) 579 #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A) 580 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B) 581 582 /* MPI Link Status Change Event data */ 583 584 typedef struct _EVENT_DATA_LINK_STATUS 585 { 586 U8 State; /* 00h */ 587 U8 Reserved; /* 01h */ 588 U16 Reserved1; /* 02h */ 589 U8 Reserved2; /* 04h */ 590 U8 Port; /* 05h */ 591 U16 Reserved3; /* 06h */ 592 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS, 593 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t; 594 595 #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000) 596 #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001) 597 598 /* MPI Loop State Change Event data */ 599 600 typedef struct _EVENT_DATA_LOOP_STATE 601 { 602 U8 Character4; /* 00h */ 603 U8 Character3; /* 01h */ 604 U8 Type; /* 02h */ 605 U8 Reserved; /* 03h */ 606 U8 Reserved1; /* 04h */ 607 U8 Port; /* 05h */ 608 U16 Reserved2; /* 06h */ 609 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE, 610 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t; 611 612 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001) 613 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002) 614 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003) 615 616 /* MPI LOGOUT Event data */ 617 618 typedef struct _EVENT_DATA_LOGOUT 619 { 620 U32 NPortID; /* 00h */ 621 U8 AliasIndex; /* 04h */ 622 U8 Port; /* 05h */ 623 U16 Reserved1; /* 06h */ 624 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT, 625 EventDataLogout_t, MPI_POINTER pEventDataLogout_t; 626 627 #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF) 628 629 /* SAS SES Event data */ 630 631 typedef struct _EVENT_DATA_SAS_SES 632 { 633 U8 PhyNum; /* 00h */ 634 U8 Port; /* 01h */ 635 U8 PortWidth; /* 02h */ 636 U8 Reserved1; /* 04h */ 637 } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES, 638 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t; 639 640 /* SAS Phy Link Status Event data */ 641 642 typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS 643 { 644 U8 PhyNum; /* 00h */ 645 U8 LinkRates; /* 01h */ 646 U16 DevHandle; /* 02h */ 647 U64 SASAddress; /* 04h */ 648 } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS, 649 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t; 650 651 /* defines for the LinkRates field of the SAS PHY Link Status event */ 652 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0) 653 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4) 654 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F) 655 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0) 656 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00) 657 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01) 658 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02) 659 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03) 660 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08) 661 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09) 662 663 /* SAS Discovery Errror Event data */ 664 665 typedef struct _EVENT_DATA_DISCOVERY_ERROR 666 { 667 U32 DiscoveryStatus; /* 00h */ 668 U8 Port; /* 04h */ 669 U8 Reserved1; /* 05h */ 670 U16 Reserved2; /* 06h */ 671 } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR, 672 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t; 673 674 #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001) 675 #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002) 676 #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004) 677 #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008) 678 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010) 679 #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020) 680 #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040) 681 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080) 682 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100) 683 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200) 684 #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400) 685 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800) 686 #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000) 687 688 689 /***************************************************************************** 690 * 691 * F i r m w a r e L o a d M e s s a g e s 692 * 693 *****************************************************************************/ 694 695 /****************************************************************************/ 696 /* Firmware Download message and associated structures */ 697 /****************************************************************************/ 698 699 typedef struct _MSG_FW_DOWNLOAD 700 { 701 U8 ImageType; /* 00h */ 702 U8 Reserved; /* 01h */ 703 U8 ChainOffset; /* 02h */ 704 U8 Function; /* 03h */ 705 U8 Reserved1[3]; /* 04h */ 706 U8 MsgFlags; /* 07h */ 707 U32 MsgContext; /* 08h */ 708 SGE_MPI_UNION SGL; /* 0Ch */ 709 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD, 710 FWDownload_t, MPI_POINTER pFWDownload_t; 711 712 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) 713 714 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00) 715 #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01) 716 #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02) 717 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03) 718 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04) 719 720 721 typedef struct _FWDownloadTCSGE 722 { 723 U8 Reserved; /* 00h */ 724 U8 ContextSize; /* 01h */ 725 U8 DetailsLength; /* 02h */ 726 U8 Flags; /* 03h */ 727 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */ 728 U32 ImageOffset; /* 08h */ 729 U32 ImageSize; /* 0Ch */ 730 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE, 731 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t; 732 733 /* Firmware Download reply */ 734 typedef struct _MSG_FW_DOWNLOAD_REPLY 735 { 736 U8 ImageType; /* 00h */ 737 U8 Reserved; /* 01h */ 738 U8 MsgLength; /* 02h */ 739 U8 Function; /* 03h */ 740 U8 Reserved1[3]; /* 04h */ 741 U8 MsgFlags; /* 07h */ 742 U32 MsgContext; /* 08h */ 743 U16 Reserved2; /* 0Ch */ 744 U16 IOCStatus; /* 0Eh */ 745 U32 IOCLogInfo; /* 10h */ 746 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY, 747 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t; 748 749 750 /****************************************************************************/ 751 /* Firmware Upload message and associated structures */ 752 /****************************************************************************/ 753 754 typedef struct _MSG_FW_UPLOAD 755 { 756 U8 ImageType; /* 00h */ 757 U8 Reserved; /* 01h */ 758 U8 ChainOffset; /* 02h */ 759 U8 Function; /* 03h */ 760 U8 Reserved1[3]; /* 04h */ 761 U8 MsgFlags; /* 07h */ 762 U32 MsgContext; /* 08h */ 763 SGE_MPI_UNION SGL; /* 0Ch */ 764 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD, 765 FWUpload_t, MPI_POINTER pFWUpload_t; 766 767 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00) 768 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 769 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 770 #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03) 771 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04) 772 #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) 773 774 typedef struct _FWUploadTCSGE 775 { 776 U8 Reserved; /* 00h */ 777 U8 ContextSize; /* 01h */ 778 U8 DetailsLength; /* 02h */ 779 U8 Flags; /* 03h */ 780 U32 Reserved1; /* 04h */ 781 U32 ImageOffset; /* 08h */ 782 U32 ImageSize; /* 0Ch */ 783 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE, 784 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t; 785 786 /* Firmware Upload reply */ 787 typedef struct _MSG_FW_UPLOAD_REPLY 788 { 789 U8 ImageType; /* 00h */ 790 U8 Reserved; /* 01h */ 791 U8 MsgLength; /* 02h */ 792 U8 Function; /* 03h */ 793 U8 Reserved1[3]; /* 04h */ 794 U8 MsgFlags; /* 07h */ 795 U32 MsgContext; /* 08h */ 796 U16 Reserved2; /* 0Ch */ 797 U16 IOCStatus; /* 0Eh */ 798 U32 IOCLogInfo; /* 10h */ 799 U32 ActualImageSize; /* 14h */ 800 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY, 801 FWUploadReply_t, MPI_POINTER pFWUploadReply_t; 802 803 804 typedef struct _MPI_FW_HEADER 805 { 806 U32 ArmBranchInstruction0; /* 00h */ 807 U32 Signature0; /* 04h */ 808 U32 Signature1; /* 08h */ 809 U32 Signature2; /* 0Ch */ 810 U32 ArmBranchInstruction1; /* 10h */ 811 U32 ArmBranchInstruction2; /* 14h */ 812 U32 Reserved; /* 18h */ 813 U32 Checksum; /* 1Ch */ 814 U16 VendorId; /* 20h */ 815 U16 ProductId; /* 22h */ 816 MPI_FW_VERSION FWVersion; /* 24h */ 817 U32 SeqCodeVersion; /* 28h */ 818 U32 ImageSize; /* 2Ch */ 819 U32 NextImageHeaderOffset; /* 30h */ 820 U32 LoadStartAddress; /* 34h */ 821 U32 IopResetVectorValue; /* 38h */ 822 U32 IopResetRegAddr; /* 3Ch */ 823 U32 VersionNameWhat; /* 40h */ 824 U8 VersionName[32]; /* 44h */ 825 U32 VendorNameWhat; /* 64h */ 826 U8 VendorName[32]; /* 68h */ 827 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER, 828 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t; 829 830 #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840) 831 832 /* defines for using the ProductId field */ 833 #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000) 834 #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000) 835 #define MPI_FW_HEADER_PID_TYPE_FC (0x1000) 836 #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000) 837 838 #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A) 839 #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5) 840 #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA) 841 842 #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00) 843 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100) 844 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 845 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300) 846 #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400) 847 #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500) 848 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600) 849 #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700) 850 851 #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF) 852 /* SCSI */ 853 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001) 854 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002) 855 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003) 856 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004) 857 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005) 858 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006) 859 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007) 860 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008) 861 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009) 862 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A) 863 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B) 864 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C) 865 /* Fibre Channel */ 866 #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000) 867 #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */ 868 #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */ 869 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */ 870 #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */ 871 #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005) 872 /* SAS */ 873 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001) 874 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002) 875 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003) 876 #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */ 877 878 typedef struct _MPI_EXT_IMAGE_HEADER 879 { 880 U8 ImageType; /* 00h */ 881 U8 Reserved; /* 01h */ 882 U16 Reserved1; /* 02h */ 883 U32 Checksum; /* 04h */ 884 U32 ImageSize; /* 08h */ 885 U32 NextImageHeaderOffset; /* 0Ch */ 886 U32 LoadStartAddress; /* 10h */ 887 U32 Reserved2; /* 14h */ 888 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER, 889 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t; 890 891 /* defines for the ImageType field */ 892 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 893 #define MPI_EXT_IMAGE_TYPE_FW (0x01) 894 #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03) 895 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04) 896 897 #endif 898