1 /* 2 * Copyright (c) 2000-2006 LSI Logic Corporation. 3 * 4 * 5 * Name: mpi_init.h 6 * Title: MPI initiator mode messages and structures 7 * Creation Date: June 8, 2000 8 * 9 * mpi_init.h Version: 01.05.08 10 * 11 * Version History 12 * --------------- 13 * 14 * Date Version Description 15 * -------- -------- ------------------------------------------------------ 16 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 17 * 05-24-00 00.10.02 Added SenseBufferLength to _MSG_SCSI_IO_REPLY. 18 * 06-06-00 01.00.01 Update version number for 1.0 release. 19 * 06-08-00 01.00.02 Added MPI_SCSI_RSP_INFO_ definitions. 20 * 11-02-00 01.01.01 Original release for post 1.0 work. 21 * 12-04-00 01.01.02 Added MPI_SCSIIO_CONTROL_NO_DISCONNECT. 22 * 02-20-01 01.01.03 Started using MPI_POINTER. 23 * 03-27-01 01.01.04 Added structure offset comments. 24 * 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT. 25 * 08-08-01 01.02.01 Original release for v1.2 work. 26 * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET. 27 * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for 28 * MSG_SCSI_IO_REPLY. 29 * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure 30 * Processor messages. 31 * 10-04-01 01.02.04 Added defines for SEP request Action field. 32 * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define 33 * for SCSI IO requests. 34 * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP. 35 * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define. 36 * 05-11-04 01.03.01 Original release for MPI v1.3. 37 * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request. 38 * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field 39 * and a reserved U16. 40 * Added new MSG_SCSI_IO32_REQUEST structure. 41 * Added a TaskType of Clear Task Set to SCSI 42 * Task Management request. 43 * 12-07-04 01.05.02 Added support for Task Management Query Task. 44 * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support 45 * WWID addressing. 46 * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request. 47 * Removed SCSI IO 32 Request. 48 * Modified SCSI Enclosure Processor Request and Reply to 49 * support Enclosure/Slot addressing rather than WWID 50 * addressing. 51 * 06-24-05 01.05.05 Added SCSI IO 32 structures and defines. 52 * Added four new defines for SEP SlotStatus. 53 * 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them 54 * unique in the first 32 characters. 55 * 03-27-06 01.05.07 Added Task Management type of Clear ACA. 56 * 10-11-06 01.05.08 Shortened define for Task Management type of Clear ACA. 57 * -------------------------------------------------------------------------- 58 */ 59 60 #ifndef MPI_INIT_H 61 #define MPI_INIT_H 62 63 64 /***************************************************************************** 65 * 66 * S C S I I n i t i a t o r M e s s a g e s 67 * 68 *****************************************************************************/ 69 70 /****************************************************************************/ 71 /* SCSI IO messages and associated structures */ 72 /****************************************************************************/ 73 74 typedef struct _MSG_SCSI_IO_REQUEST 75 { 76 U8 TargetID; /* 00h */ 77 U8 Bus; /* 01h */ 78 U8 ChainOffset; /* 02h */ 79 U8 Function; /* 03h */ 80 U8 CDBLength; /* 04h */ 81 U8 SenseBufferLength; /* 05h */ 82 U8 Reserved; /* 06h */ 83 U8 MsgFlags; /* 07h */ 84 U32 MsgContext; /* 08h */ 85 U8 LUN[8]; /* 0Ch */ 86 U32 Control; /* 14h */ 87 U8 CDB[16]; /* 18h */ 88 U32 DataLength; /* 28h */ 89 U32 SenseBufferLowAddr; /* 2Ch */ 90 SGE_IO_UNION SGL; /* 30h */ 91 } MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST, 92 SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t; 93 94 95 /* SCSI IO MsgFlags bits */ 96 97 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01) 98 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00) 99 #define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01) 100 101 #define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02) 102 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00) 103 #define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02) 104 105 #define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 106 107 /* SCSI IO LUN fields */ 108 109 #define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 110 #define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 111 #define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 112 #define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 113 #define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00) 114 #define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00) 115 116 /* SCSI IO Control bits */ 117 118 #define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) 119 #define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) 120 #define MPI_SCSIIO_CONTROL_WRITE (0x01000000) 121 #define MPI_SCSIIO_CONTROL_READ (0x02000000) 122 123 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000) 124 #define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) 125 126 #define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 127 #define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000) 128 #define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100) 129 #define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200) 130 #define MPI_SCSIIO_CONTROL_ACAQ (0x00000400) 131 #define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500) 132 #define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700) 133 134 #define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000) 135 #define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000) 136 #define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000) 137 #define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000) 138 #define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000) 139 #define MPI_SCSIIO_CONTROL_RESERVED (0x00080000) 140 #define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000) 141 #define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000) 142 #define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000) 143 144 145 /* SCSI IO reply structure */ 146 typedef struct _MSG_SCSI_IO_REPLY 147 { 148 U8 TargetID; /* 00h */ 149 U8 Bus; /* 01h */ 150 U8 MsgLength; /* 02h */ 151 U8 Function; /* 03h */ 152 U8 CDBLength; /* 04h */ 153 U8 SenseBufferLength; /* 05h */ 154 U8 Reserved; /* 06h */ 155 U8 MsgFlags; /* 07h */ 156 U32 MsgContext; /* 08h */ 157 U8 SCSIStatus; /* 0Ch */ 158 U8 SCSIState; /* 0Dh */ 159 U16 IOCStatus; /* 0Eh */ 160 U32 IOCLogInfo; /* 10h */ 161 U32 TransferCount; /* 14h */ 162 U32 SenseCount; /* 18h */ 163 U32 ResponseInfo; /* 1Ch */ 164 U16 TaskTag; /* 20h */ 165 U16 Reserved1; /* 22h */ 166 } MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY, 167 SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t; 168 169 170 /* SCSI IO Reply SCSIStatus values (SAM-2 status codes) */ 171 172 #define MPI_SCSI_STATUS_SUCCESS (0x00) 173 #define MPI_SCSI_STATUS_CHECK_CONDITION (0x02) 174 #define MPI_SCSI_STATUS_CONDITION_MET (0x04) 175 #define MPI_SCSI_STATUS_BUSY (0x08) 176 #define MPI_SCSI_STATUS_INTERMEDIATE (0x10) 177 #define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) 178 #define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18) 179 #define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22) 180 #define MPI_SCSI_STATUS_TASK_SET_FULL (0x28) 181 #define MPI_SCSI_STATUS_ACA_ACTIVE (0x30) 182 183 #define MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT (0x80) 184 #define MPI_SCSI_STATUS_FCPEXT_NO_LINK (0x81) 185 #define MPI_SCSI_STATUS_FCPEXT_UNASSIGNED (0x82) 186 187 188 /* SCSI IO Reply SCSIState values */ 189 190 #define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01) 191 #define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02) 192 #define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04) 193 #define MPI_SCSI_STATE_TERMINATED (0x08) 194 #define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10) 195 #define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20) 196 197 /* SCSI IO Reply ResponseInfo values */ 198 /* (FCP-1 RSP_CODE values and SPI-3 Packetized Failure codes) */ 199 200 #define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000) 201 #define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000) 202 #define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000) 203 #define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000) 204 #define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000) 205 #define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000) 206 #define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000) 207 208 #define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF) 209 210 211 /****************************************************************************/ 212 /* SCSI IO 32 messages and associated structures */ 213 /****************************************************************************/ 214 215 typedef struct 216 { 217 U8 CDB[20]; /* 00h */ 218 U32 PrimaryReferenceTag; /* 14h */ 219 U16 PrimaryApplicationTag; /* 18h */ 220 U16 PrimaryApplicationTagMask; /* 1Ah */ 221 U32 TransferLength; /* 1Ch */ 222 } MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32, 223 MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t; 224 225 typedef struct 226 { 227 U8 CDB[16]; /* 00h */ 228 U32 DataLength; /* 10h */ 229 U32 PrimaryReferenceTag; /* 14h */ 230 U16 PrimaryApplicationTag; /* 18h */ 231 U16 PrimaryApplicationTagMask; /* 1Ah */ 232 U32 TransferLength; /* 1Ch */ 233 } MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16, 234 MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t; 235 236 typedef union 237 { 238 U8 CDB32[32]; 239 MPI_SCSI_IO32_CDB_EEDP32 EEDP32; 240 MPI_SCSI_IO32_CDB_EEDP16 EEDP16; 241 SGE_SIMPLE_UNION SGE; 242 } MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION, 243 MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t; 244 245 typedef struct 246 { 247 U8 TargetID; /* 00h */ 248 U8 Bus; /* 01h */ 249 U16 Reserved1; /* 02h */ 250 U32 Reserved2; /* 04h */ 251 } MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM, 252 MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t; 253 254 typedef union 255 { 256 MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID; 257 U64 WWID; 258 } MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS, 259 MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t; 260 261 typedef struct _MSG_SCSI_IO32_REQUEST 262 { 263 U8 Port; /* 00h */ 264 U8 Reserved1; /* 01h */ 265 U8 ChainOffset; /* 02h */ 266 U8 Function; /* 03h */ 267 U8 CDBLength; /* 04h */ 268 U8 SenseBufferLength; /* 05h */ 269 U8 Flags; /* 06h */ 270 U8 MsgFlags; /* 07h */ 271 U32 MsgContext; /* 08h */ 272 U8 LUN[8]; /* 0Ch */ 273 U32 Control; /* 14h */ 274 MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */ 275 U32 DataLength; /* 38h */ 276 U32 BidirectionalDataLength; /* 3Ch */ 277 U32 SecondaryReferenceTag; /* 40h */ 278 U16 SecondaryApplicationTag; /* 44h */ 279 U16 Reserved2; /* 46h */ 280 U16 EEDPFlags; /* 48h */ 281 U16 ApplicationTagTranslationMask; /* 4Ah */ 282 U32 EEDPBlockSize; /* 4Ch */ 283 MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */ 284 U8 SGLOffset0; /* 58h */ 285 U8 SGLOffset1; /* 59h */ 286 U8 SGLOffset2; /* 5Ah */ 287 U8 SGLOffset3; /* 5Bh */ 288 U32 Reserved3; /* 5Ch */ 289 U32 Reserved4; /* 60h */ 290 U32 SenseBufferLowAddr; /* 64h */ 291 SGE_IO_UNION SGL; /* 68h */ 292 } MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST, 293 SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t; 294 295 /* SCSI IO 32 MsgFlags bits */ 296 #define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01) 297 #define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00) 298 #define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01) 299 300 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02) 301 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00) 302 #define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02) 303 304 #define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04) 305 #define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08) 306 #define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10) 307 #define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20) 308 #define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40) 309 310 /* SCSI IO 32 Flags bits */ 311 #define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03) 312 #define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00) 313 #define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01) 314 315 /* SCSI IO 32 LUN fields */ 316 #define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 317 #define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 318 #define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 319 #define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 320 #define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00) 321 #define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00) 322 323 /* SCSI IO 32 Control bits */ 324 #define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000) 325 #define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000) 326 #define MPI_SCSIIO32_CONTROL_WRITE (0x01000000) 327 #define MPI_SCSIIO32_CONTROL_READ (0x02000000) 328 #define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000) 329 330 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000) 331 #define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26) 332 333 #define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700) 334 #define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000) 335 #define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100) 336 #define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200) 337 #define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400) 338 #define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500) 339 #define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700) 340 341 #define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000) 342 #define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000) 343 #define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000) 344 #define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000) 345 #define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000) 346 #define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000) 347 #define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000) 348 #define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000) 349 #define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000) 350 351 /* SCSI IO 32 EEDPFlags */ 352 #define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007) 353 #define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000) 354 #define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001) 355 #define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002) 356 #define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003) 357 #define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004) 358 #define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006) 359 #define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007) 360 361 #define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008) 362 #define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010) 363 364 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700) 365 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100) 366 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200) 367 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400) 368 #define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8) 369 370 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000) 371 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000) 372 #define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000) 373 #define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000) 374 375 376 /* SCSIIO32 IO reply structure */ 377 typedef struct _MSG_SCSIIO32_IO_REPLY 378 { 379 U8 Port; /* 00h */ 380 U8 Reserved1; /* 01h */ 381 U8 MsgLength; /* 02h */ 382 U8 Function; /* 03h */ 383 U8 CDBLength; /* 04h */ 384 U8 SenseBufferLength; /* 05h */ 385 U8 Flags; /* 06h */ 386 U8 MsgFlags; /* 07h */ 387 U32 MsgContext; /* 08h */ 388 U8 SCSIStatus; /* 0Ch */ 389 U8 SCSIState; /* 0Dh */ 390 U16 IOCStatus; /* 0Eh */ 391 U32 IOCLogInfo; /* 10h */ 392 U32 TransferCount; /* 14h */ 393 U32 SenseCount; /* 18h */ 394 U32 ResponseInfo; /* 1Ch */ 395 U16 TaskTag; /* 20h */ 396 U16 Reserved2; /* 22h */ 397 U32 BidirectionalTransferCount; /* 24h */ 398 } MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY, 399 SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t; 400 401 402 /****************************************************************************/ 403 /* SCSI Task Management messages */ 404 /****************************************************************************/ 405 406 typedef struct _MSG_SCSI_TASK_MGMT 407 { 408 U8 TargetID; /* 00h */ 409 U8 Bus; /* 01h */ 410 U8 ChainOffset; /* 02h */ 411 U8 Function; /* 03h */ 412 U8 Reserved; /* 04h */ 413 U8 TaskType; /* 05h */ 414 U8 Reserved1; /* 06h */ 415 U8 MsgFlags; /* 07h */ 416 U32 MsgContext; /* 08h */ 417 U8 LUN[8]; /* 0Ch */ 418 U32 Reserved2[7]; /* 14h */ 419 U32 TaskMsgContext; /* 30h */ 420 } MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT, 421 SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t; 422 423 /* TaskType values */ 424 425 #define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) 426 #define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) 427 #define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) 428 #define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04) 429 #define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) 430 #define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) 431 #define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) 432 #define MPI_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) 433 434 /* MsgFlags bits */ 435 #define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00) 436 #define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02) 437 #define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04) 438 439 /* SCSI Task Management Reply */ 440 typedef struct _MSG_SCSI_TASK_MGMT_REPLY 441 { 442 U8 TargetID; /* 00h */ 443 U8 Bus; /* 01h */ 444 U8 MsgLength; /* 02h */ 445 U8 Function; /* 03h */ 446 U8 ResponseCode; /* 04h */ 447 U8 TaskType; /* 05h */ 448 U8 Reserved1; /* 06h */ 449 U8 MsgFlags; /* 07h */ 450 U32 MsgContext; /* 08h */ 451 U8 Reserved2[2]; /* 0Ch */ 452 U16 IOCStatus; /* 0Eh */ 453 U32 IOCLogInfo; /* 10h */ 454 U32 TerminationCount; /* 14h */ 455 } MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY, 456 SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t; 457 458 /* ResponseCode values */ 459 #define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) 460 #define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) 461 #define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) 462 #define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05) 463 #define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) 464 #define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) 465 #define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) 466 467 468 /****************************************************************************/ 469 /* SCSI Enclosure Processor messages */ 470 /****************************************************************************/ 471 472 typedef struct _MSG_SEP_REQUEST 473 { 474 U8 TargetID; /* 00h */ 475 U8 Bus; /* 01h */ 476 U8 ChainOffset; /* 02h */ 477 U8 Function; /* 03h */ 478 U8 Action; /* 04h */ 479 U8 Flags; /* 05h */ 480 U8 Reserved1; /* 06h */ 481 U8 MsgFlags; /* 07h */ 482 U32 MsgContext; /* 08h */ 483 U32 SlotStatus; /* 0Ch */ 484 U32 Reserved2; /* 10h */ 485 U32 Reserved3; /* 14h */ 486 U32 Reserved4; /* 18h */ 487 U16 Slot; /* 1Ch */ 488 U16 EnclosureHandle; /* 1Eh */ 489 } MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST, 490 SEPRequest_t, MPI_POINTER pSEPRequest_t; 491 492 /* Action defines */ 493 #define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00) 494 #define MPI_SEP_REQ_ACTION_READ_STATUS (0x01) 495 496 /* Flags defines */ 497 #define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) 498 #define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00) 499 500 /* SlotStatus bits for MSG_SEP_REQUEST */ 501 #define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) 502 #define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) 503 #define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) 504 #define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 505 #define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 506 #define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020) 507 #define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 508 #define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) 509 #define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) 510 #define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 511 #define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000) 512 #define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000) 513 #define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000) 514 #define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 515 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) 516 #define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000) 517 #define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000) 518 #define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000) 519 #define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 520 #define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 521 #define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000) 522 #define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000) 523 524 525 typedef struct _MSG_SEP_REPLY 526 { 527 U8 TargetID; /* 00h */ 528 U8 Bus; /* 01h */ 529 U8 MsgLength; /* 02h */ 530 U8 Function; /* 03h */ 531 U8 Action; /* 04h */ 532 U8 Reserved1; /* 05h */ 533 U8 Reserved2; /* 06h */ 534 U8 MsgFlags; /* 07h */ 535 U32 MsgContext; /* 08h */ 536 U16 Reserved3; /* 0Ch */ 537 U16 IOCStatus; /* 0Eh */ 538 U32 IOCLogInfo; /* 10h */ 539 U32 SlotStatus; /* 14h */ 540 U32 Reserved4; /* 18h */ 541 U16 Slot; /* 1Ch */ 542 U16 EnclosureHandle; /* 1Eh */ 543 } MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY, 544 SEPReply_t, MPI_POINTER pSEPReply_t; 545 546 /* SlotStatus bits for MSG_SEP_REPLY */ 547 #define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) 548 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) 549 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) 550 #define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) 551 #define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) 552 #define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020) 553 #define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) 554 #define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) 555 #define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) 556 #define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) 557 #define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000) 558 #define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000) 559 #define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000) 560 #define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000) 561 #define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) 562 #define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) 563 #define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000) 564 #define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000) 565 #define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000) 566 #define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000) 567 #define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000) 568 #define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000) 569 #define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000) 570 #define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000) 571 #define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000) 572 #define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000) 573 574 #endif 575