1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * OpenFirmware helpers for memory drivers 4 * 5 * Copyright (C) 2012 Texas Instruments, Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/platform_device.h> 10 #include <linux/list.h> 11 #include <linux/of.h> 12 #include <linux/gfp.h> 13 #include <memory/jedec_ddr.h> 14 #include <linux/export.h> 15 #include "of_memory.h" 16 17 /** 18 * of_get_min_tck() - extract min timing values for ddr 19 * @np: pointer to ddr device tree node 20 * @device: device requesting for min timing values 21 * 22 * Populates the lpddr2_min_tck structure by extracting data 23 * from device tree node. Returns a pointer to the populated 24 * structure. If any error in populating the structure, returns 25 * default min timings provided by JEDEC. 26 */ 27 const struct lpddr2_min_tck *of_get_min_tck(struct device_node *np, 28 struct device *dev) 29 { 30 int ret = 0; 31 struct lpddr2_min_tck *min; 32 33 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL); 34 if (!min) 35 goto default_min_tck; 36 37 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); 38 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); 39 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); 40 ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin); 41 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD); 42 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR); 43 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP); 44 ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP); 45 ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE); 46 ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR); 47 ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW); 48 49 if (ret) { 50 devm_kfree(dev, min); 51 goto default_min_tck; 52 } 53 54 return min; 55 56 default_min_tck: 57 dev_warn(dev, "%s: using default min-tck values\n", __func__); 58 return &lpddr2_jedec_min_tck; 59 } 60 EXPORT_SYMBOL(of_get_min_tck); 61 62 static int of_do_get_timings(struct device_node *np, 63 struct lpddr2_timings *tim) 64 { 65 int ret; 66 67 ret = of_property_read_u32(np, "max-freq", &tim->max_freq); 68 ret |= of_property_read_u32(np, "min-freq", &tim->min_freq); 69 ret |= of_property_read_u32(np, "tRPab", &tim->tRPab); 70 ret |= of_property_read_u32(np, "tRCD", &tim->tRCD); 71 ret |= of_property_read_u32(np, "tWR", &tim->tWR); 72 ret |= of_property_read_u32(np, "tRAS-min", &tim->tRAS_min); 73 ret |= of_property_read_u32(np, "tRRD", &tim->tRRD); 74 ret |= of_property_read_u32(np, "tWTR", &tim->tWTR); 75 ret |= of_property_read_u32(np, "tXP", &tim->tXP); 76 ret |= of_property_read_u32(np, "tRTP", &tim->tRTP); 77 ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR); 78 ret |= of_property_read_u32(np, "tDQSCK-max", &tim->tDQSCK_max); 79 ret |= of_property_read_u32(np, "tFAW", &tim->tFAW); 80 ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS); 81 ret |= of_property_read_u32(np, "tZQCL", &tim->tZQCL); 82 ret |= of_property_read_u32(np, "tZQinit", &tim->tZQinit); 83 ret |= of_property_read_u32(np, "tRAS-max-ns", &tim->tRAS_max_ns); 84 ret |= of_property_read_u32(np, "tDQSCK-max-derated", 85 &tim->tDQSCK_max_derated); 86 87 return ret; 88 } 89 90 /** 91 * of_get_ddr_timings() - extracts the ddr timings and updates no of 92 * frequencies available. 93 * @np_ddr: Pointer to ddr device tree node 94 * @dev: Device requesting for ddr timings 95 * @device_type: Type of ddr(LPDDR2 S2/S4) 96 * @nr_frequencies: No of frequencies available for ddr 97 * (updated by this function) 98 * 99 * Populates lpddr2_timings structure by extracting data from device 100 * tree node. Returns pointer to populated structure. If any error 101 * while populating, returns default timings provided by JEDEC. 102 */ 103 const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr, 104 struct device *dev, u32 device_type, u32 *nr_frequencies) 105 { 106 struct lpddr2_timings *timings = NULL; 107 u32 arr_sz = 0, i = 0; 108 struct device_node *np_tim; 109 char *tim_compat = NULL; 110 111 switch (device_type) { 112 case DDR_TYPE_LPDDR2_S2: 113 case DDR_TYPE_LPDDR2_S4: 114 tim_compat = "jedec,lpddr2-timings"; 115 break; 116 default: 117 dev_warn(dev, "%s: un-supported memory type\n", __func__); 118 } 119 120 for_each_child_of_node(np_ddr, np_tim) 121 if (of_device_is_compatible(np_tim, tim_compat)) 122 arr_sz++; 123 124 if (arr_sz) 125 timings = devm_kcalloc(dev, arr_sz, sizeof(*timings), 126 GFP_KERNEL); 127 128 if (!timings) 129 goto default_timings; 130 131 for_each_child_of_node(np_ddr, np_tim) { 132 if (of_device_is_compatible(np_tim, tim_compat)) { 133 if (of_do_get_timings(np_tim, &timings[i])) { 134 devm_kfree(dev, timings); 135 goto default_timings; 136 } 137 i++; 138 } 139 } 140 141 *nr_frequencies = arr_sz; 142 143 return timings; 144 145 default_timings: 146 dev_warn(dev, "%s: using default timings\n", __func__); 147 *nr_frequencies = ARRAY_SIZE(lpddr2_jedec_timings); 148 return lpddr2_jedec_timings; 149 } 150 EXPORT_SYMBOL(of_get_ddr_timings); 151