1 /* 2 * DDR addressing details and AC timing parameters from JEDEC specs 3 * 4 * Copyright (C) 2012 Texas Instruments, Inc. 5 * 6 * Aneesh V <aneesh@ti.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/export.h> 14 15 #include "jedec_ddr.h" 16 17 /* LPDDR2 addressing details from JESD209-2 section 2.4 */ 18 const struct lpddr2_addressing 19 lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = { 20 {B4, T_REFI_15_6, T_RFC_90}, /* 64M */ 21 {B4, T_REFI_15_6, T_RFC_90}, /* 128M */ 22 {B4, T_REFI_7_8, T_RFC_90}, /* 256M */ 23 {B4, T_REFI_7_8, T_RFC_90}, /* 512M */ 24 {B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */ 25 {B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */ 26 {B8, T_REFI_3_9, T_RFC_130}, /* 4G */ 27 {B8, T_REFI_3_9, T_RFC_210}, /* 8G */ 28 {B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */ 29 {B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */ 30 }; 31 EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table); 32 33 /* LPDDR2 AC timing parameters from JESD209-2 section 12 */ 34 const struct lpddr2_timings 35 lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES] = { 36 /* Speed bin 400(200 MHz) */ 37 [0] = { 38 .max_freq = 200000000, 39 .min_freq = 10000000, 40 .tRPab = 21000, 41 .tRCD = 18000, 42 .tWR = 15000, 43 .tRAS_min = 42000, 44 .tRRD = 10000, 45 .tWTR = 10000, 46 .tXP = 7500, 47 .tRTP = 7500, 48 .tCKESR = 15000, 49 .tDQSCK_max = 5500, 50 .tFAW = 50000, 51 .tZQCS = 90000, 52 .tZQCL = 360000, 53 .tZQinit = 1000000, 54 .tRAS_max_ns = 70000, 55 .tDQSCK_max_derated = 6000, 56 }, 57 /* Speed bin 533(266 MHz) */ 58 [1] = { 59 .max_freq = 266666666, 60 .min_freq = 10000000, 61 .tRPab = 21000, 62 .tRCD = 18000, 63 .tWR = 15000, 64 .tRAS_min = 42000, 65 .tRRD = 10000, 66 .tWTR = 7500, 67 .tXP = 7500, 68 .tRTP = 7500, 69 .tCKESR = 15000, 70 .tDQSCK_max = 5500, 71 .tFAW = 50000, 72 .tZQCS = 90000, 73 .tZQCL = 360000, 74 .tZQinit = 1000000, 75 .tRAS_max_ns = 70000, 76 .tDQSCK_max_derated = 6000, 77 }, 78 /* Speed bin 800(400 MHz) */ 79 [2] = { 80 .max_freq = 400000000, 81 .min_freq = 10000000, 82 .tRPab = 21000, 83 .tRCD = 18000, 84 .tWR = 15000, 85 .tRAS_min = 42000, 86 .tRRD = 10000, 87 .tWTR = 7500, 88 .tXP = 7500, 89 .tRTP = 7500, 90 .tCKESR = 15000, 91 .tDQSCK_max = 5500, 92 .tFAW = 50000, 93 .tZQCS = 90000, 94 .tZQCL = 360000, 95 .tZQinit = 1000000, 96 .tRAS_max_ns = 70000, 97 .tDQSCK_max_derated = 6000, 98 }, 99 /* Speed bin 1066(533 MHz) */ 100 [3] = { 101 .max_freq = 533333333, 102 .min_freq = 10000000, 103 .tRPab = 21000, 104 .tRCD = 18000, 105 .tWR = 15000, 106 .tRAS_min = 42000, 107 .tRRD = 10000, 108 .tWTR = 7500, 109 .tXP = 7500, 110 .tRTP = 7500, 111 .tCKESR = 15000, 112 .tDQSCK_max = 5500, 113 .tFAW = 50000, 114 .tZQCS = 90000, 115 .tZQCL = 360000, 116 .tZQinit = 1000000, 117 .tRAS_max_ns = 70000, 118 .tDQSCK_max_derated = 5620, 119 }, 120 }; 121 EXPORT_SYMBOL_GPL(lpddr2_jedec_timings); 122 123 const struct lpddr2_min_tck lpddr2_jedec_min_tck = { 124 .tRPab = 3, 125 .tRCD = 3, 126 .tWR = 3, 127 .tRASmin = 3, 128 .tRRD = 2, 129 .tWTR = 2, 130 .tXP = 2, 131 .tRTP = 2, 132 .tCKE = 3, 133 .tCKESR = 3, 134 .tFAW = 8 135 }; 136 EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck); 137