xref: /linux/drivers/memory/atmel-ebi.c (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 /*
2  * EBI driver for Atmel chips
3  * inspired by the fsl weim bus driver
4  *
5  * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6  *
7  * This file is licensed under the terms of the GNU General Public
8  * License version 2. This program is licensed "as is" without any
9  * warranty of any kind, whether express or implied.
10  */
11 
12 #include <linux/clk.h>
13 #include <linux/io.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/mfd/syscon/atmel-matrix.h>
16 #include <linux/mfd/syscon/atmel-smc.h>
17 #include <linux/init.h>
18 #include <linux/of_device.h>
19 #include <linux/regmap.h>
20 
21 struct at91sam9_smc_timings {
22 	u32 ncs_rd_setup_ns;
23 	u32 nrd_setup_ns;
24 	u32 ncs_wr_setup_ns;
25 	u32 nwe_setup_ns;
26 	u32 ncs_rd_pulse_ns;
27 	u32 nrd_pulse_ns;
28 	u32 ncs_wr_pulse_ns;
29 	u32 nwe_pulse_ns;
30 	u32 nrd_cycle_ns;
31 	u32 nwe_cycle_ns;
32 	u32 tdf_ns;
33 };
34 
35 struct at91sam9_smc_generic_fields {
36 	struct regmap_field *setup;
37 	struct regmap_field *pulse;
38 	struct regmap_field *cycle;
39 	struct regmap_field *mode;
40 };
41 
42 struct at91sam9_ebi_dev_config {
43 	struct at91sam9_smc_timings timings;
44 	u32 mode;
45 };
46 
47 struct at91_ebi_dev_config {
48 	int cs;
49 	union {
50 		struct at91sam9_ebi_dev_config sam9;
51 	};
52 };
53 
54 struct at91_ebi;
55 
56 struct at91_ebi_dev {
57 	struct list_head node;
58 	struct at91_ebi *ebi;
59 	u32 mode;
60 	int numcs;
61 	struct at91_ebi_dev_config configs[];
62 };
63 
64 struct at91_ebi_caps {
65 	unsigned int available_cs;
66 	const struct reg_field *ebi_csa;
67 	void (*get_config)(struct at91_ebi_dev *ebid,
68 			   struct at91_ebi_dev_config *conf);
69 	int (*xlate_config)(struct at91_ebi_dev *ebid,
70 			    struct device_node *configs_np,
71 			    struct at91_ebi_dev_config *conf);
72 	int (*apply_config)(struct at91_ebi_dev *ebid,
73 			    struct at91_ebi_dev_config *conf);
74 	int (*init)(struct at91_ebi *ebi);
75 };
76 
77 struct at91_ebi {
78 	struct clk *clk;
79 	struct regmap *matrix;
80 	struct  {
81 		struct regmap *regmap;
82 		struct clk *clk;
83 	} smc;
84 	struct regmap_field *ebi_csa;
85 
86 	struct device *dev;
87 	const struct at91_ebi_caps *caps;
88 	struct list_head devs;
89 	union {
90 		struct at91sam9_smc_generic_fields sam9;
91 	};
92 };
93 
94 static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
95 				    struct at91_ebi_dev_config *conf)
96 {
97 	struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
98 	unsigned int clk_period = NSEC_PER_SEC / clk_get_rate(ebid->ebi->clk);
99 	struct at91sam9_ebi_dev_config *config = &conf->sam9;
100 	struct at91sam9_smc_timings *timings = &config->timings;
101 	unsigned int val;
102 
103 	regmap_fields_read(fields->mode, conf->cs, &val);
104 	config->mode = val & ~AT91_SMC_TDF;
105 
106 	val = (val & AT91_SMC_TDF) >> 16;
107 	timings->tdf_ns = clk_period * val;
108 
109 	regmap_fields_read(fields->setup, conf->cs, &val);
110 	timings->ncs_rd_setup_ns = (val >> 24) & 0x1f;
111 	timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128;
112 	timings->ncs_rd_setup_ns *= clk_period;
113 	timings->nrd_setup_ns = (val >> 16) & 0x1f;
114 	timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128;
115 	timings->nrd_setup_ns *= clk_period;
116 	timings->ncs_wr_setup_ns = (val >> 8) & 0x1f;
117 	timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128;
118 	timings->ncs_wr_setup_ns *= clk_period;
119 	timings->nwe_setup_ns = val & 0x1f;
120 	timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128;
121 	timings->nwe_setup_ns *= clk_period;
122 
123 	regmap_fields_read(fields->pulse, conf->cs, &val);
124 	timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f;
125 	timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256;
126 	timings->ncs_rd_pulse_ns *= clk_period;
127 	timings->nrd_pulse_ns = (val >> 16) & 0x3f;
128 	timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256;
129 	timings->nrd_pulse_ns *= clk_period;
130 	timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f;
131 	timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256;
132 	timings->ncs_wr_pulse_ns *= clk_period;
133 	timings->nwe_pulse_ns = val & 0x3f;
134 	timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256;
135 	timings->nwe_pulse_ns *= clk_period;
136 
137 	regmap_fields_read(fields->cycle, conf->cs, &val);
138 	timings->nrd_cycle_ns = (val >> 16) & 0x7f;
139 	timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256;
140 	timings->nrd_cycle_ns *= clk_period;
141 	timings->nwe_cycle_ns = val & 0x7f;
142 	timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256;
143 	timings->nwe_cycle_ns *= clk_period;
144 }
145 
146 static int at91_xlate_timing(struct device_node *np, const char *prop,
147 			     u32 *val, bool *required)
148 {
149 	if (!of_property_read_u32(np, prop, val)) {
150 		*required = true;
151 		return 0;
152 	}
153 
154 	if (*required)
155 		return -EINVAL;
156 
157 	return 0;
158 }
159 
160 static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid,
161 				       struct device_node *np,
162 				       struct at91sam9_smc_timings *timings,
163 				       bool *required)
164 {
165 	int ret;
166 
167 	ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-setup-ns",
168 				&timings->ncs_rd_setup_ns, required);
169 	if (ret)
170 		goto out;
171 
172 	ret = at91_xlate_timing(np, "atmel,smc-nrd-setup-ns",
173 				&timings->nrd_setup_ns, required);
174 	if (ret)
175 		goto out;
176 
177 	ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-setup-ns",
178 				&timings->ncs_wr_setup_ns, required);
179 	if (ret)
180 		goto out;
181 
182 	ret = at91_xlate_timing(np, "atmel,smc-nwe-setup-ns",
183 				&timings->nwe_setup_ns, required);
184 	if (ret)
185 		goto out;
186 
187 	ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-pulse-ns",
188 				&timings->ncs_rd_pulse_ns, required);
189 	if (ret)
190 		goto out;
191 
192 	ret = at91_xlate_timing(np, "atmel,smc-nrd-pulse-ns",
193 				&timings->nrd_pulse_ns, required);
194 	if (ret)
195 		goto out;
196 
197 	ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-pulse-ns",
198 				&timings->ncs_wr_pulse_ns, required);
199 	if (ret)
200 		goto out;
201 
202 	ret = at91_xlate_timing(np, "atmel,smc-nwe-pulse-ns",
203 				&timings->nwe_pulse_ns, required);
204 	if (ret)
205 		goto out;
206 
207 	ret = at91_xlate_timing(np, "atmel,smc-nwe-cycle-ns",
208 				&timings->nwe_cycle_ns, required);
209 	if (ret)
210 		goto out;
211 
212 	ret = at91_xlate_timing(np, "atmel,smc-nrd-cycle-ns",
213 				&timings->nrd_cycle_ns, required);
214 	if (ret)
215 		goto out;
216 
217 	ret = at91_xlate_timing(np, "atmel,smc-tdf-ns",
218 				&timings->tdf_ns, required);
219 
220 out:
221 	if (ret)
222 		dev_err(ebid->ebi->dev,
223 			"missing or invalid timings definition in %s",
224 			np->full_name);
225 
226 	return ret;
227 }
228 
229 static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid,
230 				      struct device_node *np,
231 				      struct at91_ebi_dev_config *conf)
232 {
233 	struct at91sam9_ebi_dev_config *config = &conf->sam9;
234 	bool required = false;
235 	const char *tmp_str;
236 	u32 tmp;
237 	int ret;
238 
239 	ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
240 	if (!ret) {
241 		switch (tmp) {
242 		case 8:
243 			config->mode |= AT91_SMC_DBW_8;
244 			break;
245 
246 		case 16:
247 			config->mode |= AT91_SMC_DBW_16;
248 			break;
249 
250 		case 32:
251 			config->mode |= AT91_SMC_DBW_32;
252 			break;
253 
254 		default:
255 			return -EINVAL;
256 		}
257 
258 		required = true;
259 	}
260 
261 	if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
262 		config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
263 		required = true;
264 	}
265 
266 	tmp_str = NULL;
267 	of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
268 	if (tmp_str && !strcmp(tmp_str, "write")) {
269 		config->mode |= AT91_SMC_BAT_WRITE;
270 		required = true;
271 	}
272 
273 	tmp_str = NULL;
274 	of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
275 	if (tmp_str && !strcmp(tmp_str, "nrd")) {
276 		config->mode |= AT91_SMC_READMODE_NRD;
277 		required = true;
278 	}
279 
280 	tmp_str = NULL;
281 	of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
282 	if (tmp_str && !strcmp(tmp_str, "nwe")) {
283 		config->mode |= AT91_SMC_WRITEMODE_NWE;
284 		required = true;
285 	}
286 
287 	tmp_str = NULL;
288 	of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
289 	if (tmp_str) {
290 		if (!strcmp(tmp_str, "frozen"))
291 			config->mode |= AT91_SMC_EXNWMODE_FROZEN;
292 		else if (!strcmp(tmp_str, "ready"))
293 			config->mode |= AT91_SMC_EXNWMODE_READY;
294 		else if (strcmp(tmp_str, "disabled"))
295 			return -EINVAL;
296 
297 		required = true;
298 	}
299 
300 	ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
301 	if (!ret) {
302 		switch (tmp) {
303 		case 4:
304 			config->mode |= AT91_SMC_PS_4;
305 			break;
306 
307 		case 8:
308 			config->mode |= AT91_SMC_PS_8;
309 			break;
310 
311 		case 16:
312 			config->mode |= AT91_SMC_PS_16;
313 			break;
314 
315 		case 32:
316 			config->mode |= AT91_SMC_PS_32;
317 			break;
318 
319 		default:
320 			return -EINVAL;
321 		}
322 
323 		config->mode |= AT91_SMC_PMEN;
324 		required = true;
325 	}
326 
327 	ret = at91sam9_smc_xslate_timings(ebid, np, &config->timings,
328 					  &required);
329 	if (ret)
330 		return ret;
331 
332 	return required;
333 }
334 
335 static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
336 				     struct at91_ebi_dev_config *conf)
337 {
338 	unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
339 	unsigned int clk_period = NSEC_PER_SEC / clk_rate;
340 	struct at91sam9_ebi_dev_config *config = &conf->sam9;
341 	struct at91sam9_smc_timings *timings = &config->timings;
342 	struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
343 	u32 coded_val;
344 	u32 val;
345 
346 	coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
347 						    timings->ncs_rd_setup_ns);
348 	val = AT91SAM9_SMC_NCS_NRDSETUP(coded_val);
349 	coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
350 						    timings->nrd_setup_ns);
351 	val |= AT91SAM9_SMC_NRDSETUP(coded_val);
352 	coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
353 						    timings->ncs_wr_setup_ns);
354 	val |= AT91SAM9_SMC_NCS_WRSETUP(coded_val);
355 	coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
356 						    timings->nwe_setup_ns);
357 	val |= AT91SAM9_SMC_NWESETUP(coded_val);
358 	regmap_fields_write(fields->setup, conf->cs, val);
359 
360 	coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
361 						    timings->ncs_rd_pulse_ns);
362 	val = AT91SAM9_SMC_NCS_NRDPULSE(coded_val);
363 	coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
364 						    timings->nrd_pulse_ns);
365 	val |= AT91SAM9_SMC_NRDPULSE(coded_val);
366 	coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
367 						    timings->ncs_wr_pulse_ns);
368 	val |= AT91SAM9_SMC_NCS_WRPULSE(coded_val);
369 	coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
370 						    timings->nwe_pulse_ns);
371 	val |= AT91SAM9_SMC_NWEPULSE(coded_val);
372 	regmap_fields_write(fields->pulse, conf->cs, val);
373 
374 	coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
375 						    timings->nrd_cycle_ns);
376 	val = AT91SAM9_SMC_NRDCYCLE(coded_val);
377 	coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
378 						    timings->nwe_cycle_ns);
379 	val |= AT91SAM9_SMC_NWECYCLE(coded_val);
380 	regmap_fields_write(fields->cycle, conf->cs, val);
381 
382 	val = DIV_ROUND_UP(timings->tdf_ns, clk_period);
383 	if (val > AT91_SMC_TDF_MAX)
384 		val = AT91_SMC_TDF_MAX;
385 	regmap_fields_write(fields->mode, conf->cs,
386 			    config->mode | AT91_SMC_TDF_(val));
387 
388 	return 0;
389 }
390 
391 static int at91sam9_ebi_init(struct at91_ebi *ebi)
392 {
393 	struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
394 	struct reg_field field = REG_FIELD(0, 0, 31);
395 
396 	field.id_size = fls(ebi->caps->available_cs);
397 	field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
398 
399 	field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
400 	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
401 						field);
402 	if (IS_ERR(fields->setup))
403 		return PTR_ERR(fields->setup);
404 
405 	field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
406 	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
407 						field);
408 	if (IS_ERR(fields->pulse))
409 		return PTR_ERR(fields->pulse);
410 
411 	field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
412 	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
413 						field);
414 	if (IS_ERR(fields->cycle))
415 		return PTR_ERR(fields->cycle);
416 
417 	field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
418 	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
419 					       field);
420 	return PTR_ERR_OR_ZERO(fields->mode);
421 }
422 
423 static int sama5d3_ebi_init(struct at91_ebi *ebi)
424 {
425 	struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
426 	struct reg_field field = REG_FIELD(0, 0, 31);
427 
428 	field.id_size = fls(ebi->caps->available_cs);
429 	field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
430 
431 	field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC);
432 	fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
433 						field);
434 	if (IS_ERR(fields->setup))
435 		return PTR_ERR(fields->setup);
436 
437 	field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC);
438 	fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
439 						field);
440 	if (IS_ERR(fields->pulse))
441 		return PTR_ERR(fields->pulse);
442 
443 	field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC);
444 	fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
445 						field);
446 	if (IS_ERR(fields->cycle))
447 		return PTR_ERR(fields->cycle);
448 
449 	field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC);
450 	fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
451 					       field);
452 	return PTR_ERR_OR_ZERO(fields->mode);
453 }
454 
455 static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
456 			      int reg_cells)
457 {
458 	const struct at91_ebi_caps *caps = ebi->caps;
459 	struct at91_ebi_dev_config conf = { };
460 	struct device *dev = ebi->dev;
461 	struct at91_ebi_dev *ebid;
462 	unsigned long cslines = 0;
463 	int ret, numcs = 0, nentries, i;
464 	bool apply = false;
465 	u32 cs;
466 
467 	nentries = of_property_count_elems_of_size(np, "reg",
468 						   reg_cells * sizeof(u32));
469 	for (i = 0; i < nentries; i++) {
470 		ret = of_property_read_u32_index(np, "reg", i * reg_cells,
471 						 &cs);
472 		if (ret)
473 			return ret;
474 
475 		if (cs >= AT91_MATRIX_EBI_NUM_CS ||
476 		    !(ebi->caps->available_cs & BIT(cs))) {
477 			dev_err(dev, "invalid reg property in %s\n",
478 				np->full_name);
479 			return -EINVAL;
480 		}
481 
482 		if (!test_and_set_bit(cs, &cslines))
483 			numcs++;
484 	}
485 
486 	if (!numcs) {
487 		dev_err(dev, "invalid reg property in %s\n", np->full_name);
488 		return -EINVAL;
489 	}
490 
491 	ebid = devm_kzalloc(ebi->dev,
492 			    sizeof(*ebid) + (numcs * sizeof(*ebid->configs)),
493 			    GFP_KERNEL);
494 	if (!ebid)
495 		return -ENOMEM;
496 
497 	ebid->ebi = ebi;
498 
499 	ret = caps->xlate_config(ebid, np, &conf);
500 	if (ret < 0)
501 		return ret;
502 	else if (ret)
503 		apply = true;
504 
505 	i = 0;
506 	for_each_set_bit(cs, &cslines, AT91_MATRIX_EBI_NUM_CS) {
507 		ebid->configs[i].cs = cs;
508 
509 		if (apply) {
510 			conf.cs = cs;
511 			ret = caps->apply_config(ebid, &conf);
512 			if (ret)
513 				return ret;
514 		}
515 
516 		caps->get_config(ebid, &ebid->configs[i]);
517 
518 		/*
519 		 * Attach the EBI device to the generic SMC logic if at least
520 		 * one "atmel,smc-" property is present.
521 		 */
522 		if (ebi->ebi_csa && apply)
523 			regmap_field_update_bits(ebi->ebi_csa,
524 						 BIT(cs), 0);
525 
526 		i++;
527 	}
528 
529 	list_add_tail(&ebid->node, &ebi->devs);
530 
531 	return 0;
532 }
533 
534 static const struct reg_field at91sam9260_ebi_csa =
535 				REG_FIELD(AT91SAM9260_MATRIX_EBICSA, 0,
536 					  AT91_MATRIX_EBI_NUM_CS - 1);
537 
538 static const struct at91_ebi_caps at91sam9260_ebi_caps = {
539 	.available_cs = 0xff,
540 	.ebi_csa = &at91sam9260_ebi_csa,
541 	.get_config = at91sam9_ebi_get_config,
542 	.xlate_config = at91sam9_ebi_xslate_config,
543 	.apply_config = at91sam9_ebi_apply_config,
544 	.init = at91sam9_ebi_init,
545 };
546 
547 static const struct reg_field at91sam9261_ebi_csa =
548 				REG_FIELD(AT91SAM9261_MATRIX_EBICSA, 0,
549 					  AT91_MATRIX_EBI_NUM_CS - 1);
550 
551 static const struct at91_ebi_caps at91sam9261_ebi_caps = {
552 	.available_cs = 0xff,
553 	.ebi_csa = &at91sam9261_ebi_csa,
554 	.get_config = at91sam9_ebi_get_config,
555 	.xlate_config = at91sam9_ebi_xslate_config,
556 	.apply_config = at91sam9_ebi_apply_config,
557 	.init = at91sam9_ebi_init,
558 };
559 
560 static const struct reg_field at91sam9263_ebi0_csa =
561 				REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA, 0,
562 					  AT91_MATRIX_EBI_NUM_CS - 1);
563 
564 static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
565 	.available_cs = 0x3f,
566 	.ebi_csa = &at91sam9263_ebi0_csa,
567 	.get_config = at91sam9_ebi_get_config,
568 	.xlate_config = at91sam9_ebi_xslate_config,
569 	.apply_config = at91sam9_ebi_apply_config,
570 	.init = at91sam9_ebi_init,
571 };
572 
573 static const struct reg_field at91sam9263_ebi1_csa =
574 				REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA, 0,
575 					  AT91_MATRIX_EBI_NUM_CS - 1);
576 
577 static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
578 	.available_cs = 0x7,
579 	.ebi_csa = &at91sam9263_ebi1_csa,
580 	.get_config = at91sam9_ebi_get_config,
581 	.xlate_config = at91sam9_ebi_xslate_config,
582 	.apply_config = at91sam9_ebi_apply_config,
583 	.init = at91sam9_ebi_init,
584 };
585 
586 static const struct reg_field at91sam9rl_ebi_csa =
587 				REG_FIELD(AT91SAM9RL_MATRIX_EBICSA, 0,
588 					  AT91_MATRIX_EBI_NUM_CS - 1);
589 
590 static const struct at91_ebi_caps at91sam9rl_ebi_caps = {
591 	.available_cs = 0x3f,
592 	.ebi_csa = &at91sam9rl_ebi_csa,
593 	.get_config = at91sam9_ebi_get_config,
594 	.xlate_config = at91sam9_ebi_xslate_config,
595 	.apply_config = at91sam9_ebi_apply_config,
596 	.init = at91sam9_ebi_init,
597 };
598 
599 static const struct reg_field at91sam9g45_ebi_csa =
600 				REG_FIELD(AT91SAM9G45_MATRIX_EBICSA, 0,
601 					  AT91_MATRIX_EBI_NUM_CS - 1);
602 
603 static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
604 	.available_cs = 0x3f,
605 	.ebi_csa = &at91sam9g45_ebi_csa,
606 	.get_config = at91sam9_ebi_get_config,
607 	.xlate_config = at91sam9_ebi_xslate_config,
608 	.apply_config = at91sam9_ebi_apply_config,
609 	.init = at91sam9_ebi_init,
610 };
611 
612 static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
613 	.available_cs = 0x3f,
614 	.ebi_csa = &at91sam9263_ebi0_csa,
615 	.get_config = at91sam9_ebi_get_config,
616 	.xlate_config = at91sam9_ebi_xslate_config,
617 	.apply_config = at91sam9_ebi_apply_config,
618 	.init = at91sam9_ebi_init,
619 };
620 
621 static const struct at91_ebi_caps sama5d3_ebi_caps = {
622 	.available_cs = 0xf,
623 	.get_config = at91sam9_ebi_get_config,
624 	.xlate_config = at91sam9_ebi_xslate_config,
625 	.apply_config = at91sam9_ebi_apply_config,
626 	.init = sama5d3_ebi_init,
627 };
628 
629 static const struct of_device_id at91_ebi_id_table[] = {
630 	{
631 		.compatible = "atmel,at91sam9260-ebi",
632 		.data = &at91sam9260_ebi_caps,
633 	},
634 	{
635 		.compatible = "atmel,at91sam9261-ebi",
636 		.data = &at91sam9261_ebi_caps,
637 	},
638 	{
639 		.compatible = "atmel,at91sam9263-ebi0",
640 		.data = &at91sam9263_ebi0_caps,
641 	},
642 	{
643 		.compatible = "atmel,at91sam9263-ebi1",
644 		.data = &at91sam9263_ebi1_caps,
645 	},
646 	{
647 		.compatible = "atmel,at91sam9rl-ebi",
648 		.data = &at91sam9rl_ebi_caps,
649 	},
650 	{
651 		.compatible = "atmel,at91sam9g45-ebi",
652 		.data = &at91sam9g45_ebi_caps,
653 	},
654 	{
655 		.compatible = "atmel,at91sam9x5-ebi",
656 		.data = &at91sam9x5_ebi_caps,
657 	},
658 	{
659 		.compatible = "atmel,sama5d3-ebi",
660 		.data = &sama5d3_ebi_caps,
661 	},
662 	{ /* sentinel */ }
663 };
664 
665 static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np)
666 {
667 	struct device *dev = ebi->dev;
668 	struct property *newprop;
669 
670 	newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
671 	if (!newprop)
672 		return -ENOMEM;
673 
674 	newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
675 	if (!newprop->name)
676 		return -ENOMEM;
677 
678 	newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
679 	if (!newprop->value)
680 		return -ENOMEM;
681 
682 	newprop->length = sizeof("disabled");
683 
684 	return of_update_property(np, newprop);
685 }
686 
687 static int at91_ebi_probe(struct platform_device *pdev)
688 {
689 	struct device *dev = &pdev->dev;
690 	struct device_node *child, *np = dev->of_node, *smc_np;
691 	const struct of_device_id *match;
692 	struct at91_ebi *ebi;
693 	int ret, reg_cells;
694 	struct clk *clk;
695 	u32 val;
696 
697 	match = of_match_device(at91_ebi_id_table, dev);
698 	if (!match || !match->data)
699 		return -EINVAL;
700 
701 	ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
702 	if (!ebi)
703 		return -ENOMEM;
704 
705 	INIT_LIST_HEAD(&ebi->devs);
706 	ebi->caps = match->data;
707 	ebi->dev = dev;
708 
709 	clk = devm_clk_get(dev, NULL);
710 	if (IS_ERR(clk))
711 		return PTR_ERR(clk);
712 
713 	ebi->clk = clk;
714 
715 	smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0);
716 
717 	ebi->smc.regmap = syscon_node_to_regmap(smc_np);
718 	if (IS_ERR(ebi->smc.regmap))
719 		return PTR_ERR(ebi->smc.regmap);
720 
721 	ebi->smc.clk = of_clk_get(smc_np, 0);
722 	if (IS_ERR(ebi->smc.clk)) {
723 		if (PTR_ERR(ebi->smc.clk) != -ENOENT)
724 			return PTR_ERR(ebi->smc.clk);
725 
726 		ebi->smc.clk = NULL;
727 	}
728 	ret = clk_prepare_enable(ebi->smc.clk);
729 	if (ret)
730 		return ret;
731 
732 	/*
733 	 * The sama5d3 does not provide an EBICSA register and thus does need
734 	 * to access the matrix registers.
735 	 */
736 	if (ebi->caps->ebi_csa) {
737 		ebi->matrix =
738 			syscon_regmap_lookup_by_phandle(np, "atmel,matrix");
739 		if (IS_ERR(ebi->matrix))
740 			return PTR_ERR(ebi->matrix);
741 
742 		ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
743 						  *ebi->caps->ebi_csa);
744 		if (IS_ERR(ebi->ebi_csa))
745 			return PTR_ERR(ebi->ebi_csa);
746 	}
747 
748 	ret = ebi->caps->init(ebi);
749 	if (ret)
750 		return ret;
751 
752 	ret = of_property_read_u32(np, "#address-cells", &val);
753 	if (ret) {
754 		dev_err(dev, "missing #address-cells property\n");
755 		return ret;
756 	}
757 
758 	reg_cells = val;
759 
760 	ret = of_property_read_u32(np, "#size-cells", &val);
761 	if (ret) {
762 		dev_err(dev, "missing #address-cells property\n");
763 		return ret;
764 	}
765 
766 	reg_cells += val;
767 
768 	for_each_available_child_of_node(np, child) {
769 		if (!of_find_property(child, "reg", NULL))
770 			continue;
771 
772 		ret = at91_ebi_dev_setup(ebi, child, reg_cells);
773 		if (ret) {
774 			dev_err(dev, "failed to configure EBI bus for %s, disabling the device",
775 				child->full_name);
776 
777 			ret = at91_ebi_dev_disable(ebi, child);
778 			if (ret)
779 				return ret;
780 		}
781 	}
782 
783 	return of_platform_populate(np, NULL, NULL, dev);
784 }
785 
786 static struct platform_driver at91_ebi_driver = {
787 	.driver = {
788 		.name = "atmel-ebi",
789 		.of_match_table	= at91_ebi_id_table,
790 	},
791 };
792 builtin_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
793