xref: /linux/drivers/media/tuners/max2165_priv.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*c942fddfSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
2ccae7af2SMauro Carvalho Chehab /*
3ccae7af2SMauro Carvalho Chehab  *  Driver for Maxim MAX2165 silicon tuner
4ccae7af2SMauro Carvalho Chehab  *
5ccae7af2SMauro Carvalho Chehab  *  Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com>
6ccae7af2SMauro Carvalho Chehab  */
7ccae7af2SMauro Carvalho Chehab 
8ccae7af2SMauro Carvalho Chehab #ifndef __MAX2165_PRIV_H__
9ccae7af2SMauro Carvalho Chehab #define __MAX2165_PRIV_H__
10ccae7af2SMauro Carvalho Chehab 
11ccae7af2SMauro Carvalho Chehab #define REG_NDIV_INT 0x00
12ccae7af2SMauro Carvalho Chehab #define REG_NDIV_FRAC2 0x01
13ccae7af2SMauro Carvalho Chehab #define REG_NDIV_FRAC1 0x02
14ccae7af2SMauro Carvalho Chehab #define REG_NDIV_FRAC0 0x03
15ccae7af2SMauro Carvalho Chehab #define REG_TRACK_FILTER 0x04
16ccae7af2SMauro Carvalho Chehab #define REG_LNA 0x05
17ccae7af2SMauro Carvalho Chehab #define REG_PLL_CFG 0x06
18ccae7af2SMauro Carvalho Chehab #define REG_TEST 0x07
19ccae7af2SMauro Carvalho Chehab #define REG_SHUTDOWN 0x08
20ccae7af2SMauro Carvalho Chehab #define REG_VCO_CTRL 0x09
21ccae7af2SMauro Carvalho Chehab #define REG_BASEBAND_CTRL 0x0A
22ccae7af2SMauro Carvalho Chehab #define REG_DC_OFFSET_CTRL 0x0B
23ccae7af2SMauro Carvalho Chehab #define REG_DC_OFFSET_DAC 0x0C
24ccae7af2SMauro Carvalho Chehab #define REG_ROM_TABLE_ADDR 0x0D
25ccae7af2SMauro Carvalho Chehab 
26ccae7af2SMauro Carvalho Chehab /* Read Only Registers */
27ccae7af2SMauro Carvalho Chehab #define REG_ROM_TABLE_DATA 0x10
28ccae7af2SMauro Carvalho Chehab #define REG_STATUS 0x11
29ccae7af2SMauro Carvalho Chehab #define REG_AUTOTUNE 0x12
30ccae7af2SMauro Carvalho Chehab 
31ccae7af2SMauro Carvalho Chehab struct max2165_priv {
32ccae7af2SMauro Carvalho Chehab 	struct max2165_config *config;
33ccae7af2SMauro Carvalho Chehab 	struct i2c_adapter *i2c;
34ccae7af2SMauro Carvalho Chehab 
35ccae7af2SMauro Carvalho Chehab 	u32 frequency;
36ccae7af2SMauro Carvalho Chehab 	u32 bandwidth;
37ccae7af2SMauro Carvalho Chehab 
38ccae7af2SMauro Carvalho Chehab 	u8 tf_ntch_low_cfg;
39ccae7af2SMauro Carvalho Chehab 	u8 tf_ntch_hi_cfg;
40ccae7af2SMauro Carvalho Chehab 	u8 tf_balun_low_ref;
41ccae7af2SMauro Carvalho Chehab 	u8 tf_balun_hi_ref;
42ccae7af2SMauro Carvalho Chehab 	u8 bb_filter_7mhz_cfg;
43ccae7af2SMauro Carvalho Chehab 	u8 bb_filter_8mhz_cfg;
44ccae7af2SMauro Carvalho Chehab };
45ccae7af2SMauro Carvalho Chehab 
46ccae7af2SMauro Carvalho Chehab #endif
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