1 /* 2 * Elonics E4000 silicon tuner driver 3 * 4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 */ 20 21 #include "e4000_priv.h" 22 #include <linux/math64.h> 23 24 /* Max transfer size done by I2C transfer functions */ 25 #define MAX_XFER_SIZE 64 26 27 /* write multiple registers */ 28 static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len) 29 { 30 int ret; 31 u8 buf[MAX_XFER_SIZE]; 32 struct i2c_msg msg[1] = { 33 { 34 .addr = priv->cfg->i2c_addr, 35 .flags = 0, 36 .len = 1 + len, 37 .buf = buf, 38 } 39 }; 40 41 if (1 + len > sizeof(buf)) { 42 dev_warn(&priv->i2c->dev, 43 "%s: i2c wr reg=%04x: len=%d is too big!\n", 44 KBUILD_MODNAME, reg, len); 45 return -EINVAL; 46 } 47 48 buf[0] = reg; 49 memcpy(&buf[1], val, len); 50 51 ret = i2c_transfer(priv->i2c, msg, 1); 52 if (ret == 1) { 53 ret = 0; 54 } else { 55 dev_warn(&priv->i2c->dev, 56 "%s: i2c wr failed=%d reg=%02x len=%d\n", 57 KBUILD_MODNAME, ret, reg, len); 58 ret = -EREMOTEIO; 59 } 60 return ret; 61 } 62 63 /* read multiple registers */ 64 static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len) 65 { 66 int ret; 67 u8 buf[MAX_XFER_SIZE]; 68 struct i2c_msg msg[2] = { 69 { 70 .addr = priv->cfg->i2c_addr, 71 .flags = 0, 72 .len = 1, 73 .buf = ®, 74 }, { 75 .addr = priv->cfg->i2c_addr, 76 .flags = I2C_M_RD, 77 .len = len, 78 .buf = buf, 79 } 80 }; 81 82 if (len > sizeof(buf)) { 83 dev_warn(&priv->i2c->dev, 84 "%s: i2c rd reg=%04x: len=%d is too big!\n", 85 KBUILD_MODNAME, reg, len); 86 return -EINVAL; 87 } 88 89 ret = i2c_transfer(priv->i2c, msg, 2); 90 if (ret == 2) { 91 memcpy(val, buf, len); 92 ret = 0; 93 } else { 94 dev_warn(&priv->i2c->dev, 95 "%s: i2c rd failed=%d reg=%02x len=%d\n", 96 KBUILD_MODNAME, ret, reg, len); 97 ret = -EREMOTEIO; 98 } 99 100 return ret; 101 } 102 103 /* write single register */ 104 static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val) 105 { 106 return e4000_wr_regs(priv, reg, &val, 1); 107 } 108 109 /* read single register */ 110 static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val) 111 { 112 return e4000_rd_regs(priv, reg, val, 1); 113 } 114 115 static int e4000_init(struct dvb_frontend *fe) 116 { 117 struct e4000_priv *priv = fe->tuner_priv; 118 int ret; 119 120 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 121 122 if (fe->ops.i2c_gate_ctrl) 123 fe->ops.i2c_gate_ctrl(fe, 1); 124 125 /* dummy I2C to ensure I2C wakes up */ 126 ret = e4000_wr_reg(priv, 0x02, 0x40); 127 128 /* reset */ 129 ret = e4000_wr_reg(priv, 0x00, 0x01); 130 if (ret < 0) 131 goto err; 132 133 /* disable output clock */ 134 ret = e4000_wr_reg(priv, 0x06, 0x00); 135 if (ret < 0) 136 goto err; 137 138 ret = e4000_wr_reg(priv, 0x7a, 0x96); 139 if (ret < 0) 140 goto err; 141 142 /* configure gains */ 143 ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2); 144 if (ret < 0) 145 goto err; 146 147 ret = e4000_wr_reg(priv, 0x82, 0x00); 148 if (ret < 0) 149 goto err; 150 151 ret = e4000_wr_reg(priv, 0x24, 0x05); 152 if (ret < 0) 153 goto err; 154 155 ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2); 156 if (ret < 0) 157 goto err; 158 159 ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2); 160 if (ret < 0) 161 goto err; 162 163 /* DC offset control */ 164 ret = e4000_wr_reg(priv, 0x2d, 0x1f); 165 if (ret < 0) 166 goto err; 167 168 ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2); 169 if (ret < 0) 170 goto err; 171 172 /* gain control */ 173 ret = e4000_wr_reg(priv, 0x1a, 0x17); 174 if (ret < 0) 175 goto err; 176 177 ret = e4000_wr_reg(priv, 0x1f, 0x1a); 178 if (ret < 0) 179 goto err; 180 181 if (fe->ops.i2c_gate_ctrl) 182 fe->ops.i2c_gate_ctrl(fe, 0); 183 184 return 0; 185 err: 186 if (fe->ops.i2c_gate_ctrl) 187 fe->ops.i2c_gate_ctrl(fe, 0); 188 189 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 190 return ret; 191 } 192 193 static int e4000_sleep(struct dvb_frontend *fe) 194 { 195 struct e4000_priv *priv = fe->tuner_priv; 196 int ret; 197 198 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 199 200 if (fe->ops.i2c_gate_ctrl) 201 fe->ops.i2c_gate_ctrl(fe, 1); 202 203 ret = e4000_wr_reg(priv, 0x00, 0x00); 204 if (ret < 0) 205 goto err; 206 207 if (fe->ops.i2c_gate_ctrl) 208 fe->ops.i2c_gate_ctrl(fe, 0); 209 210 return 0; 211 err: 212 if (fe->ops.i2c_gate_ctrl) 213 fe->ops.i2c_gate_ctrl(fe, 0); 214 215 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 216 return ret; 217 } 218 219 static int e4000_set_params(struct dvb_frontend *fe) 220 { 221 struct e4000_priv *priv = fe->tuner_priv; 222 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 223 int ret, i, sigma_delta; 224 unsigned int f_vco; 225 u8 buf[5], i_data[4], q_data[4]; 226 227 dev_dbg(&priv->i2c->dev, 228 "%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n", 229 __func__, c->delivery_system, c->frequency, 230 c->bandwidth_hz); 231 232 if (fe->ops.i2c_gate_ctrl) 233 fe->ops.i2c_gate_ctrl(fe, 1); 234 235 /* gain control manual */ 236 ret = e4000_wr_reg(priv, 0x1a, 0x00); 237 if (ret < 0) 238 goto err; 239 240 /* PLL */ 241 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) { 242 if (c->frequency <= e4000_pll_lut[i].freq) 243 break; 244 } 245 246 if (i == ARRAY_SIZE(e4000_pll_lut)) { 247 ret = -EINVAL; 248 goto err; 249 } 250 251 /* 252 * Note: Currently f_vco overflows when c->frequency is 1 073 741 824 Hz 253 * or more. 254 */ 255 f_vco = c->frequency * e4000_pll_lut[i].mul; 256 sigma_delta = div_u64(0x10000ULL * (f_vco % priv->cfg->clock), priv->cfg->clock); 257 buf[0] = f_vco / priv->cfg->clock; 258 buf[1] = (sigma_delta >> 0) & 0xff; 259 buf[2] = (sigma_delta >> 8) & 0xff; 260 buf[3] = 0x00; 261 buf[4] = e4000_pll_lut[i].div; 262 263 dev_dbg(&priv->i2c->dev, "%s: f_vco=%u pll div=%d sigma_delta=%04x\n", 264 __func__, f_vco, buf[0], sigma_delta); 265 266 ret = e4000_wr_regs(priv, 0x09, buf, 5); 267 if (ret < 0) 268 goto err; 269 270 /* LNA filter (RF filter) */ 271 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) { 272 if (c->frequency <= e400_lna_filter_lut[i].freq) 273 break; 274 } 275 276 if (i == ARRAY_SIZE(e400_lna_filter_lut)) { 277 ret = -EINVAL; 278 goto err; 279 } 280 281 ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val); 282 if (ret < 0) 283 goto err; 284 285 /* IF filters */ 286 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) { 287 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq) 288 break; 289 } 290 291 if (i == ARRAY_SIZE(e4000_if_filter_lut)) { 292 ret = -EINVAL; 293 goto err; 294 } 295 296 buf[0] = e4000_if_filter_lut[i].reg11_val; 297 buf[1] = e4000_if_filter_lut[i].reg12_val; 298 299 ret = e4000_wr_regs(priv, 0x11, buf, 2); 300 if (ret < 0) 301 goto err; 302 303 /* frequency band */ 304 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) { 305 if (c->frequency <= e4000_band_lut[i].freq) 306 break; 307 } 308 309 if (i == ARRAY_SIZE(e4000_band_lut)) { 310 ret = -EINVAL; 311 goto err; 312 } 313 314 ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val); 315 if (ret < 0) 316 goto err; 317 318 ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val); 319 if (ret < 0) 320 goto err; 321 322 /* DC offset */ 323 for (i = 0; i < 4; i++) { 324 if (i == 0) 325 ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3); 326 else if (i == 1) 327 ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2); 328 else if (i == 2) 329 ret = e4000_wr_regs(priv, 0x15, "\x01", 1); 330 else 331 ret = e4000_wr_regs(priv, 0x16, "\x7e", 1); 332 333 if (ret < 0) 334 goto err; 335 336 ret = e4000_wr_reg(priv, 0x29, 0x01); 337 if (ret < 0) 338 goto err; 339 340 ret = e4000_rd_regs(priv, 0x2a, buf, 3); 341 if (ret < 0) 342 goto err; 343 344 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f); 345 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f); 346 } 347 348 swap(q_data[2], q_data[3]); 349 swap(i_data[2], i_data[3]); 350 351 ret = e4000_wr_regs(priv, 0x50, q_data, 4); 352 if (ret < 0) 353 goto err; 354 355 ret = e4000_wr_regs(priv, 0x60, i_data, 4); 356 if (ret < 0) 357 goto err; 358 359 /* gain control auto */ 360 ret = e4000_wr_reg(priv, 0x1a, 0x17); 361 if (ret < 0) 362 goto err; 363 364 if (fe->ops.i2c_gate_ctrl) 365 fe->ops.i2c_gate_ctrl(fe, 0); 366 367 return 0; 368 err: 369 if (fe->ops.i2c_gate_ctrl) 370 fe->ops.i2c_gate_ctrl(fe, 0); 371 372 dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret); 373 return ret; 374 } 375 376 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) 377 { 378 struct e4000_priv *priv = fe->tuner_priv; 379 380 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 381 382 *frequency = 0; /* Zero-IF */ 383 384 return 0; 385 } 386 387 static int e4000_release(struct dvb_frontend *fe) 388 { 389 struct e4000_priv *priv = fe->tuner_priv; 390 391 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 392 393 kfree(fe->tuner_priv); 394 395 return 0; 396 } 397 398 static const struct dvb_tuner_ops e4000_tuner_ops = { 399 .info = { 400 .name = "Elonics E4000", 401 .frequency_min = 174000000, 402 .frequency_max = 862000000, 403 }, 404 405 .release = e4000_release, 406 407 .init = e4000_init, 408 .sleep = e4000_sleep, 409 .set_params = e4000_set_params, 410 411 .get_if_frequency = e4000_get_if_frequency, 412 }; 413 414 struct dvb_frontend *e4000_attach(struct dvb_frontend *fe, 415 struct i2c_adapter *i2c, const struct e4000_config *cfg) 416 { 417 struct e4000_priv *priv; 418 int ret; 419 u8 chip_id; 420 421 if (fe->ops.i2c_gate_ctrl) 422 fe->ops.i2c_gate_ctrl(fe, 1); 423 424 priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL); 425 if (!priv) { 426 ret = -ENOMEM; 427 dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 428 goto err; 429 } 430 431 priv->cfg = cfg; 432 priv->i2c = i2c; 433 434 /* check if the tuner is there */ 435 ret = e4000_rd_reg(priv, 0x02, &chip_id); 436 if (ret < 0) 437 goto err; 438 439 dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id); 440 441 if (chip_id != 0x40) 442 goto err; 443 444 /* put sleep as chip seems to be in normal mode by default */ 445 ret = e4000_wr_reg(priv, 0x00, 0x00); 446 if (ret < 0) 447 goto err; 448 449 dev_info(&priv->i2c->dev, 450 "%s: Elonics E4000 successfully identified\n", 451 KBUILD_MODNAME); 452 453 fe->tuner_priv = priv; 454 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops, 455 sizeof(struct dvb_tuner_ops)); 456 457 if (fe->ops.i2c_gate_ctrl) 458 fe->ops.i2c_gate_ctrl(fe, 0); 459 460 return fe; 461 err: 462 if (fe->ops.i2c_gate_ctrl) 463 fe->ops.i2c_gate_ctrl(fe, 0); 464 465 dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret); 466 kfree(priv); 467 return NULL; 468 } 469 EXPORT_SYMBOL(e4000_attach); 470 471 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver"); 472 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 473 MODULE_LICENSE("GPL"); 474