1 /* 2 * Elonics E4000 silicon tuner driver 3 * 4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 */ 20 21 #include "e4000_priv.h" 22 #include <linux/math64.h> 23 24 static int e4000_init(struct dvb_frontend *fe) 25 { 26 struct e4000 *s = fe->tuner_priv; 27 int ret; 28 29 dev_dbg(&s->client->dev, "%s:\n", __func__); 30 31 /* dummy I2C to ensure I2C wakes up */ 32 ret = regmap_write(s->regmap, 0x02, 0x40); 33 34 /* reset */ 35 ret = regmap_write(s->regmap, 0x00, 0x01); 36 if (ret) 37 goto err; 38 39 /* disable output clock */ 40 ret = regmap_write(s->regmap, 0x06, 0x00); 41 if (ret) 42 goto err; 43 44 ret = regmap_write(s->regmap, 0x7a, 0x96); 45 if (ret) 46 goto err; 47 48 /* configure gains */ 49 ret = regmap_bulk_write(s->regmap, 0x7e, "\x01\xfe", 2); 50 if (ret) 51 goto err; 52 53 ret = regmap_write(s->regmap, 0x82, 0x00); 54 if (ret) 55 goto err; 56 57 ret = regmap_write(s->regmap, 0x24, 0x05); 58 if (ret) 59 goto err; 60 61 ret = regmap_bulk_write(s->regmap, 0x87, "\x20\x01", 2); 62 if (ret) 63 goto err; 64 65 ret = regmap_bulk_write(s->regmap, 0x9f, "\x7f\x07", 2); 66 if (ret) 67 goto err; 68 69 /* DC offset control */ 70 ret = regmap_write(s->regmap, 0x2d, 0x1f); 71 if (ret) 72 goto err; 73 74 ret = regmap_bulk_write(s->regmap, 0x70, "\x01\x01", 2); 75 if (ret) 76 goto err; 77 78 /* gain control */ 79 ret = regmap_write(s->regmap, 0x1a, 0x17); 80 if (ret) 81 goto err; 82 83 ret = regmap_write(s->regmap, 0x1f, 0x1a); 84 if (ret) 85 goto err; 86 87 s->active = true; 88 err: 89 if (ret) 90 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 91 92 return ret; 93 } 94 95 static int e4000_sleep(struct dvb_frontend *fe) 96 { 97 struct e4000 *s = fe->tuner_priv; 98 int ret; 99 100 dev_dbg(&s->client->dev, "%s:\n", __func__); 101 102 s->active = false; 103 104 ret = regmap_write(s->regmap, 0x00, 0x00); 105 if (ret) 106 goto err; 107 err: 108 if (ret) 109 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 110 111 return ret; 112 } 113 114 static int e4000_set_params(struct dvb_frontend *fe) 115 { 116 struct e4000 *s = fe->tuner_priv; 117 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 118 int ret, i, sigma_delta; 119 unsigned int pll_n, pll_f; 120 u64 f_vco; 121 u8 buf[5], i_data[4], q_data[4]; 122 123 dev_dbg(&s->client->dev, 124 "%s: delivery_system=%d frequency=%u bandwidth_hz=%u\n", 125 __func__, c->delivery_system, c->frequency, 126 c->bandwidth_hz); 127 128 /* gain control manual */ 129 ret = regmap_write(s->regmap, 0x1a, 0x00); 130 if (ret) 131 goto err; 132 133 /* PLL */ 134 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) { 135 if (c->frequency <= e4000_pll_lut[i].freq) 136 break; 137 } 138 139 if (i == ARRAY_SIZE(e4000_pll_lut)) { 140 ret = -EINVAL; 141 goto err; 142 } 143 144 f_vco = 1ull * c->frequency * e4000_pll_lut[i].mul; 145 pll_n = div_u64_rem(f_vco, s->clock, &pll_f); 146 sigma_delta = div_u64(0x10000ULL * pll_f, s->clock); 147 buf[0] = pll_n; 148 buf[1] = (sigma_delta >> 0) & 0xff; 149 buf[2] = (sigma_delta >> 8) & 0xff; 150 buf[3] = 0x00; 151 buf[4] = e4000_pll_lut[i].div; 152 153 dev_dbg(&s->client->dev, 154 "%s: f_vco=%llu pll div=%d sigma_delta=%04x\n", 155 __func__, f_vco, buf[0], sigma_delta); 156 157 ret = regmap_bulk_write(s->regmap, 0x09, buf, 5); 158 if (ret) 159 goto err; 160 161 /* LNA filter (RF filter) */ 162 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) { 163 if (c->frequency <= e400_lna_filter_lut[i].freq) 164 break; 165 } 166 167 if (i == ARRAY_SIZE(e400_lna_filter_lut)) { 168 ret = -EINVAL; 169 goto err; 170 } 171 172 ret = regmap_write(s->regmap, 0x10, e400_lna_filter_lut[i].val); 173 if (ret) 174 goto err; 175 176 /* IF filters */ 177 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) { 178 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq) 179 break; 180 } 181 182 if (i == ARRAY_SIZE(e4000_if_filter_lut)) { 183 ret = -EINVAL; 184 goto err; 185 } 186 187 buf[0] = e4000_if_filter_lut[i].reg11_val; 188 buf[1] = e4000_if_filter_lut[i].reg12_val; 189 190 ret = regmap_bulk_write(s->regmap, 0x11, buf, 2); 191 if (ret) 192 goto err; 193 194 /* frequency band */ 195 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) { 196 if (c->frequency <= e4000_band_lut[i].freq) 197 break; 198 } 199 200 if (i == ARRAY_SIZE(e4000_band_lut)) { 201 ret = -EINVAL; 202 goto err; 203 } 204 205 ret = regmap_write(s->regmap, 0x07, e4000_band_lut[i].reg07_val); 206 if (ret) 207 goto err; 208 209 ret = regmap_write(s->regmap, 0x78, e4000_band_lut[i].reg78_val); 210 if (ret) 211 goto err; 212 213 /* DC offset */ 214 for (i = 0; i < 4; i++) { 215 if (i == 0) 216 ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7e\x24", 3); 217 else if (i == 1) 218 ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7f", 2); 219 else if (i == 2) 220 ret = regmap_bulk_write(s->regmap, 0x15, "\x01", 1); 221 else 222 ret = regmap_bulk_write(s->regmap, 0x16, "\x7e", 1); 223 224 if (ret) 225 goto err; 226 227 ret = regmap_write(s->regmap, 0x29, 0x01); 228 if (ret) 229 goto err; 230 231 ret = regmap_bulk_read(s->regmap, 0x2a, buf, 3); 232 if (ret) 233 goto err; 234 235 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f); 236 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f); 237 } 238 239 swap(q_data[2], q_data[3]); 240 swap(i_data[2], i_data[3]); 241 242 ret = regmap_bulk_write(s->regmap, 0x50, q_data, 4); 243 if (ret) 244 goto err; 245 246 ret = regmap_bulk_write(s->regmap, 0x60, i_data, 4); 247 if (ret) 248 goto err; 249 250 /* gain control auto */ 251 ret = regmap_write(s->regmap, 0x1a, 0x17); 252 if (ret) 253 goto err; 254 err: 255 if (ret) 256 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 257 258 return ret; 259 } 260 261 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) 262 { 263 struct e4000 *s = fe->tuner_priv; 264 265 dev_dbg(&s->client->dev, "%s:\n", __func__); 266 267 *frequency = 0; /* Zero-IF */ 268 269 return 0; 270 } 271 272 #if IS_ENABLED(CONFIG_VIDEO_V4L2) 273 static int e4000_set_lna_gain(struct dvb_frontend *fe) 274 { 275 struct e4000 *s = fe->tuner_priv; 276 int ret; 277 u8 u8tmp; 278 279 dev_dbg(&s->client->dev, "%s: lna auto=%d->%d val=%d->%d\n", 280 __func__, s->lna_gain_auto->cur.val, 281 s->lna_gain_auto->val, s->lna_gain->cur.val, 282 s->lna_gain->val); 283 284 if (s->lna_gain_auto->val && s->if_gain_auto->cur.val) 285 u8tmp = 0x17; 286 else if (s->lna_gain_auto->val) 287 u8tmp = 0x19; 288 else if (s->if_gain_auto->cur.val) 289 u8tmp = 0x16; 290 else 291 u8tmp = 0x10; 292 293 ret = regmap_write(s->regmap, 0x1a, u8tmp); 294 if (ret) 295 goto err; 296 297 if (s->lna_gain_auto->val == false) { 298 ret = regmap_write(s->regmap, 0x14, s->lna_gain->val); 299 if (ret) 300 goto err; 301 } 302 err: 303 if (ret) 304 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 305 306 return ret; 307 } 308 309 static int e4000_set_mixer_gain(struct dvb_frontend *fe) 310 { 311 struct e4000 *s = fe->tuner_priv; 312 int ret; 313 u8 u8tmp; 314 315 dev_dbg(&s->client->dev, "%s: mixer auto=%d->%d val=%d->%d\n", 316 __func__, s->mixer_gain_auto->cur.val, 317 s->mixer_gain_auto->val, s->mixer_gain->cur.val, 318 s->mixer_gain->val); 319 320 if (s->mixer_gain_auto->val) 321 u8tmp = 0x15; 322 else 323 u8tmp = 0x14; 324 325 ret = regmap_write(s->regmap, 0x20, u8tmp); 326 if (ret) 327 goto err; 328 329 if (s->mixer_gain_auto->val == false) { 330 ret = regmap_write(s->regmap, 0x15, s->mixer_gain->val); 331 if (ret) 332 goto err; 333 } 334 err: 335 if (ret) 336 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 337 338 return ret; 339 } 340 341 static int e4000_set_if_gain(struct dvb_frontend *fe) 342 { 343 struct e4000 *s = fe->tuner_priv; 344 int ret; 345 u8 buf[2]; 346 u8 u8tmp; 347 348 dev_dbg(&s->client->dev, "%s: if auto=%d->%d val=%d->%d\n", 349 __func__, s->if_gain_auto->cur.val, 350 s->if_gain_auto->val, s->if_gain->cur.val, 351 s->if_gain->val); 352 353 if (s->if_gain_auto->val && s->lna_gain_auto->cur.val) 354 u8tmp = 0x17; 355 else if (s->lna_gain_auto->cur.val) 356 u8tmp = 0x19; 357 else if (s->if_gain_auto->val) 358 u8tmp = 0x16; 359 else 360 u8tmp = 0x10; 361 362 ret = regmap_write(s->regmap, 0x1a, u8tmp); 363 if (ret) 364 goto err; 365 366 if (s->if_gain_auto->val == false) { 367 buf[0] = e4000_if_gain_lut[s->if_gain->val].reg16_val; 368 buf[1] = e4000_if_gain_lut[s->if_gain->val].reg17_val; 369 ret = regmap_bulk_write(s->regmap, 0x16, buf, 2); 370 if (ret) 371 goto err; 372 } 373 err: 374 if (ret) 375 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 376 377 return ret; 378 } 379 380 static int e4000_pll_lock(struct dvb_frontend *fe) 381 { 382 struct e4000 *s = fe->tuner_priv; 383 int ret; 384 unsigned int utmp; 385 386 ret = regmap_read(s->regmap, 0x07, &utmp); 387 if (ret) 388 goto err; 389 390 s->pll_lock->val = (utmp & 0x01); 391 err: 392 if (ret) 393 dev_dbg(&s->client->dev, "%s: failed=%d\n", __func__, ret); 394 395 return ret; 396 } 397 398 static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl) 399 { 400 struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl); 401 int ret; 402 403 if (s->active == false) 404 return 0; 405 406 switch (ctrl->id) { 407 case V4L2_CID_RF_TUNER_PLL_LOCK: 408 ret = e4000_pll_lock(s->fe); 409 break; 410 default: 411 dev_dbg(&s->client->dev, "%s: unknown ctrl: id=%d name=%s\n", 412 __func__, ctrl->id, ctrl->name); 413 ret = -EINVAL; 414 } 415 416 return ret; 417 } 418 419 static int e4000_s_ctrl(struct v4l2_ctrl *ctrl) 420 { 421 struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl); 422 struct dvb_frontend *fe = s->fe; 423 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 424 int ret; 425 426 if (s->active == false) 427 return 0; 428 429 switch (ctrl->id) { 430 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO: 431 case V4L2_CID_RF_TUNER_BANDWIDTH: 432 c->bandwidth_hz = s->bandwidth->val; 433 ret = e4000_set_params(s->fe); 434 break; 435 case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO: 436 case V4L2_CID_RF_TUNER_LNA_GAIN: 437 ret = e4000_set_lna_gain(s->fe); 438 break; 439 case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO: 440 case V4L2_CID_RF_TUNER_MIXER_GAIN: 441 ret = e4000_set_mixer_gain(s->fe); 442 break; 443 case V4L2_CID_RF_TUNER_IF_GAIN_AUTO: 444 case V4L2_CID_RF_TUNER_IF_GAIN: 445 ret = e4000_set_if_gain(s->fe); 446 break; 447 default: 448 dev_dbg(&s->client->dev, "%s: unknown ctrl: id=%d name=%s\n", 449 __func__, ctrl->id, ctrl->name); 450 ret = -EINVAL; 451 } 452 453 return ret; 454 } 455 456 static const struct v4l2_ctrl_ops e4000_ctrl_ops = { 457 .g_volatile_ctrl = e4000_g_volatile_ctrl, 458 .s_ctrl = e4000_s_ctrl, 459 }; 460 #endif 461 462 static const struct dvb_tuner_ops e4000_tuner_ops = { 463 .info = { 464 .name = "Elonics E4000", 465 .frequency_min = 174000000, 466 .frequency_max = 862000000, 467 }, 468 469 .init = e4000_init, 470 .sleep = e4000_sleep, 471 .set_params = e4000_set_params, 472 473 .get_if_frequency = e4000_get_if_frequency, 474 }; 475 476 /* 477 * Use V4L2 subdev to carry V4L2 control handler, even we don't implement 478 * subdev itself, just to avoid reinventing the wheel. 479 */ 480 static int e4000_probe(struct i2c_client *client, 481 const struct i2c_device_id *id) 482 { 483 struct e4000_config *cfg = client->dev.platform_data; 484 struct dvb_frontend *fe = cfg->fe; 485 struct e4000 *s; 486 int ret; 487 unsigned int utmp; 488 static const struct regmap_config regmap_config = { 489 .reg_bits = 8, 490 .val_bits = 8, 491 .max_register = 0xff, 492 }; 493 494 s = kzalloc(sizeof(struct e4000), GFP_KERNEL); 495 if (!s) { 496 ret = -ENOMEM; 497 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME); 498 goto err; 499 } 500 501 s->clock = cfg->clock; 502 s->client = client; 503 s->fe = cfg->fe; 504 s->regmap = devm_regmap_init_i2c(client, ®map_config); 505 if (IS_ERR(s->regmap)) { 506 ret = PTR_ERR(s->regmap); 507 goto err; 508 } 509 510 /* check if the tuner is there */ 511 ret = regmap_read(s->regmap, 0x02, &utmp); 512 if (ret) 513 goto err; 514 515 dev_dbg(&s->client->dev, "%s: chip id=%02x\n", __func__, utmp); 516 517 if (utmp != 0x40) { 518 ret = -ENODEV; 519 goto err; 520 } 521 522 /* put sleep as chip seems to be in normal mode by default */ 523 ret = regmap_write(s->regmap, 0x00, 0x00); 524 if (ret) 525 goto err; 526 527 #if IS_ENABLED(CONFIG_VIDEO_V4L2) 528 /* Register controls */ 529 v4l2_ctrl_handler_init(&s->hdl, 9); 530 s->bandwidth_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 531 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1); 532 s->bandwidth = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 533 V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000); 534 v4l2_ctrl_auto_cluster(2, &s->bandwidth_auto, 0, false); 535 s->lna_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 536 V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1); 537 s->lna_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 538 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10); 539 v4l2_ctrl_auto_cluster(2, &s->lna_gain_auto, 0, false); 540 s->mixer_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 541 V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1); 542 s->mixer_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 543 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1); 544 v4l2_ctrl_auto_cluster(2, &s->mixer_gain_auto, 0, false); 545 s->if_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 546 V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1); 547 s->if_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 548 V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0); 549 v4l2_ctrl_auto_cluster(2, &s->if_gain_auto, 0, false); 550 s->pll_lock = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops, 551 V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0); 552 if (s->hdl.error) { 553 ret = s->hdl.error; 554 dev_err(&s->client->dev, "Could not initialize controls\n"); 555 v4l2_ctrl_handler_free(&s->hdl); 556 goto err; 557 } 558 559 s->sd.ctrl_handler = &s->hdl; 560 #endif 561 562 dev_info(&s->client->dev, 563 "%s: Elonics E4000 successfully identified\n", 564 KBUILD_MODNAME); 565 566 fe->tuner_priv = s; 567 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops, 568 sizeof(struct dvb_tuner_ops)); 569 570 v4l2_set_subdevdata(&s->sd, client); 571 i2c_set_clientdata(client, &s->sd); 572 573 return 0; 574 err: 575 if (ret) { 576 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret); 577 kfree(s); 578 } 579 580 return ret; 581 } 582 583 static int e4000_remove(struct i2c_client *client) 584 { 585 struct v4l2_subdev *sd = i2c_get_clientdata(client); 586 struct e4000 *s = container_of(sd, struct e4000, sd); 587 struct dvb_frontend *fe = s->fe; 588 589 dev_dbg(&client->dev, "%s:\n", __func__); 590 591 #if IS_ENABLED(CONFIG_VIDEO_V4L2) 592 v4l2_ctrl_handler_free(&s->hdl); 593 #endif 594 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops)); 595 fe->tuner_priv = NULL; 596 kfree(s); 597 598 return 0; 599 } 600 601 static const struct i2c_device_id e4000_id[] = { 602 {"e4000", 0}, 603 {} 604 }; 605 MODULE_DEVICE_TABLE(i2c, e4000_id); 606 607 static struct i2c_driver e4000_driver = { 608 .driver = { 609 .owner = THIS_MODULE, 610 .name = "e4000", 611 }, 612 .probe = e4000_probe, 613 .remove = e4000_remove, 614 .id_table = e4000_id, 615 }; 616 617 module_i2c_driver(e4000_driver); 618 619 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver"); 620 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>"); 621 MODULE_LICENSE("GPL"); 622