1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Xilinx Video IP Composite Device 4 * 5 * Copyright (C) 2013-2015 Ideas on Board 6 * Copyright (C) 2013-2015 Xilinx, Inc. 7 * 8 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com> 9 * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10 */ 11 12 #ifndef __XILINX_VIPP_H__ 13 #define __XILINX_VIPP_H__ 14 15 #include <linux/list.h> 16 #include <linux/mutex.h> 17 #include <media/media-device.h> 18 #include <media/v4l2-async.h> 19 #include <media/v4l2-ctrls.h> 20 #include <media/v4l2-device.h> 21 22 /** 23 * struct xvip_composite_device - Xilinx Video IP device structure 24 * @v4l2_dev: V4L2 device 25 * @media_dev: media device 26 * @dev: (OF) device 27 * @notifier: V4L2 asynchronous subdevs notifier 28 * @dmas: list of DMA channels at the pipeline output and input 29 * @v4l2_caps: V4L2 capabilities of the whole device (see VIDIOC_QUERYCAP) 30 */ 31 struct xvip_composite_device { 32 struct v4l2_device v4l2_dev; 33 struct media_device media_dev; 34 struct device *dev; 35 36 struct v4l2_async_notifier notifier; 37 38 struct list_head dmas; 39 u32 v4l2_caps; 40 }; 41 42 #endif /* __XILINX_VIPP_H__ */ 43