1*8148baabSPratyush Yadav /* SPDX-License-Identifier: GPL-2.0-only */
2*8148baabSPratyush Yadav /*
3*8148baabSPratyush Yadav * Copyright (c) 2013 Texas Instruments Inc.
4*8148baabSPratyush Yadav *
5*8148baabSPratyush Yadav * David Griego, <dagriego@biglakesoftware.com>
6*8148baabSPratyush Yadav * Dale Farnsworth, <dale@farnsworth.org>
7*8148baabSPratyush Yadav * Archit Taneja, <archit@ti.com>
8*8148baabSPratyush Yadav */
9*8148baabSPratyush Yadav
10*8148baabSPratyush Yadav #ifndef _TI_VPDMA_PRIV_H_
11*8148baabSPratyush Yadav #define _TI_VPDMA_PRIV_H_
12*8148baabSPratyush Yadav
13*8148baabSPratyush Yadav /*
14*8148baabSPratyush Yadav * VPDMA Register offsets
15*8148baabSPratyush Yadav */
16*8148baabSPratyush Yadav
17*8148baabSPratyush Yadav /* Top level */
18*8148baabSPratyush Yadav #define VPDMA_PID 0x00
19*8148baabSPratyush Yadav #define VPDMA_LIST_ADDR 0x04
20*8148baabSPratyush Yadav #define VPDMA_LIST_ATTR 0x08
21*8148baabSPratyush Yadav #define VPDMA_LIST_STAT_SYNC 0x0c
22*8148baabSPratyush Yadav #define VPDMA_BG_RGB 0x18
23*8148baabSPratyush Yadav #define VPDMA_BG_YUV 0x1c
24*8148baabSPratyush Yadav #define VPDMA_SETUP 0x30
25*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE1 0x34
26*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE2 0x38
27*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE3 0x3c
28*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE_WIDTH_MASK 0xffff
29*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE_WIDTH_SHFT 16
30*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE_HEIGHT_MASK 0xffff
31*8148baabSPratyush Yadav #define VPDMA_MAX_SIZE_HEIGHT_SHFT 0
32*8148baabSPratyush Yadav
33*8148baabSPratyush Yadav /* Interrupts */
34*8148baabSPratyush Yadav #define VPDMA_INT_CHAN_STAT(grp) (0x40 + grp * 8)
35*8148baabSPratyush Yadav #define VPDMA_INT_CHAN_MASK(grp) (VPDMA_INT_CHAN_STAT(grp) + 4)
36*8148baabSPratyush Yadav #define VPDMA_INT_CLIENT0_STAT 0x78
37*8148baabSPratyush Yadav #define VPDMA_INT_CLIENT0_MASK 0x7c
38*8148baabSPratyush Yadav #define VPDMA_INT_CLIENT1_STAT 0x80
39*8148baabSPratyush Yadav #define VPDMA_INT_CLIENT1_MASK 0x84
40*8148baabSPratyush Yadav #define VPDMA_INT_LIST0_STAT 0x88
41*8148baabSPratyush Yadav #define VPDMA_INT_LIST0_MASK 0x8c
42*8148baabSPratyush Yadav
43*8148baabSPratyush Yadav #define VPDMA_INTX_OFFSET 0x50
44*8148baabSPratyush Yadav
45*8148baabSPratyush Yadav #define VPDMA_PERFMON(i) (0x200 + i * 4)
46*8148baabSPratyush Yadav
47*8148baabSPratyush Yadav /* VIP/VPE client registers */
48*8148baabSPratyush Yadav #define VPDMA_DEI_CHROMA1_CSTAT 0x0300
49*8148baabSPratyush Yadav #define VPDMA_DEI_LUMA1_CSTAT 0x0304
50*8148baabSPratyush Yadav #define VPDMA_DEI_LUMA2_CSTAT 0x0308
51*8148baabSPratyush Yadav #define VPDMA_DEI_CHROMA2_CSTAT 0x030c
52*8148baabSPratyush Yadav #define VPDMA_DEI_LUMA3_CSTAT 0x0310
53*8148baabSPratyush Yadav #define VPDMA_DEI_CHROMA3_CSTAT 0x0314
54*8148baabSPratyush Yadav #define VPDMA_DEI_MV_IN_CSTAT 0x0330
55*8148baabSPratyush Yadav #define VPDMA_DEI_MV_OUT_CSTAT 0x033c
56*8148baabSPratyush Yadav #define VPDMA_VIP_LO_Y_CSTAT 0x0388
57*8148baabSPratyush Yadav #define VPDMA_VIP_LO_UV_CSTAT 0x038c
58*8148baabSPratyush Yadav #define VPDMA_VIP_UP_Y_CSTAT 0x0390
59*8148baabSPratyush Yadav #define VPDMA_VIP_UP_UV_CSTAT 0x0394
60*8148baabSPratyush Yadav #define VPDMA_VPI_CTL_CSTAT 0x03d0
61*8148baabSPratyush Yadav
62*8148baabSPratyush Yadav /* Reg field info for VPDMA_CLIENT_CSTAT registers */
63*8148baabSPratyush Yadav #define VPDMA_CSTAT_LINE_MODE_MASK 0x03
64*8148baabSPratyush Yadav #define VPDMA_CSTAT_LINE_MODE_SHIFT 8
65*8148baabSPratyush Yadav #define VPDMA_CSTAT_FRAME_START_MASK 0xf
66*8148baabSPratyush Yadav #define VPDMA_CSTAT_FRAME_START_SHIFT 10
67*8148baabSPratyush Yadav
68*8148baabSPratyush Yadav #define VPDMA_LIST_NUM_MASK 0x07
69*8148baabSPratyush Yadav #define VPDMA_LIST_NUM_SHFT 24
70*8148baabSPratyush Yadav #define VPDMA_LIST_STOP_SHFT 20
71*8148baabSPratyush Yadav #define VPDMA_LIST_RDY_MASK 0x01
72*8148baabSPratyush Yadav #define VPDMA_LIST_RDY_SHFT 19
73*8148baabSPratyush Yadav #define VPDMA_LIST_TYPE_MASK 0x03
74*8148baabSPratyush Yadav #define VPDMA_LIST_TYPE_SHFT 16
75*8148baabSPratyush Yadav #define VPDMA_LIST_SIZE_MASK 0xffff
76*8148baabSPratyush Yadav
77*8148baabSPratyush Yadav /*
78*8148baabSPratyush Yadav * The YUV data type definition below are taken from
79*8148baabSPratyush Yadav * both the TRM and i839 Errata information.
80*8148baabSPratyush Yadav * Use the correct data type considering byte
81*8148baabSPratyush Yadav * reordering of components.
82*8148baabSPratyush Yadav *
83*8148baabSPratyush Yadav * Also since the single use of "C" in the 422 case
84*8148baabSPratyush Yadav * to mean "Cr" (i.e. V component). It was decided
85*8148baabSPratyush Yadav * to explicitly label them CR to remove any confusion.
86*8148baabSPratyush Yadav * Bear in mind that the type label refer to the memory
87*8148baabSPratyush Yadav * packed order (LSB - MSB).
88*8148baabSPratyush Yadav */
89*8148baabSPratyush Yadav #define DATA_TYPE_Y444 0x0
90*8148baabSPratyush Yadav #define DATA_TYPE_Y422 0x1
91*8148baabSPratyush Yadav #define DATA_TYPE_Y420 0x2
92*8148baabSPratyush Yadav #define DATA_TYPE_C444 0x4
93*8148baabSPratyush Yadav #define DATA_TYPE_C422 0x5
94*8148baabSPratyush Yadav #define DATA_TYPE_C420 0x6
95*8148baabSPratyush Yadav #define DATA_TYPE_CB420 0x16
96*8148baabSPratyush Yadav #define DATA_TYPE_YC444 0x8
97*8148baabSPratyush Yadav #define DATA_TYPE_YCB422 0x7
98*8148baabSPratyush Yadav #define DATA_TYPE_YCR422 0x17
99*8148baabSPratyush Yadav #define DATA_TYPE_CBY422 0x27
100*8148baabSPratyush Yadav #define DATA_TYPE_CRY422 0x37
101*8148baabSPratyush Yadav
102*8148baabSPratyush Yadav /*
103*8148baabSPratyush Yadav * The RGB data type definition below are defined
104*8148baabSPratyush Yadav * to follow Errata i819.
105*8148baabSPratyush Yadav * The initial values were taken from:
106*8148baabSPratyush Yadav * VPDMA_data_type_mapping_v0.2vayu_c.pdf
107*8148baabSPratyush Yadav * But some of the ARGB definition appeared to be wrong
108*8148baabSPratyush Yadav * in the document also. As they would yield RGBA instead.
109*8148baabSPratyush Yadav * They have been corrected based on experimentation.
110*8148baabSPratyush Yadav */
111*8148baabSPratyush Yadav #define DATA_TYPE_RGB16_565 0x10
112*8148baabSPratyush Yadav #define DATA_TYPE_ARGB_1555 0x13
113*8148baabSPratyush Yadav #define DATA_TYPE_ARGB_4444 0x14
114*8148baabSPratyush Yadav #define DATA_TYPE_RGBA_5551 0x11
115*8148baabSPratyush Yadav #define DATA_TYPE_RGBA_4444 0x12
116*8148baabSPratyush Yadav #define DATA_TYPE_ARGB24_6666 0x18
117*8148baabSPratyush Yadav #define DATA_TYPE_RGB24_888 0x16
118*8148baabSPratyush Yadav #define DATA_TYPE_ARGB32_8888 0x17
119*8148baabSPratyush Yadav #define DATA_TYPE_RGBA24_6666 0x15
120*8148baabSPratyush Yadav #define DATA_TYPE_RGBA32_8888 0x19
121*8148baabSPratyush Yadav #define DATA_TYPE_BGR16_565 0x0
122*8148baabSPratyush Yadav #define DATA_TYPE_ABGR_1555 0x3
123*8148baabSPratyush Yadav #define DATA_TYPE_ABGR_4444 0x4
124*8148baabSPratyush Yadav #define DATA_TYPE_BGRA_5551 0x1
125*8148baabSPratyush Yadav #define DATA_TYPE_BGRA_4444 0x2
126*8148baabSPratyush Yadav #define DATA_TYPE_ABGR24_6666 0x8
127*8148baabSPratyush Yadav #define DATA_TYPE_BGR24_888 0x6
128*8148baabSPratyush Yadav #define DATA_TYPE_ABGR32_8888 0x7
129*8148baabSPratyush Yadav #define DATA_TYPE_BGRA24_6666 0x5
130*8148baabSPratyush Yadav #define DATA_TYPE_BGRA32_8888 0x9
131*8148baabSPratyush Yadav
132*8148baabSPratyush Yadav #define DATA_TYPE_MV 0x3
133*8148baabSPratyush Yadav
134*8148baabSPratyush Yadav /* VPDMA channel numbers, some are common between VIP/VPE and appear twice */
135*8148baabSPratyush Yadav #define VPE_CHAN_NUM_LUMA1_IN 0
136*8148baabSPratyush Yadav #define VPE_CHAN_NUM_CHROMA1_IN 1
137*8148baabSPratyush Yadav #define VPE_CHAN_NUM_LUMA2_IN 2
138*8148baabSPratyush Yadav #define VPE_CHAN_NUM_CHROMA2_IN 3
139*8148baabSPratyush Yadav #define VPE_CHAN_NUM_LUMA3_IN 4
140*8148baabSPratyush Yadav #define VPE_CHAN_NUM_CHROMA3_IN 5
141*8148baabSPratyush Yadav #define VPE_CHAN_NUM_MV_IN 12
142*8148baabSPratyush Yadav #define VPE_CHAN_NUM_MV_OUT 15
143*8148baabSPratyush Yadav #define VIP1_CHAN_NUM_MULT_PORT_A_SRC0 38
144*8148baabSPratyush Yadav #define VIP1_CHAN_NUM_MULT_ANC_A_SRC0 70
145*8148baabSPratyush Yadav #define VPE_CHAN_NUM_LUMA_OUT 102
146*8148baabSPratyush Yadav #define VPE_CHAN_NUM_CHROMA_OUT 103
147*8148baabSPratyush Yadav #define VIP1_CHAN_NUM_PORT_A_LUMA 102
148*8148baabSPratyush Yadav #define VIP1_CHAN_NUM_PORT_A_CHROMA 103
149*8148baabSPratyush Yadav #define VPE_CHAN_NUM_RGB_OUT 106
150*8148baabSPratyush Yadav #define VIP1_CHAN_NUM_PORT_A_RGB 106
151*8148baabSPratyush Yadav #define VIP1_CHAN_NUM_PORT_B_RGB 107
152*8148baabSPratyush Yadav /*
153*8148baabSPratyush Yadav * a VPDMA address data block payload for a configuration descriptor needs to
154*8148baabSPratyush Yadav * have each sub block length as a multiple of 16 bytes. Therefore, the overall
155*8148baabSPratyush Yadav * size of the payload also needs to be a multiple of 16 bytes. The sub block
156*8148baabSPratyush Yadav * lengths should be ensured to be aligned by the VPDMA user.
157*8148baabSPratyush Yadav */
158*8148baabSPratyush Yadav #define VPDMA_ADB_SIZE_ALIGN 0x0f
159*8148baabSPratyush Yadav
160*8148baabSPratyush Yadav /*
161*8148baabSPratyush Yadav * data transfer descriptor
162*8148baabSPratyush Yadav */
163*8148baabSPratyush Yadav struct vpdma_dtd {
164*8148baabSPratyush Yadav u32 type_ctl_stride;
165*8148baabSPratyush Yadav union {
166*8148baabSPratyush Yadav u32 xfer_length_height;
167*8148baabSPratyush Yadav u32 w1;
168*8148baabSPratyush Yadav };
169*8148baabSPratyush Yadav u32 start_addr;
170*8148baabSPratyush Yadav u32 pkt_ctl;
171*8148baabSPratyush Yadav union {
172*8148baabSPratyush Yadav u32 frame_width_height; /* inbound */
173*8148baabSPratyush Yadav u32 desc_write_addr; /* outbound */
174*8148baabSPratyush Yadav };
175*8148baabSPratyush Yadav union {
176*8148baabSPratyush Yadav u32 start_h_v; /* inbound */
177*8148baabSPratyush Yadav u32 max_width_height; /* outbound */
178*8148baabSPratyush Yadav };
179*8148baabSPratyush Yadav u32 client_attr0;
180*8148baabSPratyush Yadav u32 client_attr1;
181*8148baabSPratyush Yadav };
182*8148baabSPratyush Yadav
183*8148baabSPratyush Yadav /* Data Transfer Descriptor specifics */
184*8148baabSPratyush Yadav #define DTD_NO_NOTIFY 0
185*8148baabSPratyush Yadav #define DTD_NOTIFY 1
186*8148baabSPratyush Yadav
187*8148baabSPratyush Yadav #define DTD_PKT_TYPE 0xa
188*8148baabSPratyush Yadav #define DTD_DIR_IN 0
189*8148baabSPratyush Yadav #define DTD_DIR_OUT 1
190*8148baabSPratyush Yadav
191*8148baabSPratyush Yadav /* type_ctl_stride */
192*8148baabSPratyush Yadav #define DTD_DATA_TYPE_MASK 0x3f
193*8148baabSPratyush Yadav #define DTD_DATA_TYPE_SHFT 26
194*8148baabSPratyush Yadav #define DTD_NOTIFY_MASK 0x01
195*8148baabSPratyush Yadav #define DTD_NOTIFY_SHFT 25
196*8148baabSPratyush Yadav #define DTD_FIELD_MASK 0x01
197*8148baabSPratyush Yadav #define DTD_FIELD_SHFT 24
198*8148baabSPratyush Yadav #define DTD_1D_MASK 0x01
199*8148baabSPratyush Yadav #define DTD_1D_SHFT 23
200*8148baabSPratyush Yadav #define DTD_EVEN_LINE_SKIP_MASK 0x01
201*8148baabSPratyush Yadav #define DTD_EVEN_LINE_SKIP_SHFT 20
202*8148baabSPratyush Yadav #define DTD_ODD_LINE_SKIP_MASK 0x01
203*8148baabSPratyush Yadav #define DTD_ODD_LINE_SKIP_SHFT 16
204*8148baabSPratyush Yadav #define DTD_LINE_STRIDE_MASK 0xffff
205*8148baabSPratyush Yadav #define DTD_LINE_STRIDE_SHFT 0
206*8148baabSPratyush Yadav
207*8148baabSPratyush Yadav /* xfer_length_height */
208*8148baabSPratyush Yadav #define DTD_LINE_LENGTH_MASK 0xffff
209*8148baabSPratyush Yadav #define DTD_LINE_LENGTH_SHFT 16
210*8148baabSPratyush Yadav #define DTD_XFER_HEIGHT_MASK 0xffff
211*8148baabSPratyush Yadav #define DTD_XFER_HEIGHT_SHFT 0
212*8148baabSPratyush Yadav
213*8148baabSPratyush Yadav /* pkt_ctl */
214*8148baabSPratyush Yadav #define DTD_PKT_TYPE_MASK 0x1f
215*8148baabSPratyush Yadav #define DTD_PKT_TYPE_SHFT 27
216*8148baabSPratyush Yadav #define DTD_MODE_MASK 0x01
217*8148baabSPratyush Yadav #define DTD_MODE_SHFT 26
218*8148baabSPratyush Yadav #define DTD_DIR_MASK 0x01
219*8148baabSPratyush Yadav #define DTD_DIR_SHFT 25
220*8148baabSPratyush Yadav #define DTD_CHAN_MASK 0x01ff
221*8148baabSPratyush Yadav #define DTD_CHAN_SHFT 16
222*8148baabSPratyush Yadav #define DTD_PRI_MASK 0x0f
223*8148baabSPratyush Yadav #define DTD_PRI_SHFT 9
224*8148baabSPratyush Yadav #define DTD_NEXT_CHAN_MASK 0x01ff
225*8148baabSPratyush Yadav #define DTD_NEXT_CHAN_SHFT 0
226*8148baabSPratyush Yadav
227*8148baabSPratyush Yadav /* frame_width_height */
228*8148baabSPratyush Yadav #define DTD_FRAME_WIDTH_MASK 0xffff
229*8148baabSPratyush Yadav #define DTD_FRAME_WIDTH_SHFT 16
230*8148baabSPratyush Yadav #define DTD_FRAME_HEIGHT_MASK 0xffff
231*8148baabSPratyush Yadav #define DTD_FRAME_HEIGHT_SHFT 0
232*8148baabSPratyush Yadav
233*8148baabSPratyush Yadav /* start_h_v */
234*8148baabSPratyush Yadav #define DTD_H_START_MASK 0xffff
235*8148baabSPratyush Yadav #define DTD_H_START_SHFT 16
236*8148baabSPratyush Yadav #define DTD_V_START_MASK 0xffff
237*8148baabSPratyush Yadav #define DTD_V_START_SHFT 0
238*8148baabSPratyush Yadav
239*8148baabSPratyush Yadav #define DTD_DESC_START_MASK 0xffffffe0
240*8148baabSPratyush Yadav #define DTD_DESC_START_SHIFT 5
241*8148baabSPratyush Yadav #define DTD_WRITE_DESC_MASK 0x01
242*8148baabSPratyush Yadav #define DTD_WRITE_DESC_SHIFT 2
243*8148baabSPratyush Yadav #define DTD_DROP_DATA_MASK 0x01
244*8148baabSPratyush Yadav #define DTD_DROP_DATA_SHIFT 1
245*8148baabSPratyush Yadav #define DTD_USE_DESC_MASK 0x01
246*8148baabSPratyush Yadav #define DTD_USE_DESC_SHIFT 0
247*8148baabSPratyush Yadav
248*8148baabSPratyush Yadav /* max_width_height */
249*8148baabSPratyush Yadav #define DTD_MAX_WIDTH_MASK 0x07
250*8148baabSPratyush Yadav #define DTD_MAX_WIDTH_SHFT 4
251*8148baabSPratyush Yadav #define DTD_MAX_HEIGHT_MASK 0x07
252*8148baabSPratyush Yadav #define DTD_MAX_HEIGHT_SHFT 0
253*8148baabSPratyush Yadav
dtd_type_ctl_stride(int type,bool notify,int field,bool one_d,bool even_line_skip,bool odd_line_skip,int line_stride)254*8148baabSPratyush Yadav static inline u32 dtd_type_ctl_stride(int type, bool notify, int field,
255*8148baabSPratyush Yadav bool one_d, bool even_line_skip, bool odd_line_skip,
256*8148baabSPratyush Yadav int line_stride)
257*8148baabSPratyush Yadav {
258*8148baabSPratyush Yadav return (type << DTD_DATA_TYPE_SHFT) | (notify << DTD_NOTIFY_SHFT) |
259*8148baabSPratyush Yadav (field << DTD_FIELD_SHFT) | (one_d << DTD_1D_SHFT) |
260*8148baabSPratyush Yadav (even_line_skip << DTD_EVEN_LINE_SKIP_SHFT) |
261*8148baabSPratyush Yadav (odd_line_skip << DTD_ODD_LINE_SKIP_SHFT) |
262*8148baabSPratyush Yadav line_stride;
263*8148baabSPratyush Yadav }
264*8148baabSPratyush Yadav
dtd_xfer_length_height(int line_length,int xfer_height)265*8148baabSPratyush Yadav static inline u32 dtd_xfer_length_height(int line_length, int xfer_height)
266*8148baabSPratyush Yadav {
267*8148baabSPratyush Yadav return (line_length << DTD_LINE_LENGTH_SHFT) | xfer_height;
268*8148baabSPratyush Yadav }
269*8148baabSPratyush Yadav
dtd_pkt_ctl(bool mode,bool dir,int chan,int pri,int next_chan)270*8148baabSPratyush Yadav static inline u32 dtd_pkt_ctl(bool mode, bool dir, int chan, int pri,
271*8148baabSPratyush Yadav int next_chan)
272*8148baabSPratyush Yadav {
273*8148baabSPratyush Yadav return (DTD_PKT_TYPE << DTD_PKT_TYPE_SHFT) | (mode << DTD_MODE_SHFT) |
274*8148baabSPratyush Yadav (dir << DTD_DIR_SHFT) | (chan << DTD_CHAN_SHFT) |
275*8148baabSPratyush Yadav (pri << DTD_PRI_SHFT) | next_chan;
276*8148baabSPratyush Yadav }
277*8148baabSPratyush Yadav
dtd_frame_width_height(int width,int height)278*8148baabSPratyush Yadav static inline u32 dtd_frame_width_height(int width, int height)
279*8148baabSPratyush Yadav {
280*8148baabSPratyush Yadav return (width << DTD_FRAME_WIDTH_SHFT) | height;
281*8148baabSPratyush Yadav }
282*8148baabSPratyush Yadav
dtd_desc_write_addr(unsigned int addr,bool write_desc,bool drop_data,bool use_desc)283*8148baabSPratyush Yadav static inline u32 dtd_desc_write_addr(unsigned int addr, bool write_desc,
284*8148baabSPratyush Yadav bool drop_data, bool use_desc)
285*8148baabSPratyush Yadav {
286*8148baabSPratyush Yadav return (addr & DTD_DESC_START_MASK) |
287*8148baabSPratyush Yadav (write_desc << DTD_WRITE_DESC_SHIFT) |
288*8148baabSPratyush Yadav (drop_data << DTD_DROP_DATA_SHIFT) |
289*8148baabSPratyush Yadav use_desc;
290*8148baabSPratyush Yadav }
291*8148baabSPratyush Yadav
dtd_start_h_v(int h_start,int v_start)292*8148baabSPratyush Yadav static inline u32 dtd_start_h_v(int h_start, int v_start)
293*8148baabSPratyush Yadav {
294*8148baabSPratyush Yadav return (h_start << DTD_H_START_SHFT) | v_start;
295*8148baabSPratyush Yadav }
296*8148baabSPratyush Yadav
dtd_max_width_height(int max_width,int max_height)297*8148baabSPratyush Yadav static inline u32 dtd_max_width_height(int max_width, int max_height)
298*8148baabSPratyush Yadav {
299*8148baabSPratyush Yadav return (max_width << DTD_MAX_WIDTH_SHFT) | max_height;
300*8148baabSPratyush Yadav }
301*8148baabSPratyush Yadav
dtd_get_data_type(struct vpdma_dtd * dtd)302*8148baabSPratyush Yadav static inline int dtd_get_data_type(struct vpdma_dtd *dtd)
303*8148baabSPratyush Yadav {
304*8148baabSPratyush Yadav return dtd->type_ctl_stride >> DTD_DATA_TYPE_SHFT;
305*8148baabSPratyush Yadav }
306*8148baabSPratyush Yadav
dtd_get_notify(struct vpdma_dtd * dtd)307*8148baabSPratyush Yadav static inline bool dtd_get_notify(struct vpdma_dtd *dtd)
308*8148baabSPratyush Yadav {
309*8148baabSPratyush Yadav return (dtd->type_ctl_stride >> DTD_NOTIFY_SHFT) & DTD_NOTIFY_MASK;
310*8148baabSPratyush Yadav }
311*8148baabSPratyush Yadav
dtd_get_field(struct vpdma_dtd * dtd)312*8148baabSPratyush Yadav static inline int dtd_get_field(struct vpdma_dtd *dtd)
313*8148baabSPratyush Yadav {
314*8148baabSPratyush Yadav return (dtd->type_ctl_stride >> DTD_FIELD_SHFT) & DTD_FIELD_MASK;
315*8148baabSPratyush Yadav }
316*8148baabSPratyush Yadav
dtd_get_1d(struct vpdma_dtd * dtd)317*8148baabSPratyush Yadav static inline bool dtd_get_1d(struct vpdma_dtd *dtd)
318*8148baabSPratyush Yadav {
319*8148baabSPratyush Yadav return (dtd->type_ctl_stride >> DTD_1D_SHFT) & DTD_1D_MASK;
320*8148baabSPratyush Yadav }
321*8148baabSPratyush Yadav
dtd_get_even_line_skip(struct vpdma_dtd * dtd)322*8148baabSPratyush Yadav static inline bool dtd_get_even_line_skip(struct vpdma_dtd *dtd)
323*8148baabSPratyush Yadav {
324*8148baabSPratyush Yadav return (dtd->type_ctl_stride >> DTD_EVEN_LINE_SKIP_SHFT)
325*8148baabSPratyush Yadav & DTD_EVEN_LINE_SKIP_MASK;
326*8148baabSPratyush Yadav }
327*8148baabSPratyush Yadav
dtd_get_odd_line_skip(struct vpdma_dtd * dtd)328*8148baabSPratyush Yadav static inline bool dtd_get_odd_line_skip(struct vpdma_dtd *dtd)
329*8148baabSPratyush Yadav {
330*8148baabSPratyush Yadav return (dtd->type_ctl_stride >> DTD_ODD_LINE_SKIP_SHFT)
331*8148baabSPratyush Yadav & DTD_ODD_LINE_SKIP_MASK;
332*8148baabSPratyush Yadav }
333*8148baabSPratyush Yadav
dtd_get_line_stride(struct vpdma_dtd * dtd)334*8148baabSPratyush Yadav static inline int dtd_get_line_stride(struct vpdma_dtd *dtd)
335*8148baabSPratyush Yadav {
336*8148baabSPratyush Yadav return dtd->type_ctl_stride & DTD_LINE_STRIDE_MASK;
337*8148baabSPratyush Yadav }
338*8148baabSPratyush Yadav
dtd_get_line_length(struct vpdma_dtd * dtd)339*8148baabSPratyush Yadav static inline int dtd_get_line_length(struct vpdma_dtd *dtd)
340*8148baabSPratyush Yadav {
341*8148baabSPratyush Yadav return dtd->xfer_length_height >> DTD_LINE_LENGTH_SHFT;
342*8148baabSPratyush Yadav }
343*8148baabSPratyush Yadav
dtd_get_xfer_height(struct vpdma_dtd * dtd)344*8148baabSPratyush Yadav static inline int dtd_get_xfer_height(struct vpdma_dtd *dtd)
345*8148baabSPratyush Yadav {
346*8148baabSPratyush Yadav return dtd->xfer_length_height & DTD_XFER_HEIGHT_MASK;
347*8148baabSPratyush Yadav }
348*8148baabSPratyush Yadav
dtd_get_pkt_type(struct vpdma_dtd * dtd)349*8148baabSPratyush Yadav static inline int dtd_get_pkt_type(struct vpdma_dtd *dtd)
350*8148baabSPratyush Yadav {
351*8148baabSPratyush Yadav return dtd->pkt_ctl >> DTD_PKT_TYPE_SHFT;
352*8148baabSPratyush Yadav }
353*8148baabSPratyush Yadav
dtd_get_mode(struct vpdma_dtd * dtd)354*8148baabSPratyush Yadav static inline bool dtd_get_mode(struct vpdma_dtd *dtd)
355*8148baabSPratyush Yadav {
356*8148baabSPratyush Yadav return (dtd->pkt_ctl >> DTD_MODE_SHFT) & DTD_MODE_MASK;
357*8148baabSPratyush Yadav }
358*8148baabSPratyush Yadav
dtd_get_dir(struct vpdma_dtd * dtd)359*8148baabSPratyush Yadav static inline bool dtd_get_dir(struct vpdma_dtd *dtd)
360*8148baabSPratyush Yadav {
361*8148baabSPratyush Yadav return (dtd->pkt_ctl >> DTD_DIR_SHFT) & DTD_DIR_MASK;
362*8148baabSPratyush Yadav }
363*8148baabSPratyush Yadav
dtd_get_chan(struct vpdma_dtd * dtd)364*8148baabSPratyush Yadav static inline int dtd_get_chan(struct vpdma_dtd *dtd)
365*8148baabSPratyush Yadav {
366*8148baabSPratyush Yadav return (dtd->pkt_ctl >> DTD_CHAN_SHFT) & DTD_CHAN_MASK;
367*8148baabSPratyush Yadav }
368*8148baabSPratyush Yadav
dtd_get_priority(struct vpdma_dtd * dtd)369*8148baabSPratyush Yadav static inline int dtd_get_priority(struct vpdma_dtd *dtd)
370*8148baabSPratyush Yadav {
371*8148baabSPratyush Yadav return (dtd->pkt_ctl >> DTD_PRI_SHFT) & DTD_PRI_MASK;
372*8148baabSPratyush Yadav }
373*8148baabSPratyush Yadav
dtd_get_next_chan(struct vpdma_dtd * dtd)374*8148baabSPratyush Yadav static inline int dtd_get_next_chan(struct vpdma_dtd *dtd)
375*8148baabSPratyush Yadav {
376*8148baabSPratyush Yadav return (dtd->pkt_ctl >> DTD_NEXT_CHAN_SHFT) & DTD_NEXT_CHAN_MASK;
377*8148baabSPratyush Yadav }
378*8148baabSPratyush Yadav
dtd_get_frame_width(struct vpdma_dtd * dtd)379*8148baabSPratyush Yadav static inline int dtd_get_frame_width(struct vpdma_dtd *dtd)
380*8148baabSPratyush Yadav {
381*8148baabSPratyush Yadav return dtd->frame_width_height >> DTD_FRAME_WIDTH_SHFT;
382*8148baabSPratyush Yadav }
383*8148baabSPratyush Yadav
dtd_get_frame_height(struct vpdma_dtd * dtd)384*8148baabSPratyush Yadav static inline int dtd_get_frame_height(struct vpdma_dtd *dtd)
385*8148baabSPratyush Yadav {
386*8148baabSPratyush Yadav return dtd->frame_width_height & DTD_FRAME_HEIGHT_MASK;
387*8148baabSPratyush Yadav }
388*8148baabSPratyush Yadav
dtd_get_desc_write_addr(struct vpdma_dtd * dtd)389*8148baabSPratyush Yadav static inline int dtd_get_desc_write_addr(struct vpdma_dtd *dtd)
390*8148baabSPratyush Yadav {
391*8148baabSPratyush Yadav return dtd->desc_write_addr & DTD_DESC_START_MASK;
392*8148baabSPratyush Yadav }
393*8148baabSPratyush Yadav
dtd_get_write_desc(struct vpdma_dtd * dtd)394*8148baabSPratyush Yadav static inline bool dtd_get_write_desc(struct vpdma_dtd *dtd)
395*8148baabSPratyush Yadav {
396*8148baabSPratyush Yadav return (dtd->desc_write_addr >> DTD_WRITE_DESC_SHIFT) &
397*8148baabSPratyush Yadav DTD_WRITE_DESC_MASK;
398*8148baabSPratyush Yadav }
399*8148baabSPratyush Yadav
dtd_get_drop_data(struct vpdma_dtd * dtd)400*8148baabSPratyush Yadav static inline bool dtd_get_drop_data(struct vpdma_dtd *dtd)
401*8148baabSPratyush Yadav {
402*8148baabSPratyush Yadav return (dtd->desc_write_addr >> DTD_DROP_DATA_SHIFT) &
403*8148baabSPratyush Yadav DTD_DROP_DATA_MASK;
404*8148baabSPratyush Yadav }
405*8148baabSPratyush Yadav
dtd_get_use_desc(struct vpdma_dtd * dtd)406*8148baabSPratyush Yadav static inline bool dtd_get_use_desc(struct vpdma_dtd *dtd)
407*8148baabSPratyush Yadav {
408*8148baabSPratyush Yadav return dtd->desc_write_addr & DTD_USE_DESC_MASK;
409*8148baabSPratyush Yadav }
410*8148baabSPratyush Yadav
dtd_get_h_start(struct vpdma_dtd * dtd)411*8148baabSPratyush Yadav static inline int dtd_get_h_start(struct vpdma_dtd *dtd)
412*8148baabSPratyush Yadav {
413*8148baabSPratyush Yadav return dtd->start_h_v >> DTD_H_START_SHFT;
414*8148baabSPratyush Yadav }
415*8148baabSPratyush Yadav
dtd_get_v_start(struct vpdma_dtd * dtd)416*8148baabSPratyush Yadav static inline int dtd_get_v_start(struct vpdma_dtd *dtd)
417*8148baabSPratyush Yadav {
418*8148baabSPratyush Yadav return dtd->start_h_v & DTD_V_START_MASK;
419*8148baabSPratyush Yadav }
420*8148baabSPratyush Yadav
dtd_get_max_width(struct vpdma_dtd * dtd)421*8148baabSPratyush Yadav static inline int dtd_get_max_width(struct vpdma_dtd *dtd)
422*8148baabSPratyush Yadav {
423*8148baabSPratyush Yadav return (dtd->max_width_height >> DTD_MAX_WIDTH_SHFT) &
424*8148baabSPratyush Yadav DTD_MAX_WIDTH_MASK;
425*8148baabSPratyush Yadav }
426*8148baabSPratyush Yadav
dtd_get_max_height(struct vpdma_dtd * dtd)427*8148baabSPratyush Yadav static inline int dtd_get_max_height(struct vpdma_dtd *dtd)
428*8148baabSPratyush Yadav {
429*8148baabSPratyush Yadav return (dtd->max_width_height >> DTD_MAX_HEIGHT_SHFT) &
430*8148baabSPratyush Yadav DTD_MAX_HEIGHT_MASK;
431*8148baabSPratyush Yadav }
432*8148baabSPratyush Yadav
433*8148baabSPratyush Yadav /*
434*8148baabSPratyush Yadav * configuration descriptor
435*8148baabSPratyush Yadav */
436*8148baabSPratyush Yadav struct vpdma_cfd {
437*8148baabSPratyush Yadav union {
438*8148baabSPratyush Yadav u32 dest_addr_offset;
439*8148baabSPratyush Yadav u32 w0;
440*8148baabSPratyush Yadav };
441*8148baabSPratyush Yadav union {
442*8148baabSPratyush Yadav u32 block_len; /* in words */
443*8148baabSPratyush Yadav u32 w1;
444*8148baabSPratyush Yadav };
445*8148baabSPratyush Yadav u32 payload_addr;
446*8148baabSPratyush Yadav u32 ctl_payload_len; /* in words */
447*8148baabSPratyush Yadav };
448*8148baabSPratyush Yadav
449*8148baabSPratyush Yadav /* Configuration descriptor specifics */
450*8148baabSPratyush Yadav
451*8148baabSPratyush Yadav #define CFD_PKT_TYPE 0xb
452*8148baabSPratyush Yadav
453*8148baabSPratyush Yadav #define CFD_DIRECT 1
454*8148baabSPratyush Yadav #define CFD_INDIRECT 0
455*8148baabSPratyush Yadav #define CFD_CLS_ADB 0
456*8148baabSPratyush Yadav #define CFD_CLS_BLOCK 1
457*8148baabSPratyush Yadav
458*8148baabSPratyush Yadav /* block_len */
459*8148baabSPratyush Yadav #define CFD__BLOCK_LEN_MASK 0xffff
460*8148baabSPratyush Yadav #define CFD__BLOCK_LEN_SHFT 0
461*8148baabSPratyush Yadav
462*8148baabSPratyush Yadav /* ctl_payload_len */
463*8148baabSPratyush Yadav #define CFD_PKT_TYPE_MASK 0x1f
464*8148baabSPratyush Yadav #define CFD_PKT_TYPE_SHFT 27
465*8148baabSPratyush Yadav #define CFD_DIRECT_MASK 0x01
466*8148baabSPratyush Yadav #define CFD_DIRECT_SHFT 26
467*8148baabSPratyush Yadav #define CFD_CLASS_MASK 0x03
468*8148baabSPratyush Yadav #define CFD_CLASS_SHFT 24
469*8148baabSPratyush Yadav #define CFD_DEST_MASK 0xff
470*8148baabSPratyush Yadav #define CFD_DEST_SHFT 16
471*8148baabSPratyush Yadav #define CFD_PAYLOAD_LEN_MASK 0xffff
472*8148baabSPratyush Yadav #define CFD_PAYLOAD_LEN_SHFT 0
473*8148baabSPratyush Yadav
cfd_pkt_payload_len(bool direct,int cls,int dest,int payload_len)474*8148baabSPratyush Yadav static inline u32 cfd_pkt_payload_len(bool direct, int cls, int dest,
475*8148baabSPratyush Yadav int payload_len)
476*8148baabSPratyush Yadav {
477*8148baabSPratyush Yadav return (CFD_PKT_TYPE << CFD_PKT_TYPE_SHFT) |
478*8148baabSPratyush Yadav (direct << CFD_DIRECT_SHFT) |
479*8148baabSPratyush Yadav (cls << CFD_CLASS_SHFT) |
480*8148baabSPratyush Yadav (dest << CFD_DEST_SHFT) |
481*8148baabSPratyush Yadav payload_len;
482*8148baabSPratyush Yadav }
483*8148baabSPratyush Yadav
cfd_get_pkt_type(struct vpdma_cfd * cfd)484*8148baabSPratyush Yadav static inline int cfd_get_pkt_type(struct vpdma_cfd *cfd)
485*8148baabSPratyush Yadav {
486*8148baabSPratyush Yadav return cfd->ctl_payload_len >> CFD_PKT_TYPE_SHFT;
487*8148baabSPratyush Yadav }
488*8148baabSPratyush Yadav
cfd_get_direct(struct vpdma_cfd * cfd)489*8148baabSPratyush Yadav static inline bool cfd_get_direct(struct vpdma_cfd *cfd)
490*8148baabSPratyush Yadav {
491*8148baabSPratyush Yadav return (cfd->ctl_payload_len >> CFD_DIRECT_SHFT) & CFD_DIRECT_MASK;
492*8148baabSPratyush Yadav }
493*8148baabSPratyush Yadav
cfd_get_class(struct vpdma_cfd * cfd)494*8148baabSPratyush Yadav static inline bool cfd_get_class(struct vpdma_cfd *cfd)
495*8148baabSPratyush Yadav {
496*8148baabSPratyush Yadav return (cfd->ctl_payload_len >> CFD_CLASS_SHFT) & CFD_CLASS_MASK;
497*8148baabSPratyush Yadav }
498*8148baabSPratyush Yadav
cfd_get_dest(struct vpdma_cfd * cfd)499*8148baabSPratyush Yadav static inline int cfd_get_dest(struct vpdma_cfd *cfd)
500*8148baabSPratyush Yadav {
501*8148baabSPratyush Yadav return (cfd->ctl_payload_len >> CFD_DEST_SHFT) & CFD_DEST_MASK;
502*8148baabSPratyush Yadav }
503*8148baabSPratyush Yadav
cfd_get_payload_len(struct vpdma_cfd * cfd)504*8148baabSPratyush Yadav static inline int cfd_get_payload_len(struct vpdma_cfd *cfd)
505*8148baabSPratyush Yadav {
506*8148baabSPratyush Yadav return cfd->ctl_payload_len & CFD_PAYLOAD_LEN_MASK;
507*8148baabSPratyush Yadav }
508*8148baabSPratyush Yadav
509*8148baabSPratyush Yadav /*
510*8148baabSPratyush Yadav * control descriptor
511*8148baabSPratyush Yadav */
512*8148baabSPratyush Yadav struct vpdma_ctd {
513*8148baabSPratyush Yadav union {
514*8148baabSPratyush Yadav u32 timer_value;
515*8148baabSPratyush Yadav u32 list_addr;
516*8148baabSPratyush Yadav u32 w0;
517*8148baabSPratyush Yadav };
518*8148baabSPratyush Yadav union {
519*8148baabSPratyush Yadav u32 pixel_line_count;
520*8148baabSPratyush Yadav u32 list_size;
521*8148baabSPratyush Yadav u32 w1;
522*8148baabSPratyush Yadav };
523*8148baabSPratyush Yadav union {
524*8148baabSPratyush Yadav u32 event;
525*8148baabSPratyush Yadav u32 fid_ctl;
526*8148baabSPratyush Yadav u32 w2;
527*8148baabSPratyush Yadav };
528*8148baabSPratyush Yadav u32 type_source_ctl;
529*8148baabSPratyush Yadav };
530*8148baabSPratyush Yadav
531*8148baabSPratyush Yadav /* control descriptor types */
532*8148baabSPratyush Yadav #define CTD_TYPE_SYNC_ON_CLIENT 0
533*8148baabSPratyush Yadav #define CTD_TYPE_SYNC_ON_LIST 1
534*8148baabSPratyush Yadav #define CTD_TYPE_SYNC_ON_EXT 2
535*8148baabSPratyush Yadav #define CTD_TYPE_SYNC_ON_LM_TIMER 3
536*8148baabSPratyush Yadav #define CTD_TYPE_SYNC_ON_CHANNEL 4
537*8148baabSPratyush Yadav #define CTD_TYPE_CHNG_CLIENT_IRQ 5
538*8148baabSPratyush Yadav #define CTD_TYPE_SEND_IRQ 6
539*8148baabSPratyush Yadav #define CTD_TYPE_RELOAD_LIST 7
540*8148baabSPratyush Yadav #define CTD_TYPE_ABORT_CHANNEL 8
541*8148baabSPratyush Yadav
542*8148baabSPratyush Yadav #define CTD_PKT_TYPE 0xc
543*8148baabSPratyush Yadav
544*8148baabSPratyush Yadav /* timer_value */
545*8148baabSPratyush Yadav #define CTD_TIMER_VALUE_MASK 0xffff
546*8148baabSPratyush Yadav #define CTD_TIMER_VALUE_SHFT 0
547*8148baabSPratyush Yadav
548*8148baabSPratyush Yadav /* pixel_line_count */
549*8148baabSPratyush Yadav #define CTD_PIXEL_COUNT_MASK 0xffff
550*8148baabSPratyush Yadav #define CTD_PIXEL_COUNT_SHFT 16
551*8148baabSPratyush Yadav #define CTD_LINE_COUNT_MASK 0xffff
552*8148baabSPratyush Yadav #define CTD_LINE_COUNT_SHFT 0
553*8148baabSPratyush Yadav
554*8148baabSPratyush Yadav /* list_size */
555*8148baabSPratyush Yadav #define CTD_LIST_SIZE_MASK 0xffff
556*8148baabSPratyush Yadav #define CTD_LIST_SIZE_SHFT 0
557*8148baabSPratyush Yadav
558*8148baabSPratyush Yadav /* event */
559*8148baabSPratyush Yadav #define CTD_EVENT_MASK 0x0f
560*8148baabSPratyush Yadav #define CTD_EVENT_SHFT 0
561*8148baabSPratyush Yadav
562*8148baabSPratyush Yadav /* fid_ctl */
563*8148baabSPratyush Yadav #define CTD_FID2_MASK 0x03
564*8148baabSPratyush Yadav #define CTD_FID2_SHFT 4
565*8148baabSPratyush Yadav #define CTD_FID1_MASK 0x03
566*8148baabSPratyush Yadav #define CTD_FID1_SHFT 2
567*8148baabSPratyush Yadav #define CTD_FID0_MASK 0x03
568*8148baabSPratyush Yadav #define CTD_FID0_SHFT 0
569*8148baabSPratyush Yadav
570*8148baabSPratyush Yadav /* type_source_ctl */
571*8148baabSPratyush Yadav #define CTD_PKT_TYPE_MASK 0x1f
572*8148baabSPratyush Yadav #define CTD_PKT_TYPE_SHFT 27
573*8148baabSPratyush Yadav #define CTD_SOURCE_MASK 0xff
574*8148baabSPratyush Yadav #define CTD_SOURCE_SHFT 16
575*8148baabSPratyush Yadav #define CTD_CONTROL_MASK 0x0f
576*8148baabSPratyush Yadav #define CTD_CONTROL_SHFT 0
577*8148baabSPratyush Yadav
ctd_pixel_line_count(int pixel_count,int line_count)578*8148baabSPratyush Yadav static inline u32 ctd_pixel_line_count(int pixel_count, int line_count)
579*8148baabSPratyush Yadav {
580*8148baabSPratyush Yadav return (pixel_count << CTD_PIXEL_COUNT_SHFT) | line_count;
581*8148baabSPratyush Yadav }
582*8148baabSPratyush Yadav
ctd_set_fid_ctl(int fid0,int fid1,int fid2)583*8148baabSPratyush Yadav static inline u32 ctd_set_fid_ctl(int fid0, int fid1, int fid2)
584*8148baabSPratyush Yadav {
585*8148baabSPratyush Yadav return (fid2 << CTD_FID2_SHFT) | (fid1 << CTD_FID1_SHFT) | fid0;
586*8148baabSPratyush Yadav }
587*8148baabSPratyush Yadav
ctd_type_source_ctl(int source,int control)588*8148baabSPratyush Yadav static inline u32 ctd_type_source_ctl(int source, int control)
589*8148baabSPratyush Yadav {
590*8148baabSPratyush Yadav return (CTD_PKT_TYPE << CTD_PKT_TYPE_SHFT) |
591*8148baabSPratyush Yadav (source << CTD_SOURCE_SHFT) | control;
592*8148baabSPratyush Yadav }
593*8148baabSPratyush Yadav
ctd_get_pixel_count(struct vpdma_ctd * ctd)594*8148baabSPratyush Yadav static inline u32 ctd_get_pixel_count(struct vpdma_ctd *ctd)
595*8148baabSPratyush Yadav {
596*8148baabSPratyush Yadav return ctd->pixel_line_count >> CTD_PIXEL_COUNT_SHFT;
597*8148baabSPratyush Yadav }
598*8148baabSPratyush Yadav
ctd_get_line_count(struct vpdma_ctd * ctd)599*8148baabSPratyush Yadav static inline int ctd_get_line_count(struct vpdma_ctd *ctd)
600*8148baabSPratyush Yadav {
601*8148baabSPratyush Yadav return ctd->pixel_line_count & CTD_LINE_COUNT_MASK;
602*8148baabSPratyush Yadav }
603*8148baabSPratyush Yadav
ctd_get_event(struct vpdma_ctd * ctd)604*8148baabSPratyush Yadav static inline int ctd_get_event(struct vpdma_ctd *ctd)
605*8148baabSPratyush Yadav {
606*8148baabSPratyush Yadav return ctd->event & CTD_EVENT_MASK;
607*8148baabSPratyush Yadav }
608*8148baabSPratyush Yadav
ctd_get_fid2_ctl(struct vpdma_ctd * ctd)609*8148baabSPratyush Yadav static inline int ctd_get_fid2_ctl(struct vpdma_ctd *ctd)
610*8148baabSPratyush Yadav {
611*8148baabSPratyush Yadav return (ctd->fid_ctl >> CTD_FID2_SHFT) & CTD_FID2_MASK;
612*8148baabSPratyush Yadav }
613*8148baabSPratyush Yadav
ctd_get_fid1_ctl(struct vpdma_ctd * ctd)614*8148baabSPratyush Yadav static inline int ctd_get_fid1_ctl(struct vpdma_ctd *ctd)
615*8148baabSPratyush Yadav {
616*8148baabSPratyush Yadav return (ctd->fid_ctl >> CTD_FID1_SHFT) & CTD_FID1_MASK;
617*8148baabSPratyush Yadav }
618*8148baabSPratyush Yadav
ctd_get_fid0_ctl(struct vpdma_ctd * ctd)619*8148baabSPratyush Yadav static inline int ctd_get_fid0_ctl(struct vpdma_ctd *ctd)
620*8148baabSPratyush Yadav {
621*8148baabSPratyush Yadav return ctd->fid_ctl & CTD_FID2_MASK;
622*8148baabSPratyush Yadav }
623*8148baabSPratyush Yadav
ctd_get_pkt_type(struct vpdma_ctd * ctd)624*8148baabSPratyush Yadav static inline int ctd_get_pkt_type(struct vpdma_ctd *ctd)
625*8148baabSPratyush Yadav {
626*8148baabSPratyush Yadav return ctd->type_source_ctl >> CTD_PKT_TYPE_SHFT;
627*8148baabSPratyush Yadav }
628*8148baabSPratyush Yadav
ctd_get_source(struct vpdma_ctd * ctd)629*8148baabSPratyush Yadav static inline int ctd_get_source(struct vpdma_ctd *ctd)
630*8148baabSPratyush Yadav {
631*8148baabSPratyush Yadav return (ctd->type_source_ctl >> CTD_SOURCE_SHFT) & CTD_SOURCE_MASK;
632*8148baabSPratyush Yadav }
633*8148baabSPratyush Yadav
ctd_get_ctl(struct vpdma_ctd * ctd)634*8148baabSPratyush Yadav static inline int ctd_get_ctl(struct vpdma_ctd *ctd)
635*8148baabSPratyush Yadav {
636*8148baabSPratyush Yadav return ctd->type_source_ctl & CTD_CONTROL_MASK;
637*8148baabSPratyush Yadav }
638*8148baabSPratyush Yadav
639*8148baabSPratyush Yadav #endif
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