xref: /linux/drivers/media/platform/ti/vpe/vpdma.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1*8148baabSPratyush Yadav /* SPDX-License-Identifier: GPL-2.0-only */
2*8148baabSPratyush Yadav /*
3*8148baabSPratyush Yadav  * Copyright (c) 2013 Texas Instruments Inc.
4*8148baabSPratyush Yadav  *
5*8148baabSPratyush Yadav  * David Griego, <dagriego@biglakesoftware.com>
6*8148baabSPratyush Yadav  * Dale Farnsworth, <dale@farnsworth.org>
7*8148baabSPratyush Yadav  * Archit Taneja, <archit@ti.com>
8*8148baabSPratyush Yadav  */
9*8148baabSPratyush Yadav 
10*8148baabSPratyush Yadav #ifndef __TI_VPDMA_H_
11*8148baabSPratyush Yadav #define __TI_VPDMA_H_
12*8148baabSPratyush Yadav 
13*8148baabSPratyush Yadav #define VPDMA_MAX_NUM_LIST		8
14*8148baabSPratyush Yadav /*
15*8148baabSPratyush Yadav  * A vpdma_buf tracks the size, DMA address and mapping status of each
16*8148baabSPratyush Yadav  * driver DMA area.
17*8148baabSPratyush Yadav  */
18*8148baabSPratyush Yadav struct vpdma_buf {
19*8148baabSPratyush Yadav 	void			*addr;
20*8148baabSPratyush Yadav 	dma_addr_t		dma_addr;
21*8148baabSPratyush Yadav 	size_t			size;
22*8148baabSPratyush Yadav 	bool			mapped;
23*8148baabSPratyush Yadav };
24*8148baabSPratyush Yadav 
25*8148baabSPratyush Yadav struct vpdma_desc_list {
26*8148baabSPratyush Yadav 	struct vpdma_buf buf;
27*8148baabSPratyush Yadav 	void *next;
28*8148baabSPratyush Yadav 	int type;
29*8148baabSPratyush Yadav };
30*8148baabSPratyush Yadav 
31*8148baabSPratyush Yadav struct vpdma_data {
32*8148baabSPratyush Yadav 	void __iomem		*base;
33*8148baabSPratyush Yadav 
34*8148baabSPratyush Yadav 	struct platform_device	*pdev;
35*8148baabSPratyush Yadav 
36*8148baabSPratyush Yadav 	spinlock_t		lock;
37*8148baabSPratyush Yadav 	bool			hwlist_used[VPDMA_MAX_NUM_LIST];
38*8148baabSPratyush Yadav 	void			*hwlist_priv[VPDMA_MAX_NUM_LIST];
39*8148baabSPratyush Yadav 	/* callback to VPE driver when the firmware is loaded */
40*8148baabSPratyush Yadav 	void (*cb)(struct platform_device *pdev);
41*8148baabSPratyush Yadav };
42*8148baabSPratyush Yadav 
43*8148baabSPratyush Yadav enum vpdma_data_format_type {
44*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_TYPE_YUV,
45*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_TYPE_RGB,
46*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_TYPE_MISC,
47*8148baabSPratyush Yadav };
48*8148baabSPratyush Yadav 
49*8148baabSPratyush Yadav struct vpdma_data_format {
50*8148baabSPratyush Yadav 	enum vpdma_data_format_type type;
51*8148baabSPratyush Yadav 	int data_type;
52*8148baabSPratyush Yadav 	u8 depth;
53*8148baabSPratyush Yadav };
54*8148baabSPratyush Yadav 
55*8148baabSPratyush Yadav #define VPDMA_DESC_ALIGN		16	/* 16-byte descriptor alignment */
56*8148baabSPratyush Yadav #define VPDMA_STRIDE_ALIGN		16	/*
57*8148baabSPratyush Yadav 						 * line stride of source and dest
58*8148baabSPratyush Yadav 						 * buffers should be 16 byte aligned
59*8148baabSPratyush Yadav 						 */
60*8148baabSPratyush Yadav #define VPDMA_MAX_STRIDE		65520	/* Max line stride 16 byte aligned */
61*8148baabSPratyush Yadav #define VPDMA_DTD_DESC_SIZE		32	/* 8 words */
62*8148baabSPratyush Yadav #define VPDMA_CFD_CTD_DESC_SIZE		16	/* 4 words */
63*8148baabSPratyush Yadav 
64*8148baabSPratyush Yadav #define VPDMA_LIST_TYPE_NORMAL		0
65*8148baabSPratyush Yadav #define VPDMA_LIST_TYPE_SELF_MODIFYING	1
66*8148baabSPratyush Yadav #define VPDMA_LIST_TYPE_DOORBELL	2
67*8148baabSPratyush Yadav 
68*8148baabSPratyush Yadav enum vpdma_yuv_formats {
69*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_Y444 = 0,
70*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_Y422,
71*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_Y420,
72*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_C444,
73*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_C422,
74*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_C420,
75*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_CB420,
76*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_YCR422,
77*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_YC444,
78*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_CRY422,
79*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_CBY422,
80*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_YCB422,
81*8148baabSPratyush Yadav };
82*8148baabSPratyush Yadav 
83*8148baabSPratyush Yadav enum vpdma_rgb_formats {
84*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RGB565 = 0,
85*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ARGB16_1555,
86*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ARGB16,
87*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RGBA16_5551,
88*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RGBA16,
89*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ARGB24,
90*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RGB24,
91*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ARGB32,
92*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RGBA24,
93*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RGBA32,
94*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_BGR565,
95*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ABGR16_1555,
96*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ABGR16,
97*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_BGRA16_5551,
98*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_BGRA16,
99*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ABGR24,
100*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_BGR24,
101*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_ABGR32,
102*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_BGRA24,
103*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_BGRA32,
104*8148baabSPratyush Yadav };
105*8148baabSPratyush Yadav 
106*8148baabSPratyush Yadav enum vpdma_raw_formats {
107*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RAW8 = 0,
108*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_RAW16,
109*8148baabSPratyush Yadav };
110*8148baabSPratyush Yadav 
111*8148baabSPratyush Yadav enum vpdma_misc_formats {
112*8148baabSPratyush Yadav 	VPDMA_DATA_FMT_MV = 0,
113*8148baabSPratyush Yadav };
114*8148baabSPratyush Yadav 
115*8148baabSPratyush Yadav extern const struct vpdma_data_format vpdma_yuv_fmts[];
116*8148baabSPratyush Yadav extern const struct vpdma_data_format vpdma_rgb_fmts[];
117*8148baabSPratyush Yadav extern const struct vpdma_data_format vpdma_raw_fmts[];
118*8148baabSPratyush Yadav extern const struct vpdma_data_format vpdma_misc_fmts[];
119*8148baabSPratyush Yadav 
120*8148baabSPratyush Yadav enum vpdma_frame_start_event {
121*8148baabSPratyush Yadav 	VPDMA_FSEVENT_HDMI_FID = 0,
122*8148baabSPratyush Yadav 	VPDMA_FSEVENT_DVO2_FID,
123*8148baabSPratyush Yadav 	VPDMA_FSEVENT_HDCOMP_FID,
124*8148baabSPratyush Yadav 	VPDMA_FSEVENT_SD_FID,
125*8148baabSPratyush Yadav 	VPDMA_FSEVENT_LM_FID0,
126*8148baabSPratyush Yadav 	VPDMA_FSEVENT_LM_FID1,
127*8148baabSPratyush Yadav 	VPDMA_FSEVENT_LM_FID2,
128*8148baabSPratyush Yadav 	VPDMA_FSEVENT_CHANNEL_ACTIVE,
129*8148baabSPratyush Yadav };
130*8148baabSPratyush Yadav 
131*8148baabSPratyush Yadav /* max width configurations */
132*8148baabSPratyush Yadav enum vpdma_max_width {
133*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_UNLIMITED = 0,
134*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_REG1,
135*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_REG2,
136*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_REG3,
137*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_352,
138*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_768,
139*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_1280,
140*8148baabSPratyush Yadav 	MAX_OUT_WIDTH_1920,
141*8148baabSPratyush Yadav };
142*8148baabSPratyush Yadav 
143*8148baabSPratyush Yadav /* max height configurations */
144*8148baabSPratyush Yadav enum vpdma_max_height {
145*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_UNLIMITED = 0,
146*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_REG1,
147*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_REG2,
148*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_REG3,
149*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_288,
150*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_576,
151*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_720,
152*8148baabSPratyush Yadav 	MAX_OUT_HEIGHT_1080,
153*8148baabSPratyush Yadav };
154*8148baabSPratyush Yadav 
155*8148baabSPratyush Yadav /*
156*8148baabSPratyush Yadav  * VPDMA channel numbers
157*8148baabSPratyush Yadav  */
158*8148baabSPratyush Yadav enum vpdma_channel {
159*8148baabSPratyush Yadav 	VPE_CHAN_LUMA1_IN,
160*8148baabSPratyush Yadav 	VPE_CHAN_CHROMA1_IN,
161*8148baabSPratyush Yadav 	VPE_CHAN_LUMA2_IN,
162*8148baabSPratyush Yadav 	VPE_CHAN_CHROMA2_IN,
163*8148baabSPratyush Yadav 	VPE_CHAN_LUMA3_IN,
164*8148baabSPratyush Yadav 	VPE_CHAN_CHROMA3_IN,
165*8148baabSPratyush Yadav 	VPE_CHAN_MV_IN,
166*8148baabSPratyush Yadav 	VPE_CHAN_MV_OUT,
167*8148baabSPratyush Yadav 	VPE_CHAN_LUMA_OUT,
168*8148baabSPratyush Yadav 	VPE_CHAN_CHROMA_OUT,
169*8148baabSPratyush Yadav 	VPE_CHAN_RGB_OUT,
170*8148baabSPratyush Yadav };
171*8148baabSPratyush Yadav 
172*8148baabSPratyush Yadav #define VIP_CHAN_VIP2_OFFSET		70
173*8148baabSPratyush Yadav #define VIP_CHAN_MULT_PORTB_OFFSET	16
174*8148baabSPratyush Yadav #define VIP_CHAN_YUV_PORTB_OFFSET	2
175*8148baabSPratyush Yadav #define VIP_CHAN_RGB_PORTB_OFFSET	1
176*8148baabSPratyush Yadav 
177*8148baabSPratyush Yadav #define VPDMA_MAX_CHANNELS		256
178*8148baabSPratyush Yadav 
179*8148baabSPratyush Yadav /* flags for VPDMA data descriptors */
180*8148baabSPratyush Yadav #define VPDMA_DATA_ODD_LINE_SKIP	(1 << 0)
181*8148baabSPratyush Yadav #define VPDMA_DATA_EVEN_LINE_SKIP	(1 << 1)
182*8148baabSPratyush Yadav #define VPDMA_DATA_FRAME_1D		(1 << 2)
183*8148baabSPratyush Yadav #define VPDMA_DATA_MODE_TILED		(1 << 3)
184*8148baabSPratyush Yadav 
185*8148baabSPratyush Yadav /*
186*8148baabSPratyush Yadav  * client identifiers used for configuration descriptors
187*8148baabSPratyush Yadav  */
188*8148baabSPratyush Yadav #define CFD_MMR_CLIENT		0
189*8148baabSPratyush Yadav #define CFD_SC_CLIENT		4
190*8148baabSPratyush Yadav 
191*8148baabSPratyush Yadav /* Address data block header format */
192*8148baabSPratyush Yadav struct vpdma_adb_hdr {
193*8148baabSPratyush Yadav 	u32			offset;
194*8148baabSPratyush Yadav 	u32			nwords;
195*8148baabSPratyush Yadav 	u32			reserved0;
196*8148baabSPratyush Yadav 	u32			reserved1;
197*8148baabSPratyush Yadav };
198*8148baabSPratyush Yadav 
199*8148baabSPratyush Yadav /* helpers for creating ADB headers for config descriptors MMRs as client */
200*8148baabSPratyush Yadav #define ADB_ADDR(dma_buf, str, fld)	((dma_buf)->addr + offsetof(str, fld))
201*8148baabSPratyush Yadav #define MMR_ADB_ADDR(buf, str, fld)	ADB_ADDR(&(buf), struct str, fld)
202*8148baabSPratyush Yadav 
203*8148baabSPratyush Yadav #define VPDMA_SET_MMR_ADB_HDR(buf, str, hdr, regs, offset_a)	\
204*8148baabSPratyush Yadav 	do {							\
205*8148baabSPratyush Yadav 		struct vpdma_adb_hdr *h;			\
206*8148baabSPratyush Yadav 		struct str *adb = NULL;				\
207*8148baabSPratyush Yadav 		h = MMR_ADB_ADDR(buf, str, hdr);		\
208*8148baabSPratyush Yadav 		h->offset = (offset_a);				\
209*8148baabSPratyush Yadav 		h->nwords = sizeof(adb->regs) >> 2;		\
210*8148baabSPratyush Yadav 	} while (0)
211*8148baabSPratyush Yadav 
212*8148baabSPratyush Yadav /* vpdma descriptor buffer allocation and management */
213*8148baabSPratyush Yadav int vpdma_alloc_desc_buf(struct vpdma_buf *buf, size_t size);
214*8148baabSPratyush Yadav void vpdma_free_desc_buf(struct vpdma_buf *buf);
215*8148baabSPratyush Yadav int vpdma_map_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf);
216*8148baabSPratyush Yadav void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf);
217*8148baabSPratyush Yadav 
218*8148baabSPratyush Yadav /* vpdma descriptor list funcs */
219*8148baabSPratyush Yadav int vpdma_create_desc_list(struct vpdma_desc_list *list, size_t size, int type);
220*8148baabSPratyush Yadav void vpdma_reset_desc_list(struct vpdma_desc_list *list);
221*8148baabSPratyush Yadav void vpdma_free_desc_list(struct vpdma_desc_list *list);
222*8148baabSPratyush Yadav int vpdma_submit_descs(struct vpdma_data *vpdma, struct vpdma_desc_list *list,
223*8148baabSPratyush Yadav 		       int list_num);
224*8148baabSPratyush Yadav bool vpdma_list_busy(struct vpdma_data *vpdma, int list_num);
225*8148baabSPratyush Yadav void vpdma_update_dma_addr(struct vpdma_data *vpdma,
226*8148baabSPratyush Yadav 	struct vpdma_desc_list *list, dma_addr_t dma_addr,
227*8148baabSPratyush Yadav 	void *write_dtd, int drop, int idx);
228*8148baabSPratyush Yadav 
229*8148baabSPratyush Yadav /* VPDMA hardware list funcs */
230*8148baabSPratyush Yadav int vpdma_hwlist_alloc(struct vpdma_data *vpdma, void *priv);
231*8148baabSPratyush Yadav void *vpdma_hwlist_get_priv(struct vpdma_data *vpdma, int list_num);
232*8148baabSPratyush Yadav void *vpdma_hwlist_release(struct vpdma_data *vpdma, int list_num);
233*8148baabSPratyush Yadav 
234*8148baabSPratyush Yadav /* helpers for creating vpdma descriptors */
235*8148baabSPratyush Yadav void vpdma_add_cfd_block(struct vpdma_desc_list *list, int client,
236*8148baabSPratyush Yadav 		struct vpdma_buf *blk, u32 dest_offset);
237*8148baabSPratyush Yadav void vpdma_add_cfd_adb(struct vpdma_desc_list *list, int client,
238*8148baabSPratyush Yadav 		struct vpdma_buf *adb);
239*8148baabSPratyush Yadav void vpdma_add_sync_on_channel_ctd(struct vpdma_desc_list *list,
240*8148baabSPratyush Yadav 		enum vpdma_channel chan);
241*8148baabSPratyush Yadav void vpdma_add_abort_channel_ctd(struct vpdma_desc_list *list,
242*8148baabSPratyush Yadav 		int chan_num);
243*8148baabSPratyush Yadav void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width,
244*8148baabSPratyush Yadav 		int stride, const struct v4l2_rect *c_rect,
245*8148baabSPratyush Yadav 		const struct vpdma_data_format *fmt, dma_addr_t dma_addr,
246*8148baabSPratyush Yadav 		int max_w, int max_h, enum vpdma_channel chan, u32 flags);
247*8148baabSPratyush Yadav void vpdma_rawchan_add_out_dtd(struct vpdma_desc_list *list, int width,
248*8148baabSPratyush Yadav 		int stride, const struct v4l2_rect *c_rect,
249*8148baabSPratyush Yadav 		const struct vpdma_data_format *fmt, dma_addr_t dma_addr,
250*8148baabSPratyush Yadav 		int max_w, int max_h, int raw_vpdma_chan, u32 flags);
251*8148baabSPratyush Yadav 
252*8148baabSPratyush Yadav void vpdma_add_in_dtd(struct vpdma_desc_list *list, int width,
253*8148baabSPratyush Yadav 		int stride, const struct v4l2_rect *c_rect,
254*8148baabSPratyush Yadav 		const struct vpdma_data_format *fmt, dma_addr_t dma_addr,
255*8148baabSPratyush Yadav 		enum vpdma_channel chan, int field, u32 flags, int frame_width,
256*8148baabSPratyush Yadav 		int frame_height, int start_h, int start_v);
257*8148baabSPratyush Yadav int vpdma_list_cleanup(struct vpdma_data *vpdma, int list_num,
258*8148baabSPratyush Yadav 		int *channels, int size);
259*8148baabSPratyush Yadav 
260*8148baabSPratyush Yadav /* vpdma list interrupt management */
261*8148baabSPratyush Yadav void vpdma_enable_list_complete_irq(struct vpdma_data *vpdma, int irq_num,
262*8148baabSPratyush Yadav 		int list_num, bool enable);
263*8148baabSPratyush Yadav void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num,
264*8148baabSPratyush Yadav 			   int list_num);
265*8148baabSPratyush Yadav unsigned int vpdma_get_list_stat(struct vpdma_data *vpdma, int irq_num);
266*8148baabSPratyush Yadav unsigned int vpdma_get_list_mask(struct vpdma_data *vpdma, int irq_num);
267*8148baabSPratyush Yadav 
268*8148baabSPratyush Yadav /* vpdma client configuration */
269*8148baabSPratyush Yadav void vpdma_set_line_mode(struct vpdma_data *vpdma, int line_mode,
270*8148baabSPratyush Yadav 		enum vpdma_channel chan);
271*8148baabSPratyush Yadav void vpdma_set_frame_start_event(struct vpdma_data *vpdma,
272*8148baabSPratyush Yadav 		enum vpdma_frame_start_event fs_event, enum vpdma_channel chan);
273*8148baabSPratyush Yadav void vpdma_set_max_size(struct vpdma_data *vpdma, int reg_addr,
274*8148baabSPratyush Yadav 			u32 width, u32 height);
275*8148baabSPratyush Yadav 
276*8148baabSPratyush Yadav void vpdma_set_bg_color(struct vpdma_data *vpdma,
277*8148baabSPratyush Yadav 			struct vpdma_data_format *fmt, u32 color);
278*8148baabSPratyush Yadav void vpdma_dump_regs(struct vpdma_data *vpdma);
279*8148baabSPratyush Yadav 
280*8148baabSPratyush Yadav /* initialize vpdma, passed with VPE's platform device pointer */
281*8148baabSPratyush Yadav int vpdma_create(struct platform_device *pdev, struct vpdma_data *vpdma,
282*8148baabSPratyush Yadav 		void (*cb)(struct platform_device *pdev));
283*8148baabSPratyush Yadav 
284*8148baabSPratyush Yadav #endif
285