xref: /linux/drivers/media/platform/samsung/exynos4-is/fimc-capture.c (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
4  *
5  * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
6  * Sylwester Nawrocki <s.nawrocki@samsung.com>
7  */
8 
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/types.h>
12 #include <linux/errno.h>
13 #include <linux/bug.h>
14 #include <linux/interrupt.h>
15 #include <linux/device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/list.h>
18 #include <linux/slab.h>
19 
20 #include <linux/videodev2.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/v4l2-rect.h>
25 #include <media/videobuf2-v4l2.h>
26 #include <media/videobuf2-dma-contig.h>
27 
28 #include "common.h"
29 #include "fimc-core.h"
30 #include "fimc-reg.h"
31 #include "media-dev.h"
32 
33 static int fimc_capture_hw_init(struct fimc_dev *fimc)
34 {
35 	struct fimc_source_info *si = &fimc->vid_cap.source_config;
36 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
37 	int ret;
38 	unsigned long flags;
39 
40 	if (ctx == NULL || ctx->s_frame.fmt == NULL)
41 		return -EINVAL;
42 
43 	if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
44 		ret = fimc_hw_camblk_cfg_writeback(fimc);
45 		if (ret < 0)
46 			return ret;
47 	}
48 
49 	spin_lock_irqsave(&fimc->slock, flags);
50 	fimc_prepare_dma_offset(ctx, &ctx->d_frame);
51 	fimc_set_yuv_order(ctx);
52 
53 	fimc_hw_set_camera_polarity(fimc, si);
54 	fimc_hw_set_camera_type(fimc, si);
55 	fimc_hw_set_camera_source(fimc, si);
56 	fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
57 
58 	ret = fimc_set_scaler_info(ctx);
59 	if (!ret) {
60 		fimc_hw_set_input_path(ctx);
61 		fimc_hw_set_prescaler(ctx);
62 		fimc_hw_set_mainscaler(ctx);
63 		fimc_hw_set_target_format(ctx);
64 		fimc_hw_set_rotation(ctx);
65 		fimc_hw_set_effect(ctx);
66 		fimc_hw_set_output_path(ctx);
67 		fimc_hw_set_out_dma(ctx);
68 		if (fimc->drv_data->alpha_color)
69 			fimc_hw_set_rgb_alpha(ctx);
70 		clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
71 	}
72 	spin_unlock_irqrestore(&fimc->slock, flags);
73 	return ret;
74 }
75 
76 /*
77  * Reinitialize the driver so it is ready to start the streaming again.
78  * Set fimc->state to indicate stream off and the hardware shut down state.
79  * If not suspending (@suspend is false), return any buffers to videobuf2.
80  * Otherwise put any owned buffers onto the pending buffers queue, so they
81  * can be re-spun when the device is being resumed. Also perform FIMC
82  * software reset and disable streaming on the whole pipeline if required.
83  */
84 static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
85 {
86 	struct fimc_vid_cap *cap = &fimc->vid_cap;
87 	struct fimc_vid_buffer *buf;
88 	unsigned long flags;
89 	bool streaming;
90 
91 	spin_lock_irqsave(&fimc->slock, flags);
92 	streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
93 
94 	fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
95 			 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
96 	if (suspend)
97 		fimc->state |= (1 << ST_CAPT_SUSPENDED);
98 	else
99 		fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
100 
101 	/* Release unused buffers */
102 	while (!suspend && !list_empty(&cap->pending_buf_q)) {
103 		buf = fimc_pending_queue_pop(cap);
104 		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
105 	}
106 	/* If suspending put unused buffers onto pending queue */
107 	while (!list_empty(&cap->active_buf_q)) {
108 		buf = fimc_active_queue_pop(cap);
109 		if (suspend)
110 			fimc_pending_queue_add(cap, buf);
111 		else
112 			vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
113 	}
114 
115 	fimc_hw_reset(fimc);
116 	cap->buf_index = 0;
117 
118 	spin_unlock_irqrestore(&fimc->slock, flags);
119 
120 	if (streaming)
121 		return fimc_pipeline_call(&cap->ve, set_stream, 0);
122 	else
123 		return 0;
124 }
125 
126 static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
127 {
128 	unsigned long flags;
129 
130 	if (!fimc_capture_active(fimc))
131 		return 0;
132 
133 	spin_lock_irqsave(&fimc->slock, flags);
134 	set_bit(ST_CAPT_SHUT, &fimc->state);
135 	fimc_deactivate_capture(fimc);
136 	spin_unlock_irqrestore(&fimc->slock, flags);
137 
138 	wait_event_timeout(fimc->irq_queue,
139 			   !test_bit(ST_CAPT_SHUT, &fimc->state),
140 			   (2*HZ/10)); /* 200 ms */
141 
142 	return fimc_capture_state_cleanup(fimc, suspend);
143 }
144 
145 /**
146  * fimc_capture_config_update - apply the camera interface configuration
147  * @ctx: FIMC capture context
148  *
149  * To be called from within the interrupt handler with fimc.slock
150  * spinlock held. It updates the camera pixel crop, rotation and
151  * image flip in H/W.
152  */
153 static int fimc_capture_config_update(struct fimc_ctx *ctx)
154 {
155 	struct fimc_dev *fimc = ctx->fimc_dev;
156 	int ret;
157 
158 	fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
159 
160 	ret = fimc_set_scaler_info(ctx);
161 	if (ret)
162 		return ret;
163 
164 	fimc_hw_set_prescaler(ctx);
165 	fimc_hw_set_mainscaler(ctx);
166 	fimc_hw_set_target_format(ctx);
167 	fimc_hw_set_rotation(ctx);
168 	fimc_hw_set_effect(ctx);
169 	fimc_prepare_dma_offset(ctx, &ctx->d_frame);
170 	fimc_hw_set_out_dma(ctx);
171 	if (fimc->drv_data->alpha_color)
172 		fimc_hw_set_rgb_alpha(ctx);
173 
174 	clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
175 	return ret;
176 }
177 
178 void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
179 {
180 	struct fimc_vid_cap *cap = &fimc->vid_cap;
181 	struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
182 	struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
183 	const struct fimc_frame *f = &cap->ctx->d_frame;
184 	struct fimc_vid_buffer *v_buf;
185 
186 	if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
187 		wake_up(&fimc->irq_queue);
188 		goto done;
189 	}
190 
191 	if (!list_empty(&cap->active_buf_q) &&
192 	    test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
193 		v_buf = fimc_active_queue_pop(cap);
194 
195 		v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
196 		v_buf->vb.sequence = cap->frame_count++;
197 
198 		vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
199 	}
200 
201 	if (!list_empty(&cap->pending_buf_q)) {
202 
203 		v_buf = fimc_pending_queue_pop(cap);
204 		fimc_hw_set_output_addr(fimc, &v_buf->addr, cap->buf_index);
205 		v_buf->index = cap->buf_index;
206 
207 		/* Move the buffer to the capture active queue */
208 		fimc_active_queue_add(cap, v_buf);
209 
210 		dbg("next frame: %d, done frame: %d",
211 		    fimc_hw_get_frame_index(fimc), v_buf->index);
212 
213 		if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
214 			cap->buf_index = 0;
215 	}
216 	/*
217 	 * Set up a buffer at MIPI-CSIS if current image format
218 	 * requires the frame embedded data capture.
219 	 */
220 	if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
221 		unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
222 		unsigned int size = f->payload[plane];
223 		s32 index = fimc_hw_get_frame_index(fimc);
224 		void *vaddr;
225 
226 		list_for_each_entry(v_buf, &cap->active_buf_q, list) {
227 			if (v_buf->index != index)
228 				continue;
229 			vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
230 			v4l2_subdev_call(csis, video, s_rx_buffer,
231 					 vaddr, &size);
232 			break;
233 		}
234 	}
235 
236 	if (cap->active_buf_cnt == 0) {
237 		if (deq_buf)
238 			clear_bit(ST_CAPT_RUN, &fimc->state);
239 
240 		if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
241 			cap->buf_index = 0;
242 	} else {
243 		set_bit(ST_CAPT_RUN, &fimc->state);
244 	}
245 
246 	if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
247 		fimc_capture_config_update(cap->ctx);
248 done:
249 	if (cap->active_buf_cnt == 1) {
250 		fimc_deactivate_capture(fimc);
251 		clear_bit(ST_CAPT_STREAM, &fimc->state);
252 	}
253 
254 	dbg("frame: %d, active_buf_cnt: %d",
255 	    fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
256 }
257 
258 
259 static int start_streaming(struct vb2_queue *q, unsigned int count)
260 {
261 	struct fimc_ctx *ctx = q->drv_priv;
262 	struct fimc_dev *fimc = ctx->fimc_dev;
263 	struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
264 	int min_bufs;
265 	int ret;
266 
267 	vid_cap->frame_count = 0;
268 
269 	ret = fimc_capture_hw_init(fimc);
270 	if (ret) {
271 		fimc_capture_state_cleanup(fimc, false);
272 		return ret;
273 	}
274 
275 	set_bit(ST_CAPT_PEND, &fimc->state);
276 
277 	min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
278 
279 	if (vid_cap->active_buf_cnt >= min_bufs &&
280 	    !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
281 		fimc_activate_capture(ctx);
282 
283 		if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
284 			return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
285 	}
286 
287 	return 0;
288 }
289 
290 static void stop_streaming(struct vb2_queue *q)
291 {
292 	struct fimc_ctx *ctx = q->drv_priv;
293 	struct fimc_dev *fimc = ctx->fimc_dev;
294 
295 	if (!fimc_capture_active(fimc))
296 		return;
297 
298 	fimc_stop_capture(fimc, false);
299 }
300 
301 int fimc_capture_suspend(struct fimc_dev *fimc)
302 {
303 	bool suspend = fimc_capture_busy(fimc);
304 
305 	int ret = fimc_stop_capture(fimc, suspend);
306 	if (ret)
307 		return ret;
308 	return fimc_pipeline_call(&fimc->vid_cap.ve, close);
309 }
310 
311 static void buffer_queue(struct vb2_buffer *vb);
312 
313 int fimc_capture_resume(struct fimc_dev *fimc)
314 {
315 	struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
316 	struct exynos_video_entity *ve = &vid_cap->ve;
317 	struct fimc_vid_buffer *buf;
318 	int i;
319 
320 	if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
321 		return 0;
322 
323 	INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
324 	vid_cap->buf_index = 0;
325 	fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
326 	fimc_capture_hw_init(fimc);
327 
328 	clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
329 
330 	for (i = 0; i < vid_cap->reqbufs_count; i++) {
331 		if (list_empty(&vid_cap->pending_buf_q))
332 			break;
333 		buf = fimc_pending_queue_pop(vid_cap);
334 		buffer_queue(&buf->vb.vb2_buf);
335 	}
336 	return 0;
337 
338 }
339 
340 static int queue_setup(struct vb2_queue *vq,
341 		       unsigned int *num_buffers, unsigned int *num_planes,
342 		       unsigned int sizes[], struct device *alloc_devs[])
343 {
344 	struct fimc_ctx *ctx = vq->drv_priv;
345 	const struct fimc_frame *frame = &ctx->d_frame;
346 	const struct fimc_fmt *fmt = frame->fmt;
347 	unsigned long wh = frame->f_width * frame->f_height;
348 	int i;
349 
350 	if (fmt == NULL)
351 		return -EINVAL;
352 
353 	if (*num_planes) {
354 		if (*num_planes != fmt->memplanes)
355 			return -EINVAL;
356 		for (i = 0; i < *num_planes; i++)
357 			if (sizes[i] < (wh * fmt->depth[i]) / 8)
358 				return -EINVAL;
359 		return 0;
360 	}
361 
362 	*num_planes = fmt->memplanes;
363 
364 	for (i = 0; i < fmt->memplanes; i++) {
365 		unsigned int size = (wh * fmt->depth[i]) / 8;
366 
367 		if (fimc_fmt_is_user_defined(fmt->color))
368 			sizes[i] = frame->payload[i];
369 		else
370 			sizes[i] = max_t(u32, size, frame->payload[i]);
371 	}
372 
373 	return 0;
374 }
375 
376 static int buffer_prepare(struct vb2_buffer *vb)
377 {
378 	struct vb2_queue *vq = vb->vb2_queue;
379 	struct fimc_ctx *ctx = vq->drv_priv;
380 	int i;
381 
382 	if (ctx->d_frame.fmt == NULL)
383 		return -EINVAL;
384 
385 	for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
386 		unsigned long size = ctx->d_frame.payload[i];
387 
388 		if (vb2_plane_size(vb, i) < size) {
389 			v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
390 				 "User buffer too small (%ld < %ld)\n",
391 				 vb2_plane_size(vb, i), size);
392 			return -EINVAL;
393 		}
394 		vb2_set_plane_payload(vb, i, size);
395 	}
396 
397 	return 0;
398 }
399 
400 static void buffer_queue(struct vb2_buffer *vb)
401 {
402 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
403 	struct fimc_vid_buffer *buf
404 		= container_of(vbuf, struct fimc_vid_buffer, vb);
405 	struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
406 	struct fimc_dev *fimc = ctx->fimc_dev;
407 	struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
408 	struct exynos_video_entity *ve = &vid_cap->ve;
409 	unsigned long flags;
410 	int min_bufs;
411 
412 	spin_lock_irqsave(&fimc->slock, flags);
413 	fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->addr);
414 
415 	if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
416 	    !test_bit(ST_CAPT_STREAM, &fimc->state) &&
417 	    vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
418 		/* Setup the buffer directly for processing. */
419 		int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
420 				vid_cap->buf_index;
421 
422 		fimc_hw_set_output_addr(fimc, &buf->addr, buf_id);
423 		buf->index = vid_cap->buf_index;
424 		fimc_active_queue_add(vid_cap, buf);
425 
426 		if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
427 			vid_cap->buf_index = 0;
428 	} else {
429 		fimc_pending_queue_add(vid_cap, buf);
430 	}
431 
432 	min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
433 
434 
435 	if (vb2_is_streaming(&vid_cap->vbq) &&
436 	    vid_cap->active_buf_cnt >= min_bufs &&
437 	    !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
438 		int ret;
439 
440 		fimc_activate_capture(ctx);
441 		spin_unlock_irqrestore(&fimc->slock, flags);
442 
443 		if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
444 			return;
445 
446 		ret = fimc_pipeline_call(ve, set_stream, 1);
447 		if (ret < 0)
448 			v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
449 		return;
450 	}
451 	spin_unlock_irqrestore(&fimc->slock, flags);
452 }
453 
454 static const struct vb2_ops fimc_capture_qops = {
455 	.queue_setup		= queue_setup,
456 	.buf_prepare		= buffer_prepare,
457 	.buf_queue		= buffer_queue,
458 	.start_streaming	= start_streaming,
459 	.stop_streaming		= stop_streaming,
460 };
461 
462 static int fimc_capture_set_default_format(struct fimc_dev *fimc);
463 
464 static int fimc_capture_open(struct file *file)
465 {
466 	struct fimc_dev *fimc = video_drvdata(file);
467 	struct fimc_vid_cap *vc = &fimc->vid_cap;
468 	struct exynos_video_entity *ve = &vc->ve;
469 	int ret = -EBUSY;
470 
471 	dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
472 
473 	mutex_lock(&fimc->lock);
474 
475 	if (fimc_m2m_active(fimc))
476 		goto unlock;
477 
478 	set_bit(ST_CAPT_BUSY, &fimc->state);
479 	ret = pm_runtime_resume_and_get(&fimc->pdev->dev);
480 	if (ret < 0)
481 		goto unlock;
482 
483 	ret = v4l2_fh_open(file);
484 	if (ret) {
485 		pm_runtime_put_sync(&fimc->pdev->dev);
486 		goto unlock;
487 	}
488 
489 	if (v4l2_fh_is_singular_file(file)) {
490 		fimc_md_graph_lock(ve);
491 
492 		ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
493 
494 		if (ret == 0)
495 			ve->vdev.entity.use_count++;
496 
497 		fimc_md_graph_unlock(ve);
498 
499 		if (ret == 0)
500 			ret = fimc_capture_set_default_format(fimc);
501 
502 		if (ret < 0) {
503 			clear_bit(ST_CAPT_BUSY, &fimc->state);
504 			pm_runtime_put_sync(&fimc->pdev->dev);
505 			v4l2_fh_release(file);
506 		}
507 	}
508 unlock:
509 	mutex_unlock(&fimc->lock);
510 	return ret;
511 }
512 
513 static int fimc_capture_release(struct file *file)
514 {
515 	struct fimc_dev *fimc = video_drvdata(file);
516 	struct fimc_vid_cap *vc = &fimc->vid_cap;
517 	bool close = v4l2_fh_is_singular_file(file);
518 	int ret;
519 
520 	dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
521 
522 	mutex_lock(&fimc->lock);
523 
524 	if (close && vc->streaming) {
525 		video_device_pipeline_stop(&vc->ve.vdev);
526 		vc->streaming = false;
527 	}
528 
529 	ret = _vb2_fop_release(file, NULL);
530 
531 	if (close) {
532 		clear_bit(ST_CAPT_BUSY, &fimc->state);
533 		fimc_pipeline_call(&vc->ve, close);
534 		clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
535 
536 		fimc_md_graph_lock(&vc->ve);
537 		vc->ve.vdev.entity.use_count--;
538 		fimc_md_graph_unlock(&vc->ve);
539 	}
540 
541 	pm_runtime_put_sync(&fimc->pdev->dev);
542 	mutex_unlock(&fimc->lock);
543 
544 	return ret;
545 }
546 
547 static const struct v4l2_file_operations fimc_capture_fops = {
548 	.owner		= THIS_MODULE,
549 	.open		= fimc_capture_open,
550 	.release	= fimc_capture_release,
551 	.poll		= vb2_fop_poll,
552 	.unlocked_ioctl	= video_ioctl2,
553 	.mmap		= vb2_fop_mmap,
554 };
555 
556 /*
557  * Format and crop negotiation helpers
558  */
559 
560 static const struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
561 						      u32 *width, u32 *height,
562 						      u32 *code, u32 *fourcc, int pad)
563 {
564 	bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
565 	struct fimc_dev *fimc = ctx->fimc_dev;
566 	const struct fimc_variant *var = fimc->variant;
567 	const struct fimc_pix_limit *pl = var->pix_limit;
568 	const struct fimc_frame *dst = &ctx->d_frame;
569 	u32 depth, min_w, max_w, min_h, align_h = 3;
570 	const struct fimc_fmt *ffmt;
571 	u32 mask = FMT_FLAGS_CAM;
572 
573 	/* Conversion from/to JPEG or User Defined format is not supported */
574 	if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
575 	    fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
576 		*code = ctx->s_frame.fmt->mbus_code;
577 
578 	if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
579 		mask |= FMT_FLAGS_M2M;
580 
581 	if (pad == FIMC_SD_PAD_SINK_FIFO)
582 		mask = FMT_FLAGS_WRITEBACK;
583 
584 	ffmt = fimc_find_format(fourcc, code, mask, 0);
585 	if (WARN_ON(!ffmt))
586 		return NULL;
587 
588 	if (code)
589 		*code = ffmt->mbus_code;
590 	if (fourcc)
591 		*fourcc = ffmt->fourcc;
592 
593 	if (pad != FIMC_SD_PAD_SOURCE) {
594 		max_w = fimc_fmt_is_user_defined(ffmt->color) ?
595 			pl->scaler_dis_w : pl->scaler_en_w;
596 		/* Apply the camera input interface pixel constraints */
597 		v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
598 				      height, max_t(u32, *height, 32),
599 				      FIMC_CAMIF_MAX_HEIGHT,
600 				      fimc_fmt_is_user_defined(ffmt->color) ?
601 				      3 : 1,
602 				      0);
603 		return ffmt;
604 	}
605 	/* Can't scale or crop in transparent (JPEG) transfer mode */
606 	if (fimc_fmt_is_user_defined(ffmt->color)) {
607 		*width  = ctx->s_frame.f_width;
608 		*height = ctx->s_frame.f_height;
609 		return ffmt;
610 	}
611 	/* Apply the scaler and the output DMA constraints */
612 	max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
613 	if (ctx->state & FIMC_COMPOSE) {
614 		min_w = dst->offs_h + dst->width;
615 		min_h = dst->offs_v + dst->height;
616 	} else {
617 		min_w = var->min_out_pixsize;
618 		min_h = var->min_out_pixsize;
619 	}
620 	if (var->min_vsize_align == 1 && !rotation)
621 		align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
622 
623 	depth = fimc_get_format_depth(ffmt);
624 	v4l_bound_align_image(width, min_w, max_w,
625 			      ffs(var->min_out_pixsize) - 1,
626 			      height, min_h, FIMC_CAMIF_MAX_HEIGHT,
627 			      align_h,
628 			      64/(ALIGN(depth, 8)));
629 
630 	dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
631 	    pad, code ? *code : 0, *width, *height,
632 	    dst->f_width, dst->f_height);
633 
634 	return ffmt;
635 }
636 
637 static void fimc_capture_try_selection(struct fimc_ctx *ctx,
638 				       struct v4l2_rect *r,
639 				       int target)
640 {
641 	bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
642 	struct fimc_dev *fimc = ctx->fimc_dev;
643 	const struct fimc_variant *var = fimc->variant;
644 	const struct fimc_pix_limit *pl = var->pix_limit;
645 	const struct fimc_frame *sink = &ctx->s_frame;
646 	u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
647 	u32 align_sz = 0, align_h = 4;
648 	u32 max_sc_h, max_sc_v;
649 
650 	/* In JPEG transparent transfer mode cropping is not supported */
651 	if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
652 		r->width  = sink->f_width;
653 		r->height = sink->f_height;
654 		r->left   = r->top = 0;
655 		return;
656 	}
657 	if (target == V4L2_SEL_TGT_COMPOSE) {
658 		u32 tmp_min_h = ffs(sink->width) - 3;
659 		u32 tmp_min_v = ffs(sink->height) - 1;
660 
661 		if (ctx->rotation != 90 && ctx->rotation != 270)
662 			align_h = 1;
663 		max_sc_h = min(SCALER_MAX_HRATIO, 1 << tmp_min_h);
664 		max_sc_v = min(SCALER_MAX_VRATIO, 1 << tmp_min_v);
665 		min_sz = var->min_out_pixsize;
666 	} else {
667 		u32 depth = fimc_get_format_depth(sink->fmt);
668 		align_sz = 64/ALIGN(depth, 8);
669 		min_sz = var->min_inp_pixsize;
670 		min_w = min_h = min_sz;
671 		max_sc_h = max_sc_v = 1;
672 	}
673 	/*
674 	 * For the compose rectangle the following constraints must be met:
675 	 * - it must fit in the sink pad format rectangle (f_width/f_height);
676 	 * - maximum downscaling ratio is 64;
677 	 * - maximum crop size depends if the rotator is used or not;
678 	 * - the sink pad format width/height must be 4 multiple of the
679 	 *   prescaler ratios determined by sink pad size and source pad crop,
680 	 *   the prescaler ratio is returned by fimc_get_scaler_factor().
681 	 */
682 	max_w = min_t(u32,
683 		      rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
684 		      rotate ? sink->f_height : sink->f_width);
685 	max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
686 
687 	if (target == V4L2_SEL_TGT_COMPOSE) {
688 		min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
689 		min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
690 		if (rotate) {
691 			swap(max_sc_h, max_sc_v);
692 			swap(min_w, min_h);
693 		}
694 	}
695 	v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
696 			      &r->height, min_h, max_h, align_h,
697 			      align_sz);
698 	/* Adjust left/top if crop/compose rectangle is out of bounds */
699 	r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
700 	r->top  = clamp_t(u32, r->top, 0, sink->f_height - r->height);
701 	r->left = round_down(r->left, var->hor_offs_align);
702 
703 	dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
704 	    target, r->left, r->top, r->width, r->height,
705 	    sink->f_width, sink->f_height);
706 }
707 
708 /*
709  * The video node ioctl operations
710  */
711 static int fimc_cap_querycap(struct file *file, void *priv,
712 					struct v4l2_capability *cap)
713 {
714 	struct fimc_dev *fimc = video_drvdata(file);
715 
716 	__fimc_vidioc_querycap(&fimc->pdev->dev, cap);
717 	return 0;
718 }
719 
720 static int fimc_cap_enum_fmt(struct file *file, void *priv,
721 			     struct v4l2_fmtdesc *f)
722 {
723 	const struct fimc_fmt *fmt;
724 
725 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
726 			       f->index);
727 	if (!fmt)
728 		return -EINVAL;
729 	f->pixelformat = fmt->fourcc;
730 	return 0;
731 }
732 
733 static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
734 {
735 	struct media_pad *pad = &me->pads[0];
736 
737 	while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
738 		pad = media_pad_remote_pad_first(pad);
739 		if (!pad)
740 			break;
741 		me = pad->entity;
742 		pad = &me->pads[0];
743 	}
744 
745 	return me;
746 }
747 
748 /**
749  * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
750  *                            elements
751  * @ctx: FIMC capture context
752  * @tfmt: media bus format to try/set on subdevs
753  * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
754  * @set: true to set format on subdevs, false to try only
755  */
756 static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
757 				    struct v4l2_mbus_framefmt *tfmt,
758 				    const struct fimc_fmt **fmt_id,
759 				    bool set)
760 {
761 	struct fimc_dev *fimc = ctx->fimc_dev;
762 	struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
763 	struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
764 	struct v4l2_subdev_format sfmt = {
765 		.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE
766 		       : V4L2_SUBDEV_FORMAT_TRY,
767 	};
768 	struct v4l2_mbus_framefmt *mf = &sfmt.format;
769 	const struct fimc_fmt *ffmt;
770 	struct media_entity *me;
771 	struct media_pad *pad;
772 	int ret, i = 1;
773 	u32 fcc;
774 
775 	if (WARN_ON(!sd || !tfmt))
776 		return -EINVAL;
777 
778 	sfmt.format = *tfmt;
779 
780 	me = fimc_pipeline_get_head(&sd->entity);
781 
782 	while (1) {
783 		ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
784 					FMT_FLAGS_CAM, i++);
785 		if (ffmt == NULL) {
786 			/*
787 			 * Notify user-space if common pixel code for
788 			 * host and sensor does not exist.
789 			 */
790 			return -EINVAL;
791 		}
792 		mf->code = tfmt->code = ffmt->mbus_code;
793 
794 		/* set format on all pipeline subdevs */
795 		while (me != &fimc->vid_cap.subdev.entity) {
796 			sd = media_entity_to_v4l2_subdev(me);
797 
798 			sfmt.pad = 0;
799 			ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
800 			if (ret)
801 				return ret;
802 
803 			if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
804 				sfmt.pad = me->num_pads - 1;
805 				mf->code = tfmt->code;
806 				ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
807 									&sfmt);
808 				if (ret)
809 					return ret;
810 			}
811 
812 			pad = media_pad_remote_pad_first(&me->pads[sfmt.pad]);
813 			if (!pad)
814 				return -EINVAL;
815 			me = pad->entity;
816 		}
817 
818 		if (mf->code != tfmt->code)
819 			continue;
820 
821 		fcc = ffmt->fourcc;
822 		tfmt->width  = mf->width;
823 		tfmt->height = mf->height;
824 		ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
825 					NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
826 		ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
827 					NULL, &fcc, FIMC_SD_PAD_SOURCE);
828 		if (ffmt && ffmt->mbus_code)
829 			mf->code = ffmt->mbus_code;
830 		if (mf->width != tfmt->width || mf->height != tfmt->height)
831 			continue;
832 		tfmt->code = mf->code;
833 		break;
834 	}
835 
836 	if (fmt_id && ffmt)
837 		*fmt_id = ffmt;
838 	*tfmt = *mf;
839 
840 	return 0;
841 }
842 
843 /**
844  * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
845  * @sensor: pointer to the sensor subdev
846  * @plane_fmt: provides plane sizes corresponding to the frame layout entries
847  * @num_planes: number of planes
848  * @try: true to set the frame parameters, false to query only
849  *
850  * This function is used by this driver only for compressed/blob data formats.
851  */
852 static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
853 				      struct v4l2_plane_pix_format *plane_fmt,
854 				      unsigned int num_planes, bool try)
855 {
856 	struct v4l2_mbus_frame_desc fd = { };
857 	int i, ret;
858 	int pad;
859 
860 	for (i = 0; i < num_planes; i++)
861 		fd.entry[i].length = plane_fmt[i].sizeimage;
862 
863 	pad = sensor->entity.num_pads - 1;
864 	if (try)
865 		ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
866 	else
867 		ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
868 
869 	if (ret < 0)
870 		return ret;
871 
872 	if (num_planes != fd.num_entries)
873 		return -EINVAL;
874 
875 	for (i = 0; i < num_planes; i++)
876 		plane_fmt[i].sizeimage = fd.entry[i].length;
877 
878 	if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
879 		v4l2_err(sensor->v4l2_dev,  "Unsupported buffer size: %u\n",
880 			 fd.entry[0].length);
881 
882 		return -EINVAL;
883 	}
884 
885 	return 0;
886 }
887 
888 static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
889 				 struct v4l2_format *f)
890 {
891 	struct fimc_dev *fimc = video_drvdata(file);
892 
893 	__fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
894 	return 0;
895 }
896 
897 /*
898  * Try or set format on the fimc.X.capture video node and additionally
899  * on the whole pipeline if @try is false.
900  * Locking: the caller must _not_ hold the graph mutex.
901  */
902 static int __video_try_or_set_format(struct fimc_dev *fimc,
903 				     struct v4l2_format *f, bool try,
904 				     const struct fimc_fmt **inp_fmt,
905 				     const struct fimc_fmt **out_fmt)
906 {
907 	struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
908 	struct fimc_vid_cap *vc = &fimc->vid_cap;
909 	struct exynos_video_entity *ve = &vc->ve;
910 	struct fimc_ctx *ctx = vc->ctx;
911 	unsigned int width = 0, height = 0;
912 	int ret = 0;
913 
914 	/* Pre-configure format at the camera input interface, for JPEG only */
915 	if (fimc_jpeg_fourcc(pix->pixelformat)) {
916 		fimc_capture_try_format(ctx, &pix->width, &pix->height,
917 					NULL, &pix->pixelformat,
918 					FIMC_SD_PAD_SINK_CAM);
919 		if (try) {
920 			width = pix->width;
921 			height = pix->height;
922 		} else {
923 			ctx->s_frame.f_width = pix->width;
924 			ctx->s_frame.f_height = pix->height;
925 		}
926 	}
927 
928 	/* Try the format at the scaler and the DMA output */
929 	*out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
930 					  NULL, &pix->pixelformat,
931 					  FIMC_SD_PAD_SOURCE);
932 	if (*out_fmt == NULL)
933 		return -EINVAL;
934 
935 	/* Restore image width/height for JPEG (no resizing supported). */
936 	if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
937 		pix->width = width;
938 		pix->height = height;
939 	}
940 
941 	/* Try to match format at the host and the sensor */
942 	if (!vc->user_subdev_api) {
943 		struct v4l2_mbus_framefmt mbus_fmt;
944 		struct v4l2_mbus_framefmt *mf;
945 
946 		mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
947 
948 		mf->code = (*out_fmt)->mbus_code;
949 		mf->width = pix->width;
950 		mf->height = pix->height;
951 
952 		fimc_md_graph_lock(ve);
953 		ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
954 		fimc_md_graph_unlock(ve);
955 
956 		if (ret < 0)
957 			return ret;
958 
959 		pix->width = mf->width;
960 		pix->height = mf->height;
961 	}
962 
963 	fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
964 
965 	if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
966 		struct v4l2_subdev *sensor;
967 
968 		fimc_md_graph_lock(ve);
969 
970 		sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
971 		if (sensor)
972 			fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
973 						   (*out_fmt)->memplanes, try);
974 		else
975 			ret = -EPIPE;
976 
977 		fimc_md_graph_unlock(ve);
978 	}
979 
980 	return ret;
981 }
982 
983 static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
984 				   struct v4l2_format *f)
985 {
986 	struct fimc_dev *fimc = video_drvdata(file);
987 	const struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
988 
989 	return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
990 }
991 
992 static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
993 					enum fimc_color_fmt color)
994 {
995 	bool jpeg = fimc_fmt_is_user_defined(color);
996 
997 	ctx->scaler.enabled = !jpeg;
998 	fimc_ctrls_activate(ctx, !jpeg);
999 
1000 	if (jpeg)
1001 		set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1002 	else
1003 		clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1004 }
1005 
1006 static int __fimc_capture_set_format(struct fimc_dev *fimc,
1007 				     struct v4l2_format *f)
1008 {
1009 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1010 	struct fimc_ctx *ctx = vc->ctx;
1011 	const struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
1012 	struct fimc_frame *ff = &ctx->d_frame;
1013 	const struct fimc_fmt *inp_fmt = NULL;
1014 	int ret, i;
1015 
1016 	if (vb2_is_busy(&fimc->vid_cap.vbq))
1017 		return -EBUSY;
1018 
1019 	ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
1020 	if (ret < 0)
1021 		return ret;
1022 
1023 	/* Update RGB Alpha control state and value range */
1024 	fimc_alpha_ctrl_update(ctx);
1025 
1026 	for (i = 0; i < ff->fmt->memplanes; i++) {
1027 		ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
1028 		ff->payload[i] = pix->plane_fmt[i].sizeimage;
1029 	}
1030 
1031 	set_frame_bounds(ff, pix->width, pix->height);
1032 	/* Reset the composition rectangle if not yet configured */
1033 	if (!(ctx->state & FIMC_COMPOSE))
1034 		set_frame_crop(ff, 0, 0, pix->width, pix->height);
1035 
1036 	fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
1037 
1038 	/* Reset cropping and set format at the camera interface input */
1039 	if (!vc->user_subdev_api) {
1040 		ctx->s_frame.fmt = inp_fmt;
1041 		set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
1042 		set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
1043 	}
1044 
1045 	return ret;
1046 }
1047 
1048 static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
1049 				 struct v4l2_format *f)
1050 {
1051 	struct fimc_dev *fimc = video_drvdata(file);
1052 
1053 	return __fimc_capture_set_format(fimc, f);
1054 }
1055 
1056 static int fimc_cap_enum_input(struct file *file, void *priv,
1057 			       struct v4l2_input *i)
1058 {
1059 	struct fimc_dev *fimc = video_drvdata(file);
1060 	struct exynos_video_entity *ve = &fimc->vid_cap.ve;
1061 	struct v4l2_subdev *sd;
1062 
1063 	if (i->index != 0)
1064 		return -EINVAL;
1065 
1066 	i->type = V4L2_INPUT_TYPE_CAMERA;
1067 	fimc_md_graph_lock(ve);
1068 	sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
1069 	fimc_md_graph_unlock(ve);
1070 
1071 	if (sd)
1072 		strscpy(i->name, sd->name, sizeof(i->name));
1073 
1074 	return 0;
1075 }
1076 
1077 static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
1078 {
1079 	return i == 0 ? i : -EINVAL;
1080 }
1081 
1082 static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
1083 {
1084 	*i = 0;
1085 	return 0;
1086 }
1087 
1088 /**
1089  * fimc_pipeline_validate - check for formats inconsistencies
1090  *                          between source and sink pad of each link
1091  * @fimc:	the FIMC device this context applies to
1092  *
1093  * Return 0 if all formats match or -EPIPE otherwise.
1094  */
1095 static int fimc_pipeline_validate(struct fimc_dev *fimc)
1096 {
1097 	struct v4l2_subdev_format sink_fmt = {
1098 		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1099 	};
1100 	struct v4l2_subdev_format src_fmt = {
1101 		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1102 	};
1103 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1104 	struct v4l2_subdev *sd = &vc->subdev;
1105 	struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
1106 	struct media_pad *sink_pad, *src_pad;
1107 	int i, ret;
1108 
1109 	while (1) {
1110 		/*
1111 		 * Find current entity sink pad and any remote sink pad linked
1112 		 * to it. We stop if there is no sink pad in current entity or
1113 		 * it is not linked to any other remote entity.
1114 		 */
1115 		src_pad = NULL;
1116 
1117 		for (i = 0; i < sd->entity.num_pads; i++) {
1118 			struct media_pad *p = &sd->entity.pads[i];
1119 
1120 			if (p->flags & MEDIA_PAD_FL_SINK) {
1121 				sink_pad = p;
1122 				src_pad = media_pad_remote_pad_first(sink_pad);
1123 				if (src_pad)
1124 					break;
1125 			}
1126 		}
1127 
1128 		if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
1129 			break;
1130 
1131 		/* Don't call FIMC subdev operation to avoid nested locking */
1132 		if (sd == &vc->subdev) {
1133 			const struct fimc_frame *ff = &vc->ctx->s_frame;
1134 			sink_fmt.format.width = ff->f_width;
1135 			sink_fmt.format.height = ff->f_height;
1136 			sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1137 		} else {
1138 			sink_fmt.pad = sink_pad->index;
1139 			ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1140 			if (ret < 0 && ret != -ENOIOCTLCMD)
1141 				return -EPIPE;
1142 		}
1143 
1144 		/* Retrieve format at the source pad */
1145 		sd = media_entity_to_v4l2_subdev(src_pad->entity);
1146 		src_fmt.pad = src_pad->index;
1147 		ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1148 		if (ret < 0 && ret != -ENOIOCTLCMD)
1149 			return -EPIPE;
1150 
1151 		if (src_fmt.format.width != sink_fmt.format.width ||
1152 		    src_fmt.format.height != sink_fmt.format.height ||
1153 		    src_fmt.format.code != sink_fmt.format.code)
1154 			return -EPIPE;
1155 
1156 		if (sd == p->subdevs[IDX_SENSOR] &&
1157 		    fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
1158 			struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
1159 			const struct fimc_frame *frame = &vc->ctx->d_frame;
1160 			unsigned int i;
1161 
1162 			ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
1163 							 frame->fmt->memplanes,
1164 							 false);
1165 			if (ret < 0)
1166 				return -EPIPE;
1167 
1168 			for (i = 0; i < frame->fmt->memplanes; i++)
1169 				if (frame->payload[i] < plane_fmt[i].sizeimage)
1170 					return -EPIPE;
1171 		}
1172 	}
1173 	return 0;
1174 }
1175 
1176 static int fimc_cap_streamon(struct file *file, void *priv,
1177 			     enum v4l2_buf_type type)
1178 {
1179 	struct fimc_dev *fimc = video_drvdata(file);
1180 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1181 	struct fimc_source_info *si = NULL;
1182 	struct v4l2_subdev *sd;
1183 	int ret;
1184 
1185 	if (fimc_capture_active(fimc))
1186 		return -EBUSY;
1187 
1188 	ret = video_device_pipeline_start(&vc->ve.vdev, &vc->ve.pipe->mp);
1189 	if (ret < 0)
1190 		return ret;
1191 
1192 	sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
1193 	if (sd)
1194 		si = v4l2_get_subdev_hostdata(sd);
1195 
1196 	if (si == NULL) {
1197 		ret = -EPIPE;
1198 		goto err_p_stop;
1199 	}
1200 	/*
1201 	 * Save configuration data related to currently attached image
1202 	 * sensor or other data source, e.g. FIMC-IS.
1203 	 */
1204 	vc->source_config = *si;
1205 
1206 	if (vc->input == GRP_ID_FIMC_IS)
1207 		vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
1208 
1209 	if (vc->user_subdev_api) {
1210 		ret = fimc_pipeline_validate(fimc);
1211 		if (ret < 0)
1212 			goto err_p_stop;
1213 	}
1214 
1215 	ret = vb2_ioctl_streamon(file, priv, type);
1216 	if (!ret) {
1217 		vc->streaming = true;
1218 		return ret;
1219 	}
1220 
1221 err_p_stop:
1222 	video_device_pipeline_stop(&vc->ve.vdev);
1223 	return ret;
1224 }
1225 
1226 static int fimc_cap_streamoff(struct file *file, void *priv,
1227 			    enum v4l2_buf_type type)
1228 {
1229 	struct fimc_dev *fimc = video_drvdata(file);
1230 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1231 	int ret;
1232 
1233 	ret = vb2_ioctl_streamoff(file, priv, type);
1234 	if (ret < 0)
1235 		return ret;
1236 
1237 	if (vc->streaming) {
1238 		video_device_pipeline_stop(&vc->ve.vdev);
1239 		vc->streaming = false;
1240 	}
1241 
1242 	return 0;
1243 }
1244 
1245 static int fimc_cap_reqbufs(struct file *file, void *priv,
1246 			    struct v4l2_requestbuffers *reqbufs)
1247 {
1248 	struct fimc_dev *fimc = video_drvdata(file);
1249 	int ret;
1250 
1251 	ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
1252 
1253 	if (!ret)
1254 		fimc->vid_cap.reqbufs_count = reqbufs->count;
1255 
1256 	return ret;
1257 }
1258 
1259 static int fimc_cap_g_selection(struct file *file, void *fh,
1260 				struct v4l2_selection *s)
1261 {
1262 	struct fimc_dev *fimc = video_drvdata(file);
1263 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1264 	const struct fimc_frame *f = &ctx->s_frame;
1265 
1266 	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1267 		return -EINVAL;
1268 
1269 	switch (s->target) {
1270 	case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1271 	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1272 		f = &ctx->d_frame;
1273 		fallthrough;
1274 	case V4L2_SEL_TGT_CROP_BOUNDS:
1275 	case V4L2_SEL_TGT_CROP_DEFAULT:
1276 		s->r.left = 0;
1277 		s->r.top = 0;
1278 		s->r.width = f->o_width;
1279 		s->r.height = f->o_height;
1280 		return 0;
1281 
1282 	case V4L2_SEL_TGT_COMPOSE:
1283 		f = &ctx->d_frame;
1284 		fallthrough;
1285 	case V4L2_SEL_TGT_CROP:
1286 		s->r.left = f->offs_h;
1287 		s->r.top = f->offs_v;
1288 		s->r.width = f->width;
1289 		s->r.height = f->height;
1290 		return 0;
1291 	}
1292 
1293 	return -EINVAL;
1294 }
1295 
1296 static int fimc_cap_s_selection(struct file *file, void *fh,
1297 				struct v4l2_selection *s)
1298 {
1299 	struct fimc_dev *fimc = video_drvdata(file);
1300 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1301 	struct v4l2_rect rect = s->r;
1302 	struct fimc_frame *f;
1303 	unsigned long flags;
1304 
1305 	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1306 		return -EINVAL;
1307 
1308 	if (s->target == V4L2_SEL_TGT_COMPOSE)
1309 		f = &ctx->d_frame;
1310 	else if (s->target == V4L2_SEL_TGT_CROP)
1311 		f = &ctx->s_frame;
1312 	else
1313 		return -EINVAL;
1314 
1315 	fimc_capture_try_selection(ctx, &rect, s->target);
1316 
1317 	if (s->flags & V4L2_SEL_FLAG_LE &&
1318 	    !v4l2_rect_enclosed(&rect, &s->r))
1319 		return -ERANGE;
1320 
1321 	if (s->flags & V4L2_SEL_FLAG_GE &&
1322 	    !v4l2_rect_enclosed(&s->r, &rect))
1323 		return -ERANGE;
1324 
1325 	s->r = rect;
1326 	spin_lock_irqsave(&fimc->slock, flags);
1327 	set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1328 		       s->r.height);
1329 	spin_unlock_irqrestore(&fimc->slock, flags);
1330 
1331 	set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1332 	return 0;
1333 }
1334 
1335 static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1336 	.vidioc_querycap		= fimc_cap_querycap,
1337 
1338 	.vidioc_enum_fmt_vid_cap	= fimc_cap_enum_fmt,
1339 	.vidioc_try_fmt_vid_cap_mplane	= fimc_cap_try_fmt_mplane,
1340 	.vidioc_s_fmt_vid_cap_mplane	= fimc_cap_s_fmt_mplane,
1341 	.vidioc_g_fmt_vid_cap_mplane	= fimc_cap_g_fmt_mplane,
1342 
1343 	.vidioc_reqbufs			= fimc_cap_reqbufs,
1344 	.vidioc_querybuf		= vb2_ioctl_querybuf,
1345 	.vidioc_qbuf			= vb2_ioctl_qbuf,
1346 	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
1347 	.vidioc_expbuf			= vb2_ioctl_expbuf,
1348 	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
1349 	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
1350 
1351 	.vidioc_streamon		= fimc_cap_streamon,
1352 	.vidioc_streamoff		= fimc_cap_streamoff,
1353 
1354 	.vidioc_g_selection		= fimc_cap_g_selection,
1355 	.vidioc_s_selection		= fimc_cap_s_selection,
1356 
1357 	.vidioc_enum_input		= fimc_cap_enum_input,
1358 	.vidioc_s_input			= fimc_cap_s_input,
1359 	.vidioc_g_input			= fimc_cap_g_input,
1360 };
1361 
1362 /* Capture subdev media entity operations */
1363 static int fimc_link_setup(struct media_entity *entity,
1364 			   const struct media_pad *local,
1365 			   const struct media_pad *remote, u32 flags)
1366 {
1367 	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1368 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1369 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1370 	struct v4l2_subdev *sensor;
1371 
1372 	if (!is_media_entity_v4l2_subdev(remote->entity))
1373 		return -EINVAL;
1374 
1375 	if (WARN_ON(fimc == NULL))
1376 		return 0;
1377 
1378 	dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1379 	    local->entity->name, remote->entity->name, flags,
1380 	    fimc->vid_cap.input);
1381 
1382 	if (!(flags & MEDIA_LNK_FL_ENABLED)) {
1383 		fimc->vid_cap.input = 0;
1384 		return 0;
1385 	}
1386 
1387 	if (vc->input != 0)
1388 		return -EBUSY;
1389 
1390 	vc->input = sd->grp_id;
1391 
1392 	if (vc->user_subdev_api)
1393 		return 0;
1394 
1395 	/* Inherit V4L2 controls from the image sensor subdev. */
1396 	sensor = fimc_find_remote_sensor(&vc->subdev.entity);
1397 	if (sensor == NULL)
1398 		return 0;
1399 
1400 	return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
1401 				     sensor->ctrl_handler, NULL, true);
1402 }
1403 
1404 static const struct media_entity_operations fimc_sd_media_ops = {
1405 	.link_setup = fimc_link_setup,
1406 };
1407 
1408 /**
1409  * fimc_sensor_notify - v4l2_device notification from a sensor subdev
1410  * @sd: pointer to a subdev generating the notification
1411  * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
1412  * @arg: pointer to an u32 type integer that stores the frame payload value
1413  *
1414  * The End Of Frame notification sent by sensor subdev in its still capture
1415  * mode. If there is only a single VSYNC generated by the sensor at the
1416  * beginning of a frame transmission, FIMC does not issue the LastIrq
1417  * (end of frame) interrupt. And this notification is used to complete the
1418  * frame capture and returning a buffer to user-space. Subdev drivers should
1419  * call this notification from their last 'End of frame capture' interrupt.
1420  */
1421 void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1422 			void *arg)
1423 {
1424 	struct fimc_source_info	*si;
1425 	struct fimc_vid_buffer *buf;
1426 	struct fimc_md *fmd;
1427 	struct fimc_dev *fimc;
1428 	unsigned long flags;
1429 
1430 	if (sd == NULL)
1431 		return;
1432 
1433 	si = v4l2_get_subdev_hostdata(sd);
1434 	fmd = entity_to_fimc_mdev(&sd->entity);
1435 
1436 	spin_lock_irqsave(&fmd->slock, flags);
1437 
1438 	fimc = si ? source_to_sensor_info(si)->host : NULL;
1439 
1440 	if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1441 	    test_bit(ST_CAPT_PEND, &fimc->state)) {
1442 		unsigned long irq_flags;
1443 		spin_lock_irqsave(&fimc->slock, irq_flags);
1444 		if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1445 			buf = list_entry(fimc->vid_cap.active_buf_q.next,
1446 					 struct fimc_vid_buffer, list);
1447 			vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
1448 					      *((u32 *)arg));
1449 		}
1450 		fimc_capture_irq_handler(fimc, 1);
1451 		fimc_deactivate_capture(fimc);
1452 		spin_unlock_irqrestore(&fimc->slock, irq_flags);
1453 	}
1454 	spin_unlock_irqrestore(&fmd->slock, flags);
1455 }
1456 
1457 static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1458 				      struct v4l2_subdev_state *sd_state,
1459 				      struct v4l2_subdev_mbus_code_enum *code)
1460 {
1461 	const struct fimc_fmt *fmt;
1462 
1463 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1464 	if (!fmt)
1465 		return -EINVAL;
1466 	code->code = fmt->mbus_code;
1467 	return 0;
1468 }
1469 
1470 static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1471 			       struct v4l2_subdev_state *sd_state,
1472 			       struct v4l2_subdev_format *fmt)
1473 {
1474 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1475 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1476 	const struct fimc_frame *ff = &ctx->s_frame;
1477 	struct v4l2_mbus_framefmt *mf;
1478 
1479 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1480 		mf = v4l2_subdev_state_get_format(sd_state, fmt->pad);
1481 		fmt->format = *mf;
1482 		return 0;
1483 	}
1484 
1485 	mf = &fmt->format;
1486 	mutex_lock(&fimc->lock);
1487 
1488 	switch (fmt->pad) {
1489 	case FIMC_SD_PAD_SOURCE:
1490 		if (!WARN_ON(ff->fmt == NULL))
1491 			mf->code = ff->fmt->mbus_code;
1492 		/* Sink pads crop rectangle size */
1493 		mf->width = ff->width;
1494 		mf->height = ff->height;
1495 		break;
1496 	case FIMC_SD_PAD_SINK_FIFO:
1497 		*mf = fimc->vid_cap.wb_fmt;
1498 		break;
1499 	case FIMC_SD_PAD_SINK_CAM:
1500 	default:
1501 		*mf = fimc->vid_cap.ci_fmt;
1502 		break;
1503 	}
1504 
1505 	mutex_unlock(&fimc->lock);
1506 	mf->colorspace = V4L2_COLORSPACE_JPEG;
1507 
1508 	return 0;
1509 }
1510 
1511 static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1512 			       struct v4l2_subdev_state *sd_state,
1513 			       struct v4l2_subdev_format *fmt)
1514 {
1515 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1516 	struct v4l2_mbus_framefmt *mf = &fmt->format;
1517 	struct fimc_vid_cap *vc = &fimc->vid_cap;
1518 	struct fimc_ctx *ctx = vc->ctx;
1519 	struct fimc_frame *ff;
1520 	const struct fimc_fmt *ffmt;
1521 
1522 	dbg("pad%d: code: 0x%x, %dx%d",
1523 	    fmt->pad, mf->code, mf->width, mf->height);
1524 
1525 	if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
1526 		return -EBUSY;
1527 
1528 	mutex_lock(&fimc->lock);
1529 	ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1530 				       &mf->code, NULL, fmt->pad);
1531 	mutex_unlock(&fimc->lock);
1532 	mf->colorspace = V4L2_COLORSPACE_JPEG;
1533 
1534 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1535 		mf = v4l2_subdev_state_get_format(sd_state, fmt->pad);
1536 		*mf = fmt->format;
1537 		return 0;
1538 	}
1539 	/* There must be a bug in the driver if this happens */
1540 	if (WARN_ON(ffmt == NULL))
1541 		return -EINVAL;
1542 
1543 	/* Update RGB Alpha control state and value range */
1544 	fimc_alpha_ctrl_update(ctx);
1545 
1546 	fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
1547 	if (fmt->pad == FIMC_SD_PAD_SOURCE) {
1548 		ff = &ctx->d_frame;
1549 		/* Sink pads crop rectangle size */
1550 		mf->width = ctx->s_frame.width;
1551 		mf->height = ctx->s_frame.height;
1552 	} else {
1553 		ff = &ctx->s_frame;
1554 	}
1555 
1556 	mutex_lock(&fimc->lock);
1557 	set_frame_bounds(ff, mf->width, mf->height);
1558 
1559 	if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
1560 		vc->wb_fmt = *mf;
1561 	else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
1562 		vc->ci_fmt = *mf;
1563 
1564 	ff->fmt = ffmt;
1565 
1566 	/* Reset the crop rectangle if required. */
1567 	if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
1568 		set_frame_crop(ff, 0, 0, mf->width, mf->height);
1569 
1570 	if (fmt->pad != FIMC_SD_PAD_SOURCE)
1571 		ctx->state &= ~FIMC_COMPOSE;
1572 
1573 	mutex_unlock(&fimc->lock);
1574 	return 0;
1575 }
1576 
1577 static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1578 				     struct v4l2_subdev_state *sd_state,
1579 				     struct v4l2_subdev_selection *sel)
1580 {
1581 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1582 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1583 	const struct fimc_frame *f = &ctx->s_frame;
1584 	struct v4l2_rect *r = &sel->r;
1585 	struct v4l2_rect *try_sel;
1586 
1587 	if (sel->pad == FIMC_SD_PAD_SOURCE)
1588 		return -EINVAL;
1589 
1590 	mutex_lock(&fimc->lock);
1591 
1592 	switch (sel->target) {
1593 	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1594 		f = &ctx->d_frame;
1595 		fallthrough;
1596 	case V4L2_SEL_TGT_CROP_BOUNDS:
1597 		r->width = f->o_width;
1598 		r->height = f->o_height;
1599 		r->left = 0;
1600 		r->top = 0;
1601 		mutex_unlock(&fimc->lock);
1602 		return 0;
1603 
1604 	case V4L2_SEL_TGT_CROP:
1605 		try_sel = v4l2_subdev_state_get_crop(sd_state, sel->pad);
1606 		break;
1607 	case V4L2_SEL_TGT_COMPOSE:
1608 		try_sel = v4l2_subdev_state_get_compose(sd_state, sel->pad);
1609 		f = &ctx->d_frame;
1610 		break;
1611 	default:
1612 		mutex_unlock(&fimc->lock);
1613 		return -EINVAL;
1614 	}
1615 
1616 	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1617 		sel->r = *try_sel;
1618 	} else {
1619 		r->left = f->offs_h;
1620 		r->top = f->offs_v;
1621 		r->width = f->width;
1622 		r->height = f->height;
1623 	}
1624 
1625 	dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1626 	    sel->pad, r->left, r->top, r->width, r->height,
1627 	    f->f_width, f->f_height);
1628 
1629 	mutex_unlock(&fimc->lock);
1630 	return 0;
1631 }
1632 
1633 static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1634 				     struct v4l2_subdev_state *sd_state,
1635 				     struct v4l2_subdev_selection *sel)
1636 {
1637 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1638 	struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1639 	struct fimc_frame *f = &ctx->s_frame;
1640 	struct v4l2_rect *r = &sel->r;
1641 	struct v4l2_rect *try_sel;
1642 	unsigned long flags;
1643 
1644 	if (sel->pad == FIMC_SD_PAD_SOURCE)
1645 		return -EINVAL;
1646 
1647 	mutex_lock(&fimc->lock);
1648 	fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
1649 
1650 	switch (sel->target) {
1651 	case V4L2_SEL_TGT_CROP:
1652 		try_sel = v4l2_subdev_state_get_crop(sd_state, sel->pad);
1653 		break;
1654 	case V4L2_SEL_TGT_COMPOSE:
1655 		try_sel = v4l2_subdev_state_get_compose(sd_state, sel->pad);
1656 		f = &ctx->d_frame;
1657 		break;
1658 	default:
1659 		mutex_unlock(&fimc->lock);
1660 		return -EINVAL;
1661 	}
1662 
1663 	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1664 		*try_sel = sel->r;
1665 	} else {
1666 		spin_lock_irqsave(&fimc->slock, flags);
1667 		set_frame_crop(f, r->left, r->top, r->width, r->height);
1668 		set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1669 		if (sel->target == V4L2_SEL_TGT_COMPOSE)
1670 			ctx->state |= FIMC_COMPOSE;
1671 		spin_unlock_irqrestore(&fimc->slock, flags);
1672 	}
1673 
1674 	dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
1675 	    r->width, r->height);
1676 
1677 	mutex_unlock(&fimc->lock);
1678 	return 0;
1679 }
1680 
1681 static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1682 	.enum_mbus_code = fimc_subdev_enum_mbus_code,
1683 	.get_selection = fimc_subdev_get_selection,
1684 	.set_selection = fimc_subdev_set_selection,
1685 	.get_fmt = fimc_subdev_get_fmt,
1686 	.set_fmt = fimc_subdev_set_fmt,
1687 };
1688 
1689 static const struct v4l2_subdev_ops fimc_subdev_ops = {
1690 	.pad = &fimc_subdev_pad_ops,
1691 };
1692 
1693 /* Set default format at the sensor and host interface */
1694 static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1695 {
1696 	struct v4l2_format fmt = {
1697 		.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1698 		.fmt.pix_mp = {
1699 			.width		= FIMC_DEFAULT_WIDTH,
1700 			.height		= FIMC_DEFAULT_HEIGHT,
1701 			.pixelformat	= V4L2_PIX_FMT_YUYV,
1702 			.field		= V4L2_FIELD_NONE,
1703 			.colorspace	= V4L2_COLORSPACE_JPEG,
1704 		},
1705 	};
1706 
1707 	return __fimc_capture_set_format(fimc, &fmt);
1708 }
1709 
1710 /* fimc->lock must be already initialized */
1711 static int fimc_register_capture_device(struct fimc_dev *fimc,
1712 				 struct v4l2_device *v4l2_dev)
1713 {
1714 	struct video_device *vfd = &fimc->vid_cap.ve.vdev;
1715 	struct vb2_queue *q = &fimc->vid_cap.vbq;
1716 	struct fimc_vid_cap *vid_cap;
1717 	const struct fimc_fmt *fmt;
1718 	struct fimc_ctx *ctx;
1719 	int ret = -ENOMEM;
1720 
1721 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1722 	if (!ctx)
1723 		return -ENOMEM;
1724 
1725 	ctx->fimc_dev	 = fimc;
1726 	ctx->in_path	 = FIMC_IO_CAMERA;
1727 	ctx->out_path	 = FIMC_IO_DMA;
1728 	ctx->state	 = FIMC_CTX_CAP;
1729 	ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1730 	ctx->d_frame.fmt = ctx->s_frame.fmt;
1731 
1732 	memset(vfd, 0, sizeof(*vfd));
1733 	snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
1734 
1735 	vfd->fops	= &fimc_capture_fops;
1736 	vfd->ioctl_ops	= &fimc_capture_ioctl_ops;
1737 	vfd->v4l2_dev	= v4l2_dev;
1738 	vfd->minor	= -1;
1739 	vfd->release	= video_device_release_empty;
1740 	vfd->queue	= q;
1741 	vfd->lock	= &fimc->lock;
1742 	vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
1743 
1744 	video_set_drvdata(vfd, fimc);
1745 	vid_cap = &fimc->vid_cap;
1746 	vid_cap->active_buf_cnt = 0;
1747 	vid_cap->reqbufs_count = 0;
1748 	vid_cap->ctx = ctx;
1749 
1750 	INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1751 	INIT_LIST_HEAD(&vid_cap->active_buf_q);
1752 
1753 	memset(q, 0, sizeof(*q));
1754 	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1755 	q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
1756 	q->drv_priv = ctx;
1757 	q->ops = &fimc_capture_qops;
1758 	q->mem_ops = &vb2_dma_contig_memops;
1759 	q->buf_struct_size = sizeof(struct fimc_vid_buffer);
1760 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1761 	q->lock = &fimc->lock;
1762 	q->dev = &fimc->pdev->dev;
1763 
1764 	ret = vb2_queue_init(q);
1765 	if (ret)
1766 		goto err_free_ctx;
1767 
1768 	/* Default format configuration */
1769 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1770 	vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
1771 	vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
1772 	vid_cap->ci_fmt.code = fmt->mbus_code;
1773 
1774 	ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
1775 	ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
1776 	ctx->s_frame.fmt = fmt;
1777 
1778 	fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
1779 	vid_cap->wb_fmt = vid_cap->ci_fmt;
1780 	vid_cap->wb_fmt.code = fmt->mbus_code;
1781 
1782 	vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1783 	vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1784 	ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
1785 	if (ret)
1786 		goto err_free_ctx;
1787 
1788 	ret = fimc_ctrls_create(ctx);
1789 	if (ret)
1790 		goto err_me_cleanup;
1791 
1792 	ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
1793 	if (ret)
1794 		goto err_ctrl_free;
1795 
1796 	v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1797 		  vfd->name, video_device_node_name(vfd));
1798 
1799 	vfd->ctrl_handler = &ctx->ctrls.handler;
1800 	return 0;
1801 
1802 err_ctrl_free:
1803 	fimc_ctrls_delete(ctx);
1804 err_me_cleanup:
1805 	media_entity_cleanup(&vfd->entity);
1806 err_free_ctx:
1807 	kfree(ctx);
1808 	return ret;
1809 }
1810 
1811 static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
1812 {
1813 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1814 	int ret;
1815 
1816 	if (fimc == NULL)
1817 		return -ENXIO;
1818 
1819 	ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1820 	if (ret)
1821 		return ret;
1822 
1823 	fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
1824 
1825 	ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
1826 	if (ret) {
1827 		fimc_unregister_m2m_device(fimc);
1828 		fimc->vid_cap.ve.pipe = NULL;
1829 	}
1830 
1831 	return ret;
1832 }
1833 
1834 static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1835 {
1836 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1837 	struct video_device *vdev;
1838 
1839 	if (fimc == NULL)
1840 		return;
1841 
1842 	mutex_lock(&fimc->lock);
1843 
1844 	fimc_unregister_m2m_device(fimc);
1845 	vdev = &fimc->vid_cap.ve.vdev;
1846 
1847 	if (video_is_registered(vdev)) {
1848 		video_unregister_device(vdev);
1849 		media_entity_cleanup(&vdev->entity);
1850 		fimc_ctrls_delete(fimc->vid_cap.ctx);
1851 		fimc->vid_cap.ve.pipe = NULL;
1852 	}
1853 	kfree(fimc->vid_cap.ctx);
1854 	fimc->vid_cap.ctx = NULL;
1855 
1856 	mutex_unlock(&fimc->lock);
1857 }
1858 
1859 static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1860 	.registered = fimc_capture_subdev_registered,
1861 	.unregistered = fimc_capture_subdev_unregistered,
1862 };
1863 
1864 int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1865 {
1866 	struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1867 	int ret;
1868 
1869 	v4l2_subdev_init(sd, &fimc_subdev_ops);
1870 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1871 	snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
1872 
1873 	fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
1874 	fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
1875 	fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1876 	ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
1877 				fimc->vid_cap.sd_pads);
1878 	if (ret)
1879 		return ret;
1880 
1881 	sd->entity.ops = &fimc_sd_media_ops;
1882 	sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1883 	sd->internal_ops = &fimc_capture_sd_internal_ops;
1884 	v4l2_set_subdevdata(sd, fimc);
1885 	return 0;
1886 }
1887 
1888 void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1889 {
1890 	struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1891 
1892 	v4l2_device_unregister_subdev(sd);
1893 	media_entity_cleanup(&sd->entity);
1894 	v4l2_set_subdevdata(sd, NULL);
1895 }
1896