1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Rockchip ISP1 Driver - V4l resizer device 4 * 5 * Copyright (C) 2019 Collabora, Ltd. 6 * 7 * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd. 8 * Copyright (C) 2017 Rockchip Electronics Co., Ltd. 9 */ 10 11 #include "rkisp1-common.h" 12 13 #define RKISP1_RSZ_SP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_selfpath" 14 #define RKISP1_RSZ_MP_DEV_NAME RKISP1_DRIVER_NAME "_resizer_mainpath" 15 16 #define RKISP1_DEF_FMT MEDIA_BUS_FMT_YUYV8_2X8 17 #define RKISP1_DEF_PIXEL_ENC V4L2_PIXEL_ENC_YUV 18 19 struct rkisp1_rsz_yuv_mbus_info { 20 u32 mbus_code; 21 u32 hdiv; 22 u32 vdiv; 23 }; 24 25 static const struct rkisp1_rsz_yuv_mbus_info rkisp1_rsz_yuv_src_formats[] = { 26 { 27 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, /* YUV422 */ 28 .hdiv = 2, 29 .vdiv = 1, 30 }, 31 { 32 .mbus_code = MEDIA_BUS_FMT_YUYV8_1_5X8, /* YUV420 */ 33 .hdiv = 2, 34 .vdiv = 2, 35 }, 36 }; 37 38 static const struct rkisp1_rsz_yuv_mbus_info *rkisp1_rsz_get_yuv_mbus_info(u32 mbus_code) 39 { 40 unsigned int i; 41 42 for (i = 0; i < ARRAY_SIZE(rkisp1_rsz_yuv_src_formats); i++) { 43 if (rkisp1_rsz_yuv_src_formats[i].mbus_code == mbus_code) 44 return &rkisp1_rsz_yuv_src_formats[i]; 45 } 46 47 return NULL; 48 } 49 50 enum rkisp1_shadow_regs_when { 51 RKISP1_SHADOW_REGS_SYNC, 52 RKISP1_SHADOW_REGS_ASYNC, 53 }; 54 55 struct rkisp1_rsz_config { 56 /* constrains */ 57 const int max_rsz_width; 58 const int max_rsz_height; 59 const int min_rsz_width; 60 const int min_rsz_height; 61 /* registers */ 62 struct { 63 u32 yuvmode_mask; 64 u32 rawmode_mask; 65 u32 h_offset; 66 u32 v_offset; 67 u32 h_size; 68 u32 v_size; 69 } dual_crop; 70 }; 71 72 static const struct rkisp1_rsz_config rkisp1_rsz_config_mp = { 73 /* constraints */ 74 .max_rsz_width = RKISP1_RSZ_MP_SRC_MAX_WIDTH, 75 .max_rsz_height = RKISP1_RSZ_MP_SRC_MAX_HEIGHT, 76 .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH, 77 .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT, 78 /* registers */ 79 .dual_crop = { 80 .yuvmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_YUV, 81 .rawmode_mask = RKISP1_CIF_DUAL_CROP_MP_MODE_RAW, 82 .h_offset = RKISP1_CIF_DUAL_CROP_M_H_OFFS, 83 .v_offset = RKISP1_CIF_DUAL_CROP_M_V_OFFS, 84 .h_size = RKISP1_CIF_DUAL_CROP_M_H_SIZE, 85 .v_size = RKISP1_CIF_DUAL_CROP_M_V_SIZE, 86 }, 87 }; 88 89 static const struct rkisp1_rsz_config rkisp1_rsz_config_sp = { 90 /* constraints */ 91 .max_rsz_width = RKISP1_RSZ_SP_SRC_MAX_WIDTH, 92 .max_rsz_height = RKISP1_RSZ_SP_SRC_MAX_HEIGHT, 93 .min_rsz_width = RKISP1_RSZ_SRC_MIN_WIDTH, 94 .min_rsz_height = RKISP1_RSZ_SRC_MIN_HEIGHT, 95 /* registers */ 96 .dual_crop = { 97 .yuvmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_YUV, 98 .rawmode_mask = RKISP1_CIF_DUAL_CROP_SP_MODE_RAW, 99 .h_offset = RKISP1_CIF_DUAL_CROP_S_H_OFFS, 100 .v_offset = RKISP1_CIF_DUAL_CROP_S_V_OFFS, 101 .h_size = RKISP1_CIF_DUAL_CROP_S_H_SIZE, 102 .v_size = RKISP1_CIF_DUAL_CROP_S_V_SIZE, 103 }, 104 }; 105 106 static inline u32 rkisp1_rsz_read(struct rkisp1_resizer *rsz, u32 offset) 107 { 108 return rkisp1_read(rsz->rkisp1, rsz->regs_base + offset); 109 } 110 111 static inline void rkisp1_rsz_write(struct rkisp1_resizer *rsz, u32 offset, 112 u32 value) 113 { 114 rkisp1_write(rsz->rkisp1, rsz->regs_base + offset, value); 115 } 116 117 /* ---------------------------------------------------------------------------- 118 * Dual crop hw configs 119 */ 120 121 static void rkisp1_dcrop_disable(struct rkisp1_resizer *rsz, 122 enum rkisp1_shadow_regs_when when) 123 { 124 u32 dc_ctrl = rkisp1_read(rsz->rkisp1, RKISP1_CIF_DUAL_CROP_CTRL); 125 u32 mask = ~(rsz->config->dual_crop.yuvmode_mask | 126 rsz->config->dual_crop.rawmode_mask); 127 128 dc_ctrl &= mask; 129 if (when == RKISP1_SHADOW_REGS_ASYNC) 130 dc_ctrl |= RKISP1_CIF_DUAL_CROP_GEN_CFG_UPD; 131 else 132 dc_ctrl |= RKISP1_CIF_DUAL_CROP_CFG_UPD; 133 rkisp1_write(rsz->rkisp1, RKISP1_CIF_DUAL_CROP_CTRL, dc_ctrl); 134 } 135 136 /* configure dual-crop unit */ 137 static void rkisp1_dcrop_config(struct rkisp1_resizer *rsz, 138 struct v4l2_subdev_state *sd_state) 139 { 140 struct rkisp1_device *rkisp1 = rsz->rkisp1; 141 struct v4l2_mbus_framefmt *sink_fmt; 142 struct v4l2_rect *sink_crop; 143 u32 dc_ctrl; 144 145 sink_crop = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state, 146 RKISP1_RSZ_PAD_SINK); 147 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 148 RKISP1_RSZ_PAD_SINK); 149 150 if (sink_crop->width == sink_fmt->width && 151 sink_crop->height == sink_fmt->height && 152 sink_crop->left == 0 && sink_crop->top == 0) { 153 rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_SYNC); 154 dev_dbg(rkisp1->dev, "capture %d crop disabled\n", rsz->id); 155 return; 156 } 157 158 dc_ctrl = rkisp1_read(rkisp1, RKISP1_CIF_DUAL_CROP_CTRL); 159 rkisp1_write(rkisp1, rsz->config->dual_crop.h_offset, sink_crop->left); 160 rkisp1_write(rkisp1, rsz->config->dual_crop.v_offset, sink_crop->top); 161 rkisp1_write(rkisp1, rsz->config->dual_crop.h_size, sink_crop->width); 162 rkisp1_write(rkisp1, rsz->config->dual_crop.v_size, sink_crop->height); 163 dc_ctrl |= rsz->config->dual_crop.yuvmode_mask; 164 dc_ctrl |= RKISP1_CIF_DUAL_CROP_CFG_UPD; 165 rkisp1_write(rkisp1, RKISP1_CIF_DUAL_CROP_CTRL, dc_ctrl); 166 167 dev_dbg(rkisp1->dev, "stream %d crop: %dx%d -> %dx%d\n", rsz->id, 168 sink_fmt->width, sink_fmt->height, 169 sink_crop->width, sink_crop->height); 170 } 171 172 /* ---------------------------------------------------------------------------- 173 * Resizer hw configs 174 */ 175 176 static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz, 177 enum rkisp1_shadow_regs_when when) 178 { 179 u32 ctrl_cfg = rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL); 180 181 if (when == RKISP1_SHADOW_REGS_ASYNC) 182 ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO; 183 else 184 ctrl_cfg |= RKISP1_CIF_RSZ_CTRL_CFG_UPD; 185 186 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, ctrl_cfg); 187 } 188 189 static u32 rkisp1_rsz_calc_ratio(u32 len_sink, u32 len_src) 190 { 191 if (len_sink < len_src) 192 return ((len_sink - 1) * RKISP1_CIF_RSZ_SCALER_FACTOR) / 193 (len_src - 1); 194 195 return ((len_src - 1) * RKISP1_CIF_RSZ_SCALER_FACTOR) / 196 (len_sink - 1) + 1; 197 } 198 199 static void rkisp1_rsz_disable(struct rkisp1_resizer *rsz, 200 enum rkisp1_shadow_regs_when when) 201 { 202 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, 0); 203 204 if (when == RKISP1_SHADOW_REGS_SYNC) 205 rkisp1_rsz_update_shadow(rsz, when); 206 } 207 208 static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz, 209 const struct v4l2_rect *sink_y, 210 const struct v4l2_rect *sink_c, 211 const struct v4l2_area *src_y, 212 const struct v4l2_area *src_c, 213 enum rkisp1_shadow_regs_when when) 214 { 215 u32 ratio, rsz_ctrl = 0; 216 unsigned int i; 217 218 /* No phase offset */ 219 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0); 220 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HC, 0); 221 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VY, 0); 222 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_VC, 0); 223 224 /* Linear interpolation */ 225 for (i = 0; i < 64; i++) { 226 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT_ADDR, i); 227 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_LUT, i); 228 } 229 230 if (sink_y->width != src_y->width) { 231 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_ENABLE; 232 if (sink_y->width < src_y->width) 233 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HY_UP; 234 ratio = rkisp1_rsz_calc_ratio(sink_y->width, src_y->width); 235 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HY, ratio); 236 } 237 238 if (sink_c->width != src_c->width) { 239 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_ENABLE; 240 if (sink_c->width < src_c->width) 241 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_HC_UP; 242 ratio = rkisp1_rsz_calc_ratio(sink_c->width, src_c->width); 243 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCB, ratio); 244 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_HCR, ratio); 245 } 246 247 if (sink_y->height != src_y->height) { 248 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_ENABLE; 249 if (sink_y->height < src_y->height) 250 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VY_UP; 251 ratio = rkisp1_rsz_calc_ratio(sink_y->height, src_y->height); 252 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VY, ratio); 253 } 254 255 if (sink_c->height != src_c->height) { 256 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_ENABLE; 257 if (sink_c->height < src_c->height) 258 rsz_ctrl |= RKISP1_CIF_RSZ_CTRL_SCALE_VC_UP; 259 ratio = rkisp1_rsz_calc_ratio(sink_c->height, src_c->height); 260 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_SCALE_VC, ratio); 261 } 262 263 rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl); 264 265 rkisp1_rsz_update_shadow(rsz, when); 266 } 267 268 static void rkisp1_rsz_config(struct rkisp1_resizer *rsz, 269 struct v4l2_subdev_state *sd_state, 270 enum rkisp1_shadow_regs_when when) 271 { 272 const struct rkisp1_rsz_yuv_mbus_info *sink_yuv_info, *src_yuv_info; 273 const struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; 274 const struct v4l2_rect *sink_y; 275 struct v4l2_area src_y, src_c; 276 struct v4l2_rect sink_c; 277 278 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 279 RKISP1_RSZ_PAD_SINK); 280 src_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 281 RKISP1_RSZ_PAD_SRC); 282 283 sink_yuv_info = rkisp1_rsz_get_yuv_mbus_info(sink_fmt->code); 284 src_yuv_info = rkisp1_rsz_get_yuv_mbus_info(src_fmt->code); 285 286 /* 287 * The resizer only works on yuv formats, so return if it is bayer 288 * format. 289 */ 290 if (!sink_yuv_info) { 291 rkisp1_rsz_disable(rsz, when); 292 return; 293 } 294 295 sink_y = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state, 296 RKISP1_RSZ_PAD_SINK); 297 sink_c.width = sink_y->width / sink_yuv_info->hdiv; 298 sink_c.height = sink_y->height / sink_yuv_info->vdiv; 299 300 src_y.width = src_fmt->width; 301 src_y.height = src_fmt->height; 302 src_c.width = src_y.width / src_yuv_info->hdiv; 303 src_c.height = src_y.height / src_yuv_info->vdiv; 304 305 /* 306 * The resizer is used not only to change the dimensions of the frame 307 * but also to change the subsampling for YUV formats (for instance 308 * converting from 4:2:2 to 4:2:0). Check both the luma and chroma 309 * dimensions to decide whether or not to enable the resizer. 310 */ 311 312 dev_dbg(rsz->rkisp1->dev, 313 "stream %u rsz/scale: Y %ux%u -> %ux%u, CbCr %ux%u -> %ux%u\n", 314 rsz->id, sink_y->width, sink_y->height, 315 src_fmt->width, src_fmt->height, 316 sink_c.width, sink_c.height, src_c.width, src_c.height); 317 318 if (sink_y->width == src_y.width && sink_y->height == src_y.height && 319 sink_c.width == src_c.width && sink_c.height == src_c.height) { 320 rkisp1_rsz_disable(rsz, when); 321 return; 322 } 323 324 /* Set values in the hardware. */ 325 rkisp1_rsz_config_regs(rsz, sink_y, &sink_c, &src_y, &src_c, when); 326 } 327 328 /* ---------------------------------------------------------------------------- 329 * Subdev pad operations 330 */ 331 332 static int rkisp1_rsz_enum_mbus_code(struct v4l2_subdev *sd, 333 struct v4l2_subdev_state *sd_state, 334 struct v4l2_subdev_mbus_code_enum *code) 335 { 336 struct rkisp1_resizer *rsz = 337 container_of(sd, struct rkisp1_resizer, sd); 338 struct v4l2_subdev_pad_config dummy_cfg; 339 struct v4l2_subdev_state pad_state = { 340 .pads = &dummy_cfg 341 }; 342 u32 pad = code->pad; 343 int ret; 344 345 if (code->pad == RKISP1_RSZ_PAD_SRC) { 346 /* supported mbus codes on the src are the same as in the capture */ 347 struct rkisp1_capture *cap = &rsz->rkisp1->capture_devs[rsz->id]; 348 349 return rkisp1_cap_enum_mbus_codes(cap, code); 350 } 351 352 /* 353 * The selfpath capture doesn't support bayer formats. Therefore the selfpath resizer 354 * should support only YUV422 on the sink pad 355 */ 356 if (rsz->id == RKISP1_SELFPATH) { 357 if (code->index > 0) 358 return -EINVAL; 359 code->code = MEDIA_BUS_FMT_YUYV8_2X8; 360 return 0; 361 } 362 363 /* supported mbus codes on the sink pad are the same as isp src pad */ 364 code->pad = RKISP1_ISP_PAD_SOURCE_VIDEO; 365 ret = v4l2_subdev_call(&rsz->rkisp1->isp.sd, pad, enum_mbus_code, 366 &pad_state, code); 367 368 /* restore pad */ 369 code->pad = pad; 370 code->flags = 0; 371 return ret; 372 } 373 374 static int rkisp1_rsz_init_config(struct v4l2_subdev *sd, 375 struct v4l2_subdev_state *sd_state) 376 { 377 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; 378 struct v4l2_rect *sink_crop; 379 380 sink_fmt = v4l2_subdev_get_pad_format(sd, sd_state, 381 RKISP1_RSZ_PAD_SRC); 382 sink_fmt->width = RKISP1_DEFAULT_WIDTH; 383 sink_fmt->height = RKISP1_DEFAULT_HEIGHT; 384 sink_fmt->field = V4L2_FIELD_NONE; 385 sink_fmt->code = RKISP1_DEF_FMT; 386 sink_fmt->colorspace = V4L2_COLORSPACE_SRGB; 387 sink_fmt->xfer_func = V4L2_XFER_FUNC_SRGB; 388 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601; 389 sink_fmt->quantization = V4L2_QUANTIZATION_LIM_RANGE; 390 391 sink_crop = v4l2_subdev_get_try_crop(sd, sd_state, 392 RKISP1_RSZ_PAD_SINK); 393 sink_crop->width = RKISP1_DEFAULT_WIDTH; 394 sink_crop->height = RKISP1_DEFAULT_HEIGHT; 395 sink_crop->left = 0; 396 sink_crop->top = 0; 397 398 src_fmt = v4l2_subdev_get_pad_format(sd, sd_state, 399 RKISP1_RSZ_PAD_SINK); 400 *src_fmt = *sink_fmt; 401 402 /* NOTE: there is no crop in the source pad, only in the sink */ 403 404 return 0; 405 } 406 407 static void rkisp1_rsz_set_src_fmt(struct rkisp1_resizer *rsz, 408 struct v4l2_subdev_state *sd_state, 409 struct v4l2_mbus_framefmt *format) 410 { 411 const struct rkisp1_mbus_info *sink_mbus_info; 412 struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; 413 414 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 415 RKISP1_RSZ_PAD_SINK); 416 src_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 417 RKISP1_RSZ_PAD_SRC); 418 419 sink_mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 420 421 /* for YUV formats, userspace can change the mbus code on the src pad if it is supported */ 422 if (sink_mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV && 423 rkisp1_rsz_get_yuv_mbus_info(format->code)) 424 src_fmt->code = format->code; 425 426 src_fmt->width = clamp_t(u32, format->width, 427 rsz->config->min_rsz_width, 428 rsz->config->max_rsz_width); 429 src_fmt->height = clamp_t(u32, format->height, 430 rsz->config->min_rsz_height, 431 rsz->config->max_rsz_height); 432 433 *format = *src_fmt; 434 } 435 436 static void rkisp1_rsz_set_sink_crop(struct rkisp1_resizer *rsz, 437 struct v4l2_subdev_state *sd_state, 438 struct v4l2_rect *r) 439 { 440 const struct rkisp1_mbus_info *mbus_info; 441 struct v4l2_mbus_framefmt *sink_fmt; 442 struct v4l2_rect *sink_crop; 443 444 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 445 RKISP1_RSZ_PAD_SINK); 446 sink_crop = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state, 447 RKISP1_RSZ_PAD_SINK); 448 449 /* Not crop for MP bayer raw data */ 450 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 451 452 if (rsz->id == RKISP1_MAINPATH && 453 mbus_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 454 sink_crop->left = 0; 455 sink_crop->top = 0; 456 sink_crop->width = sink_fmt->width; 457 sink_crop->height = sink_fmt->height; 458 459 *r = *sink_crop; 460 return; 461 } 462 463 sink_crop->left = ALIGN(r->left, 2); 464 sink_crop->width = ALIGN(r->width, 2); 465 sink_crop->top = r->top; 466 sink_crop->height = r->height; 467 rkisp1_sd_adjust_crop(sink_crop, sink_fmt); 468 469 *r = *sink_crop; 470 } 471 472 static void rkisp1_rsz_set_sink_fmt(struct rkisp1_resizer *rsz, 473 struct v4l2_subdev_state *sd_state, 474 struct v4l2_mbus_framefmt *format) 475 { 476 const struct rkisp1_mbus_info *mbus_info; 477 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; 478 struct v4l2_rect *sink_crop; 479 bool is_yuv; 480 481 sink_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 482 RKISP1_RSZ_PAD_SINK); 483 src_fmt = v4l2_subdev_get_pad_format(&rsz->sd, sd_state, 484 RKISP1_RSZ_PAD_SRC); 485 sink_crop = v4l2_subdev_get_pad_crop(&rsz->sd, sd_state, 486 RKISP1_RSZ_PAD_SINK); 487 488 if (rsz->id == RKISP1_SELFPATH) 489 sink_fmt->code = MEDIA_BUS_FMT_YUYV8_2X8; 490 else 491 sink_fmt->code = format->code; 492 493 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 494 if (!mbus_info || !(mbus_info->direction & RKISP1_ISP_SD_SRC)) { 495 sink_fmt->code = RKISP1_DEF_FMT; 496 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 497 } 498 499 sink_fmt->width = clamp_t(u32, format->width, 500 RKISP1_ISP_MIN_WIDTH, 501 RKISP1_ISP_MAX_WIDTH); 502 sink_fmt->height = clamp_t(u32, format->height, 503 RKISP1_ISP_MIN_HEIGHT, 504 RKISP1_ISP_MAX_HEIGHT); 505 506 /* 507 * Adjust the color space fields. Accept any color primaries and 508 * transfer function for both YUV and Bayer. For YUV any YCbCr encoding 509 * and quantization range is also accepted. For Bayer formats, the YCbCr 510 * encoding isn't applicable, and the quantization range can only be 511 * full. 512 */ 513 is_yuv = mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV; 514 515 sink_fmt->colorspace = format->colorspace ? : 516 (is_yuv ? V4L2_COLORSPACE_SRGB : 517 V4L2_COLORSPACE_RAW); 518 sink_fmt->xfer_func = format->xfer_func ? : 519 V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace); 520 if (is_yuv) { 521 sink_fmt->ycbcr_enc = format->ycbcr_enc ? : 522 V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace); 523 sink_fmt->quantization = format->quantization ? : 524 V4L2_MAP_QUANTIZATION_DEFAULT(false, sink_fmt->colorspace, 525 sink_fmt->ycbcr_enc); 526 } else { 527 /* 528 * The YCbCr encoding isn't applicable for non-YUV formats, but 529 * V4L2 has no "no encoding" value. Hardcode it to Rec. 601, it 530 * should be ignored by userspace. 531 */ 532 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601; 533 sink_fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 534 } 535 536 *format = *sink_fmt; 537 538 /* Propagate the media bus code and color space to the source pad. */ 539 src_fmt->code = sink_fmt->code; 540 src_fmt->colorspace = sink_fmt->colorspace; 541 src_fmt->xfer_func = sink_fmt->xfer_func; 542 src_fmt->ycbcr_enc = sink_fmt->ycbcr_enc; 543 src_fmt->quantization = sink_fmt->quantization; 544 545 /* Update sink crop */ 546 rkisp1_rsz_set_sink_crop(rsz, sd_state, sink_crop); 547 } 548 549 static int rkisp1_rsz_set_fmt(struct v4l2_subdev *sd, 550 struct v4l2_subdev_state *sd_state, 551 struct v4l2_subdev_format *fmt) 552 { 553 struct rkisp1_resizer *rsz = 554 container_of(sd, struct rkisp1_resizer, sd); 555 556 if (fmt->pad == RKISP1_RSZ_PAD_SINK) 557 rkisp1_rsz_set_sink_fmt(rsz, sd_state, &fmt->format); 558 else 559 rkisp1_rsz_set_src_fmt(rsz, sd_state, &fmt->format); 560 561 return 0; 562 } 563 564 static int rkisp1_rsz_get_selection(struct v4l2_subdev *sd, 565 struct v4l2_subdev_state *sd_state, 566 struct v4l2_subdev_selection *sel) 567 { 568 struct v4l2_mbus_framefmt *mf_sink; 569 int ret = 0; 570 571 if (sel->pad == RKISP1_RSZ_PAD_SRC) 572 return -EINVAL; 573 574 switch (sel->target) { 575 case V4L2_SEL_TGT_CROP_BOUNDS: 576 mf_sink = v4l2_subdev_get_pad_format(sd, sd_state, 577 RKISP1_RSZ_PAD_SINK); 578 sel->r.height = mf_sink->height; 579 sel->r.width = mf_sink->width; 580 sel->r.left = 0; 581 sel->r.top = 0; 582 break; 583 584 case V4L2_SEL_TGT_CROP: 585 sel->r = *v4l2_subdev_get_pad_crop(sd, sd_state, 586 RKISP1_RSZ_PAD_SINK); 587 break; 588 589 default: 590 ret = -EINVAL; 591 break; 592 } 593 594 return ret; 595 } 596 597 static int rkisp1_rsz_set_selection(struct v4l2_subdev *sd, 598 struct v4l2_subdev_state *sd_state, 599 struct v4l2_subdev_selection *sel) 600 { 601 struct rkisp1_resizer *rsz = 602 container_of(sd, struct rkisp1_resizer, sd); 603 604 if (sel->target != V4L2_SEL_TGT_CROP || sel->pad == RKISP1_RSZ_PAD_SRC) 605 return -EINVAL; 606 607 dev_dbg(rsz->rkisp1->dev, "%s: pad: %d sel(%d,%d)/%dx%d\n", __func__, 608 sel->pad, sel->r.left, sel->r.top, sel->r.width, sel->r.height); 609 610 rkisp1_rsz_set_sink_crop(rsz, sd_state, &sel->r); 611 612 return 0; 613 } 614 615 static const struct media_entity_operations rkisp1_rsz_media_ops = { 616 .link_validate = v4l2_subdev_link_validate, 617 }; 618 619 static const struct v4l2_subdev_pad_ops rkisp1_rsz_pad_ops = { 620 .enum_mbus_code = rkisp1_rsz_enum_mbus_code, 621 .get_selection = rkisp1_rsz_get_selection, 622 .set_selection = rkisp1_rsz_set_selection, 623 .init_cfg = rkisp1_rsz_init_config, 624 .get_fmt = v4l2_subdev_get_fmt, 625 .set_fmt = rkisp1_rsz_set_fmt, 626 .link_validate = v4l2_subdev_link_validate_default, 627 }; 628 629 /* ---------------------------------------------------------------------------- 630 * Stream operations 631 */ 632 633 static int rkisp1_rsz_s_stream(struct v4l2_subdev *sd, int enable) 634 { 635 struct rkisp1_resizer *rsz = 636 container_of(sd, struct rkisp1_resizer, sd); 637 struct rkisp1_device *rkisp1 = rsz->rkisp1; 638 struct rkisp1_capture *other = &rkisp1->capture_devs[rsz->id ^ 1]; 639 enum rkisp1_shadow_regs_when when = RKISP1_SHADOW_REGS_SYNC; 640 struct v4l2_subdev_state *sd_state; 641 642 if (!enable) { 643 rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_ASYNC); 644 rkisp1_rsz_disable(rsz, RKISP1_SHADOW_REGS_ASYNC); 645 return 0; 646 } 647 648 if (other->is_streaming) 649 when = RKISP1_SHADOW_REGS_ASYNC; 650 651 sd_state = v4l2_subdev_lock_and_get_active_state(sd); 652 653 rkisp1_rsz_config(rsz, sd_state, when); 654 rkisp1_dcrop_config(rsz, sd_state); 655 656 v4l2_subdev_unlock_state(sd_state); 657 658 return 0; 659 } 660 661 static const struct v4l2_subdev_video_ops rkisp1_rsz_video_ops = { 662 .s_stream = rkisp1_rsz_s_stream, 663 }; 664 665 static const struct v4l2_subdev_ops rkisp1_rsz_ops = { 666 .video = &rkisp1_rsz_video_ops, 667 .pad = &rkisp1_rsz_pad_ops, 668 }; 669 670 static void rkisp1_rsz_unregister(struct rkisp1_resizer *rsz) 671 { 672 if (!rsz->rkisp1) 673 return; 674 675 v4l2_device_unregister_subdev(&rsz->sd); 676 v4l2_subdev_cleanup(&rsz->sd); 677 media_entity_cleanup(&rsz->sd.entity); 678 } 679 680 static int rkisp1_rsz_register(struct rkisp1_resizer *rsz) 681 { 682 static const char * const dev_names[] = { 683 RKISP1_RSZ_MP_DEV_NAME, 684 RKISP1_RSZ_SP_DEV_NAME 685 }; 686 struct media_pad *pads = rsz->pads; 687 struct v4l2_subdev *sd = &rsz->sd; 688 int ret; 689 690 if (rsz->id == RKISP1_SELFPATH) { 691 rsz->regs_base = RKISP1_CIF_SRSZ_BASE; 692 rsz->config = &rkisp1_rsz_config_sp; 693 } else { 694 rsz->regs_base = RKISP1_CIF_MRSZ_BASE; 695 rsz->config = &rkisp1_rsz_config_mp; 696 } 697 698 v4l2_subdev_init(sd, &rkisp1_rsz_ops); 699 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 700 sd->entity.ops = &rkisp1_rsz_media_ops; 701 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER; 702 sd->owner = THIS_MODULE; 703 strscpy(sd->name, dev_names[rsz->id], sizeof(sd->name)); 704 705 pads[RKISP1_RSZ_PAD_SINK].flags = MEDIA_PAD_FL_SINK | 706 MEDIA_PAD_FL_MUST_CONNECT; 707 pads[RKISP1_RSZ_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE | 708 MEDIA_PAD_FL_MUST_CONNECT; 709 710 ret = media_entity_pads_init(&sd->entity, RKISP1_RSZ_PAD_MAX, pads); 711 if (ret) 712 goto err_entity_cleanup; 713 714 ret = v4l2_subdev_init_finalize(sd); 715 if (ret) 716 goto err_entity_cleanup; 717 718 ret = v4l2_device_register_subdev(&rsz->rkisp1->v4l2_dev, sd); 719 if (ret) { 720 dev_err(sd->dev, "Failed to register resizer subdev\n"); 721 goto err_subdev_cleanup; 722 } 723 724 return 0; 725 726 err_subdev_cleanup: 727 v4l2_subdev_cleanup(sd); 728 err_entity_cleanup: 729 media_entity_cleanup(&sd->entity); 730 return ret; 731 } 732 733 int rkisp1_resizer_devs_register(struct rkisp1_device *rkisp1) 734 { 735 unsigned int i; 736 int ret; 737 738 for (i = 0; i < ARRAY_SIZE(rkisp1->resizer_devs); i++) { 739 struct rkisp1_resizer *rsz = &rkisp1->resizer_devs[i]; 740 741 rsz->rkisp1 = rkisp1; 742 rsz->id = i; 743 744 ret = rkisp1_rsz_register(rsz); 745 if (ret) { 746 rsz->rkisp1 = NULL; 747 rkisp1_resizer_devs_unregister(rkisp1); 748 return ret; 749 } 750 } 751 752 return 0; 753 } 754 755 void rkisp1_resizer_devs_unregister(struct rkisp1_device *rkisp1) 756 { 757 struct rkisp1_resizer *mp = &rkisp1->resizer_devs[RKISP1_MAINPATH]; 758 struct rkisp1_resizer *sp = &rkisp1->resizer_devs[RKISP1_SELFPATH]; 759 760 rkisp1_rsz_unregister(mp); 761 rkisp1_rsz_unregister(sp); 762 } 763