1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Rockchip ISP1 Driver - ISP Subdevice 4 * 5 * Copyright (C) 2019 Collabora, Ltd. 6 * 7 * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd. 8 * Copyright (C) 2017 Rockchip Electronics Co., Ltd. 9 */ 10 11 #include <linux/iopoll.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/videodev2.h> 14 #include <linux/vmalloc.h> 15 16 #include <media/v4l2-event.h> 17 18 #include "rkisp1-common.h" 19 20 #define RKISP1_DEF_SINK_PAD_FMT MEDIA_BUS_FMT_SRGGB10_1X10 21 #define RKISP1_DEF_SRC_PAD_FMT MEDIA_BUS_FMT_YUYV8_2X8 22 23 #define RKISP1_ISP_DEV_NAME RKISP1_DRIVER_NAME "_isp" 24 25 /* 26 * NOTE: MIPI controller and input MUX are also configured in this file. 27 * This is because ISP Subdev describes not only ISP submodule (input size, 28 * format, output size, format), but also a virtual route device. 29 */ 30 31 /* 32 * There are many variables named with format/frame in below code, 33 * please see here for their meaning. 34 * Cropping in the sink pad defines the image region from the sensor. 35 * Cropping in the source pad defines the region for the Image Stabilizer (IS) 36 * 37 * Cropping regions of ISP 38 * 39 * +---------------------------------------------------------+ 40 * | Sensor image | 41 * | +---------------------------------------------------+ | 42 * | | CIF_ISP_ACQ (for black level) | | 43 * | | sink pad format | | 44 * | | +--------------------------------------------+ | | 45 * | | | CIF_ISP_OUT | | | 46 * | | | sink pad crop | | | 47 * | | | +---------------------------------+ | | | 48 * | | | | CIF_ISP_IS | | | | 49 * | | | | source pad crop and format | | | | 50 * | | | +---------------------------------+ | | | 51 * | | +--------------------------------------------+ | | 52 * | +---------------------------------------------------+ | 53 * +---------------------------------------------------------+ 54 */ 55 56 /* ---------------------------------------------------------------------------- 57 * Camera Interface registers configurations 58 */ 59 60 /* 61 * Image Stabilization. 62 * This should only be called when configuring CIF 63 * or at the frame end interrupt 64 */ 65 static void rkisp1_config_ism(struct rkisp1_isp *isp, 66 struct v4l2_subdev_state *sd_state) 67 { 68 const struct v4l2_rect *src_crop = 69 v4l2_subdev_state_get_crop(sd_state, 70 RKISP1_ISP_PAD_SOURCE_VIDEO); 71 struct rkisp1_device *rkisp1 = isp->rkisp1; 72 u32 val; 73 74 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_RECENTER, 0); 75 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_MAX_DX, 0); 76 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_MAX_DY, 0); 77 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_DISPLACE, 0); 78 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_H_OFFS, src_crop->left); 79 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_V_OFFS, src_crop->top); 80 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_H_SIZE, src_crop->width); 81 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_V_SIZE, src_crop->height); 82 83 /* IS(Image Stabilization) is always on, working as output crop */ 84 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_CTRL, 1); 85 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL); 86 val |= RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD; 87 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val); 88 } 89 90 /* 91 * configure ISP blocks with input format, size...... 92 */ 93 static int rkisp1_config_isp(struct rkisp1_isp *isp, 94 struct v4l2_subdev_state *sd_state, 95 enum v4l2_mbus_type mbus_type, u32 mbus_flags) 96 { 97 struct rkisp1_device *rkisp1 = isp->rkisp1; 98 u32 isp_ctrl = 0, irq_mask = 0, acq_mult = 0, acq_prop = 0; 99 const struct rkisp1_mbus_info *sink_fmt; 100 const struct rkisp1_mbus_info *src_fmt; 101 const struct v4l2_mbus_framefmt *src_frm; 102 const struct v4l2_mbus_framefmt *sink_frm; 103 const struct v4l2_rect *sink_crop; 104 105 sink_frm = v4l2_subdev_state_get_format(sd_state, 106 RKISP1_ISP_PAD_SINK_VIDEO); 107 sink_crop = v4l2_subdev_state_get_crop(sd_state, 108 RKISP1_ISP_PAD_SINK_VIDEO); 109 src_frm = v4l2_subdev_state_get_format(sd_state, 110 RKISP1_ISP_PAD_SOURCE_VIDEO); 111 112 sink_fmt = rkisp1_mbus_info_get_by_code(sink_frm->code); 113 src_fmt = rkisp1_mbus_info_get_by_code(src_frm->code); 114 115 if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 116 acq_mult = 1; 117 if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 118 if (mbus_type == V4L2_MBUS_BT656) 119 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656; 120 else 121 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT; 122 } else { 123 rkisp1_write(rkisp1, RKISP1_CIF_ISP_DEMOSAIC, 124 RKISP1_CIF_ISP_DEMOSAIC_TH(0xc)); 125 126 if (mbus_type == V4L2_MBUS_BT656) 127 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU656; 128 else 129 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601; 130 } 131 } else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) { 132 acq_mult = 2; 133 if (mbus_type == V4L2_MBUS_CSI2_DPHY) { 134 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; 135 } else { 136 if (mbus_type == V4L2_MBUS_BT656) 137 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656; 138 else 139 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601; 140 } 141 142 irq_mask |= RKISP1_CIF_ISP_DATA_LOSS; 143 } 144 145 /* Set up input acquisition properties */ 146 if (mbus_type == V4L2_MBUS_BT656 || mbus_type == V4L2_MBUS_PARALLEL) { 147 if (mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) 148 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE; 149 150 switch (sink_fmt->bus_width) { 151 case 8: 152 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO; 153 break; 154 case 10: 155 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_ZERO; 156 break; 157 case 12: 158 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B; 159 break; 160 default: 161 dev_err(rkisp1->dev, "Invalid bus width %u\n", 162 sink_fmt->bus_width); 163 return -EINVAL; 164 } 165 } 166 167 if (mbus_type == V4L2_MBUS_PARALLEL) { 168 if (mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) 169 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW; 170 171 if (mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) 172 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW; 173 } 174 175 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, isp_ctrl); 176 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_PROP, 177 acq_prop | sink_fmt->yuv_seq | 178 RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT(sink_fmt->bayer_pat) | 179 RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL); 180 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_NR_FRAMES, 0); 181 182 /* Acquisition Size */ 183 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_H_OFFS, 0); 184 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_V_OFFS, 0); 185 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_H_SIZE, 186 acq_mult * sink_frm->width); 187 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_V_SIZE, sink_frm->height); 188 189 /* ISP Out Area */ 190 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_H_OFFS, sink_crop->left); 191 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_V_OFFS, sink_crop->top); 192 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_H_SIZE, sink_crop->width); 193 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_V_SIZE, sink_crop->height); 194 195 irq_mask |= RKISP1_CIF_ISP_FRAME | RKISP1_CIF_ISP_V_START | 196 RKISP1_CIF_ISP_PIC_SIZE_ERROR; 197 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IMSC, irq_mask); 198 199 if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 200 rkisp1_params_disable(&rkisp1->params); 201 } else { 202 struct v4l2_mbus_framefmt *src_frm; 203 204 src_frm = v4l2_subdev_state_get_format(sd_state, 205 RKISP1_ISP_PAD_SOURCE_VIDEO); 206 rkisp1_params_pre_configure(&rkisp1->params, sink_fmt->bayer_pat, 207 src_frm->quantization, 208 src_frm->ycbcr_enc); 209 } 210 211 isp->sink_fmt = sink_fmt; 212 213 return 0; 214 } 215 216 /* Configure MUX */ 217 static void rkisp1_config_path(struct rkisp1_isp *isp, 218 enum v4l2_mbus_type mbus_type) 219 { 220 struct rkisp1_device *rkisp1 = isp->rkisp1; 221 u32 dpcl = rkisp1_read(rkisp1, RKISP1_CIF_VI_DPCL); 222 223 if (mbus_type == V4L2_MBUS_BT656 || mbus_type == V4L2_MBUS_PARALLEL) 224 dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL; 225 else if (mbus_type == V4L2_MBUS_CSI2_DPHY) 226 dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_MIPI; 227 228 rkisp1_write(rkisp1, RKISP1_CIF_VI_DPCL, dpcl); 229 } 230 231 /* Hardware configure Entry */ 232 static int rkisp1_config_cif(struct rkisp1_isp *isp, 233 struct v4l2_subdev_state *sd_state, 234 enum v4l2_mbus_type mbus_type, u32 mbus_flags) 235 { 236 int ret; 237 238 ret = rkisp1_config_isp(isp, sd_state, mbus_type, mbus_flags); 239 if (ret) 240 return ret; 241 242 rkisp1_config_path(isp, mbus_type); 243 rkisp1_config_ism(isp, sd_state); 244 245 return 0; 246 } 247 248 static void rkisp1_isp_stop(struct rkisp1_isp *isp) 249 { 250 struct rkisp1_device *rkisp1 = isp->rkisp1; 251 u32 val; 252 253 /* 254 * ISP(mi) stop in mi frame end -> Stop ISP(mipi) -> 255 * Stop ISP(isp) ->wait for ISP isp off 256 */ 257 258 /* Mask MI and ISP interrupts */ 259 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IMSC, 0); 260 rkisp1_write(rkisp1, RKISP1_CIF_MI_IMSC, 0); 261 262 /* Flush posted writes */ 263 rkisp1_read(rkisp1, RKISP1_CIF_MI_IMSC); 264 265 /* 266 * Wait until the IRQ handler has ended. The IRQ handler may get called 267 * even after this, but it will return immediately as the MI and ISP 268 * interrupts have been masked. 269 */ 270 synchronize_irq(rkisp1->irqs[RKISP1_IRQ_ISP]); 271 if (rkisp1->irqs[RKISP1_IRQ_ISP] != rkisp1->irqs[RKISP1_IRQ_MI]) 272 synchronize_irq(rkisp1->irqs[RKISP1_IRQ_MI]); 273 274 /* Clear MI and ISP interrupt status */ 275 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ICR, ~0); 276 rkisp1_write(rkisp1, RKISP1_CIF_MI_ICR, ~0); 277 278 /* stop ISP */ 279 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL); 280 val &= ~(RKISP1_CIF_ISP_CTRL_ISP_INFORM_ENABLE | 281 RKISP1_CIF_ISP_CTRL_ISP_ENABLE); 282 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val); 283 284 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL); 285 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, 286 val | RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD); 287 288 readx_poll_timeout(readl, rkisp1->base_addr + RKISP1_CIF_ISP_RIS, 289 val, val & RKISP1_CIF_ISP_OFF, 20, 100); 290 rkisp1_write(rkisp1, RKISP1_CIF_VI_IRCL, 291 RKISP1_CIF_VI_IRCL_MIPI_SW_RST | 292 RKISP1_CIF_VI_IRCL_ISP_SW_RST); 293 rkisp1_write(rkisp1, RKISP1_CIF_VI_IRCL, 0x0); 294 } 295 296 static void rkisp1_config_clk(struct rkisp1_isp *isp) 297 { 298 struct rkisp1_device *rkisp1 = isp->rkisp1; 299 300 u32 val = RKISP1_CIF_VI_ICCL_ISP_CLK | RKISP1_CIF_VI_ICCL_CP_CLK | 301 RKISP1_CIF_VI_ICCL_MRSZ_CLK | RKISP1_CIF_VI_ICCL_SRSZ_CLK | 302 RKISP1_CIF_VI_ICCL_JPEG_CLK | RKISP1_CIF_VI_ICCL_MI_CLK | 303 RKISP1_CIF_VI_ICCL_IE_CLK | RKISP1_CIF_VI_ICCL_MIPI_CLK | 304 RKISP1_CIF_VI_ICCL_DCROP_CLK; 305 306 rkisp1_write(rkisp1, RKISP1_CIF_VI_ICCL, val); 307 308 /* ensure sp and mp can run at the same time in V12 */ 309 if (rkisp1->info->isp_ver == RKISP1_V12) { 310 val = RKISP1_CIF_CLK_CTRL_MI_Y12 | RKISP1_CIF_CLK_CTRL_MI_SP | 311 RKISP1_CIF_CLK_CTRL_MI_RAW0 | RKISP1_CIF_CLK_CTRL_MI_RAW1 | 312 RKISP1_CIF_CLK_CTRL_MI_READ | RKISP1_CIF_CLK_CTRL_MI_RAWRD | 313 RKISP1_CIF_CLK_CTRL_CP | RKISP1_CIF_CLK_CTRL_IE; 314 rkisp1_write(rkisp1, RKISP1_CIF_VI_ISP_CLK_CTRL_V12, val); 315 } 316 } 317 318 static void rkisp1_isp_start(struct rkisp1_isp *isp, 319 struct v4l2_subdev_state *sd_state) 320 { 321 struct rkisp1_device *rkisp1 = isp->rkisp1; 322 const struct v4l2_mbus_framefmt *src_fmt; 323 const struct rkisp1_mbus_info *src_info; 324 u32 val; 325 326 rkisp1_config_clk(isp); 327 328 /* Activate ISP */ 329 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL); 330 val |= RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD | 331 RKISP1_CIF_ISP_CTRL_ISP_ENABLE | 332 RKISP1_CIF_ISP_CTRL_ISP_INFORM_ENABLE; 333 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val); 334 335 src_fmt = v4l2_subdev_state_get_format(sd_state, 336 RKISP1_ISP_PAD_SOURCE_VIDEO); 337 src_info = rkisp1_mbus_info_get_by_code(src_fmt->code); 338 339 if (src_info->pixel_enc != V4L2_PIXEL_ENC_BAYER) 340 rkisp1_params_post_configure(&rkisp1->params); 341 } 342 343 /* ---------------------------------------------------------------------------- 344 * Subdev pad operations 345 */ 346 347 static inline struct rkisp1_isp *to_rkisp1_isp(struct v4l2_subdev *sd) 348 { 349 return container_of(sd, struct rkisp1_isp, sd); 350 } 351 352 static int rkisp1_isp_enum_mbus_code(struct v4l2_subdev *sd, 353 struct v4l2_subdev_state *sd_state, 354 struct v4l2_subdev_mbus_code_enum *code) 355 { 356 unsigned int i, dir; 357 int pos = 0; 358 359 if (code->pad == RKISP1_ISP_PAD_SINK_VIDEO) { 360 dir = RKISP1_ISP_SD_SINK; 361 } else if (code->pad == RKISP1_ISP_PAD_SOURCE_VIDEO) { 362 dir = RKISP1_ISP_SD_SRC; 363 } else { 364 if (code->index > 0) 365 return -EINVAL; 366 code->code = MEDIA_BUS_FMT_METADATA_FIXED; 367 return 0; 368 } 369 370 for (i = 0; ; i++) { 371 const struct rkisp1_mbus_info *fmt = 372 rkisp1_mbus_info_get_by_index(i); 373 374 if (!fmt) 375 return -EINVAL; 376 377 if (fmt->direction & dir) 378 pos++; 379 380 if (code->index == pos - 1) { 381 code->code = fmt->mbus_code; 382 if (fmt->pixel_enc == V4L2_PIXEL_ENC_YUV && 383 dir == RKISP1_ISP_SD_SRC) 384 code->flags = 385 V4L2_SUBDEV_MBUS_CODE_CSC_QUANTIZATION; 386 return 0; 387 } 388 } 389 390 return -EINVAL; 391 } 392 393 static int rkisp1_isp_enum_frame_size(struct v4l2_subdev *sd, 394 struct v4l2_subdev_state *sd_state, 395 struct v4l2_subdev_frame_size_enum *fse) 396 { 397 const struct rkisp1_mbus_info *mbus_info; 398 399 if (fse->pad == RKISP1_ISP_PAD_SINK_PARAMS || 400 fse->pad == RKISP1_ISP_PAD_SOURCE_STATS) 401 return -ENOTTY; 402 403 if (fse->index > 0) 404 return -EINVAL; 405 406 mbus_info = rkisp1_mbus_info_get_by_code(fse->code); 407 if (!mbus_info) 408 return -EINVAL; 409 410 if (!(mbus_info->direction & RKISP1_ISP_SD_SINK) && 411 fse->pad == RKISP1_ISP_PAD_SINK_VIDEO) 412 return -EINVAL; 413 414 if (!(mbus_info->direction & RKISP1_ISP_SD_SRC) && 415 fse->pad == RKISP1_ISP_PAD_SOURCE_VIDEO) 416 return -EINVAL; 417 418 fse->min_width = RKISP1_ISP_MIN_WIDTH; 419 fse->max_width = RKISP1_ISP_MAX_WIDTH; 420 fse->min_height = RKISP1_ISP_MIN_HEIGHT; 421 fse->max_height = RKISP1_ISP_MAX_HEIGHT; 422 423 return 0; 424 } 425 426 static int rkisp1_isp_init_state(struct v4l2_subdev *sd, 427 struct v4l2_subdev_state *sd_state) 428 { 429 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; 430 struct v4l2_rect *sink_crop, *src_crop; 431 432 /* Video. */ 433 sink_fmt = v4l2_subdev_state_get_format(sd_state, 434 RKISP1_ISP_PAD_SINK_VIDEO); 435 sink_fmt->width = RKISP1_DEFAULT_WIDTH; 436 sink_fmt->height = RKISP1_DEFAULT_HEIGHT; 437 sink_fmt->field = V4L2_FIELD_NONE; 438 sink_fmt->code = RKISP1_DEF_SINK_PAD_FMT; 439 sink_fmt->colorspace = V4L2_COLORSPACE_RAW; 440 sink_fmt->xfer_func = V4L2_XFER_FUNC_NONE; 441 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601; 442 sink_fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 443 444 sink_crop = v4l2_subdev_state_get_crop(sd_state, 445 RKISP1_ISP_PAD_SINK_VIDEO); 446 sink_crop->width = RKISP1_DEFAULT_WIDTH; 447 sink_crop->height = RKISP1_DEFAULT_HEIGHT; 448 sink_crop->left = 0; 449 sink_crop->top = 0; 450 451 src_fmt = v4l2_subdev_state_get_format(sd_state, 452 RKISP1_ISP_PAD_SOURCE_VIDEO); 453 *src_fmt = *sink_fmt; 454 src_fmt->code = RKISP1_DEF_SRC_PAD_FMT; 455 src_fmt->colorspace = V4L2_COLORSPACE_SRGB; 456 src_fmt->xfer_func = V4L2_XFER_FUNC_SRGB; 457 src_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601; 458 src_fmt->quantization = V4L2_QUANTIZATION_LIM_RANGE; 459 460 src_crop = v4l2_subdev_state_get_crop(sd_state, 461 RKISP1_ISP_PAD_SOURCE_VIDEO); 462 *src_crop = *sink_crop; 463 464 /* Parameters and statistics. */ 465 sink_fmt = v4l2_subdev_state_get_format(sd_state, 466 RKISP1_ISP_PAD_SINK_PARAMS); 467 src_fmt = v4l2_subdev_state_get_format(sd_state, 468 RKISP1_ISP_PAD_SOURCE_STATS); 469 sink_fmt->width = 0; 470 sink_fmt->height = 0; 471 sink_fmt->field = V4L2_FIELD_NONE; 472 sink_fmt->code = MEDIA_BUS_FMT_METADATA_FIXED; 473 *src_fmt = *sink_fmt; 474 475 return 0; 476 } 477 478 static void rkisp1_isp_set_src_fmt(struct rkisp1_isp *isp, 479 struct v4l2_subdev_state *sd_state, 480 struct v4l2_mbus_framefmt *format) 481 { 482 const struct rkisp1_mbus_info *sink_info; 483 const struct rkisp1_mbus_info *src_info; 484 struct v4l2_mbus_framefmt *sink_fmt; 485 struct v4l2_mbus_framefmt *src_fmt; 486 const struct v4l2_rect *src_crop; 487 bool set_csc; 488 489 sink_fmt = v4l2_subdev_state_get_format(sd_state, 490 RKISP1_ISP_PAD_SINK_VIDEO); 491 src_fmt = v4l2_subdev_state_get_format(sd_state, 492 RKISP1_ISP_PAD_SOURCE_VIDEO); 493 src_crop = v4l2_subdev_state_get_crop(sd_state, 494 RKISP1_ISP_PAD_SOURCE_VIDEO); 495 496 /* 497 * Media bus code. The ISP can operate in pass-through mode (Bayer in, 498 * Bayer out or YUV in, YUV out) or process Bayer data to YUV, but 499 * can't convert from YUV to Bayer. 500 */ 501 sink_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 502 503 src_fmt->code = format->code; 504 src_info = rkisp1_mbus_info_get_by_code(src_fmt->code); 505 if (!src_info || !(src_info->direction & RKISP1_ISP_SD_SRC)) { 506 src_fmt->code = RKISP1_DEF_SRC_PAD_FMT; 507 src_info = rkisp1_mbus_info_get_by_code(src_fmt->code); 508 } 509 510 if (sink_info->pixel_enc == V4L2_PIXEL_ENC_YUV && 511 src_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 512 src_fmt->code = sink_fmt->code; 513 src_info = sink_info; 514 } 515 516 /* 517 * The source width and height must be identical to the source crop 518 * size. 519 */ 520 src_fmt->width = src_crop->width; 521 src_fmt->height = src_crop->height; 522 523 /* 524 * Copy the color space for the sink pad. When converting from Bayer to 525 * YUV, default to a limited quantization range. 526 */ 527 src_fmt->colorspace = sink_fmt->colorspace; 528 src_fmt->xfer_func = sink_fmt->xfer_func; 529 src_fmt->ycbcr_enc = sink_fmt->ycbcr_enc; 530 531 if (sink_info->pixel_enc == V4L2_PIXEL_ENC_BAYER && 532 src_info->pixel_enc == V4L2_PIXEL_ENC_YUV) 533 src_fmt->quantization = V4L2_QUANTIZATION_LIM_RANGE; 534 else 535 src_fmt->quantization = sink_fmt->quantization; 536 537 /* 538 * Allow setting the source color space fields when the SET_CSC flag is 539 * set and the source format is YUV. If the sink format is YUV, don't 540 * set the color primaries, transfer function or YCbCr encoding as the 541 * ISP is bypassed in that case and passes YUV data through without 542 * modifications. 543 * 544 * The color primaries and transfer function are configured through the 545 * cross-talk matrix and tone curve respectively. Settings for those 546 * hardware blocks are conveyed through the ISP parameters buffer, as 547 * they need to combine color space information with other image tuning 548 * characteristics and can't thus be computed by the kernel based on the 549 * color space. The source pad colorspace and xfer_func fields are thus 550 * ignored by the driver, but can be set by userspace to propagate 551 * accurate color space information down the pipeline. 552 */ 553 set_csc = format->flags & V4L2_MBUS_FRAMEFMT_SET_CSC; 554 555 if (set_csc && src_info->pixel_enc == V4L2_PIXEL_ENC_YUV) { 556 if (sink_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) { 557 if (format->colorspace != V4L2_COLORSPACE_DEFAULT) 558 src_fmt->colorspace = format->colorspace; 559 if (format->xfer_func != V4L2_XFER_FUNC_DEFAULT) 560 src_fmt->xfer_func = format->xfer_func; 561 if (format->ycbcr_enc != V4L2_YCBCR_ENC_DEFAULT) 562 src_fmt->ycbcr_enc = format->ycbcr_enc; 563 } 564 565 if (format->quantization != V4L2_QUANTIZATION_DEFAULT) 566 src_fmt->quantization = format->quantization; 567 } 568 569 *format = *src_fmt; 570 571 /* 572 * Restore the SET_CSC flag if it was set to indicate support for the 573 * CSC setting API. 574 */ 575 if (set_csc) 576 format->flags |= V4L2_MBUS_FRAMEFMT_SET_CSC; 577 } 578 579 static void rkisp1_isp_set_src_crop(struct rkisp1_isp *isp, 580 struct v4l2_subdev_state *sd_state, 581 struct v4l2_rect *r) 582 { 583 struct v4l2_mbus_framefmt *src_fmt; 584 const struct v4l2_rect *sink_crop; 585 struct v4l2_rect *src_crop; 586 587 src_crop = v4l2_subdev_state_get_crop(sd_state, 588 RKISP1_ISP_PAD_SOURCE_VIDEO); 589 sink_crop = v4l2_subdev_state_get_crop(sd_state, 590 RKISP1_ISP_PAD_SINK_VIDEO); 591 592 src_crop->left = ALIGN(r->left, 2); 593 src_crop->width = ALIGN(r->width, 2); 594 src_crop->top = r->top; 595 src_crop->height = r->height; 596 rkisp1_sd_adjust_crop_rect(src_crop, sink_crop); 597 598 *r = *src_crop; 599 600 /* Propagate to out format */ 601 src_fmt = v4l2_subdev_state_get_format(sd_state, 602 RKISP1_ISP_PAD_SOURCE_VIDEO); 603 rkisp1_isp_set_src_fmt(isp, sd_state, src_fmt); 604 } 605 606 static void rkisp1_isp_set_sink_crop(struct rkisp1_isp *isp, 607 struct v4l2_subdev_state *sd_state, 608 struct v4l2_rect *r) 609 { 610 struct v4l2_rect *sink_crop, *src_crop; 611 const struct v4l2_mbus_framefmt *sink_fmt; 612 613 sink_crop = v4l2_subdev_state_get_crop(sd_state, 614 RKISP1_ISP_PAD_SINK_VIDEO); 615 sink_fmt = v4l2_subdev_state_get_format(sd_state, 616 RKISP1_ISP_PAD_SINK_VIDEO); 617 618 sink_crop->left = ALIGN(r->left, 2); 619 sink_crop->width = ALIGN(r->width, 2); 620 sink_crop->top = r->top; 621 sink_crop->height = r->height; 622 rkisp1_sd_adjust_crop(sink_crop, sink_fmt); 623 624 *r = *sink_crop; 625 626 /* Propagate to out crop */ 627 src_crop = v4l2_subdev_state_get_crop(sd_state, 628 RKISP1_ISP_PAD_SOURCE_VIDEO); 629 rkisp1_isp_set_src_crop(isp, sd_state, src_crop); 630 } 631 632 static void rkisp1_isp_set_sink_fmt(struct rkisp1_isp *isp, 633 struct v4l2_subdev_state *sd_state, 634 struct v4l2_mbus_framefmt *format) 635 { 636 const struct rkisp1_mbus_info *mbus_info; 637 struct v4l2_mbus_framefmt *sink_fmt; 638 struct v4l2_rect *sink_crop; 639 bool is_yuv; 640 641 sink_fmt = v4l2_subdev_state_get_format(sd_state, 642 RKISP1_ISP_PAD_SINK_VIDEO); 643 sink_fmt->code = format->code; 644 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 645 if (!mbus_info || !(mbus_info->direction & RKISP1_ISP_SD_SINK)) { 646 sink_fmt->code = RKISP1_DEF_SINK_PAD_FMT; 647 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code); 648 } 649 650 sink_fmt->width = clamp_t(u32, format->width, 651 RKISP1_ISP_MIN_WIDTH, 652 RKISP1_ISP_MAX_WIDTH); 653 sink_fmt->height = clamp_t(u32, format->height, 654 RKISP1_ISP_MIN_HEIGHT, 655 RKISP1_ISP_MAX_HEIGHT); 656 657 /* 658 * Adjust the color space fields. Accept any color primaries and 659 * transfer function for both YUV and Bayer. For YUV any YCbCr encoding 660 * and quantization range is also accepted. For Bayer formats, the YCbCr 661 * encoding isn't applicable, and the quantization range can only be 662 * full. 663 */ 664 is_yuv = mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV; 665 666 sink_fmt->colorspace = format->colorspace ? : 667 (is_yuv ? V4L2_COLORSPACE_SRGB : 668 V4L2_COLORSPACE_RAW); 669 sink_fmt->xfer_func = format->xfer_func ? : 670 V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace); 671 if (is_yuv) { 672 sink_fmt->ycbcr_enc = format->ycbcr_enc ? : 673 V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace); 674 sink_fmt->quantization = format->quantization ? : 675 V4L2_MAP_QUANTIZATION_DEFAULT(false, sink_fmt->colorspace, 676 sink_fmt->ycbcr_enc); 677 } else { 678 /* 679 * The YCbCr encoding isn't applicable for non-YUV formats, but 680 * V4L2 has no "no encoding" value. Hardcode it to Rec. 601, it 681 * should be ignored by userspace. 682 */ 683 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601; 684 sink_fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 685 } 686 687 *format = *sink_fmt; 688 689 /* Propagate to in crop */ 690 sink_crop = v4l2_subdev_state_get_crop(sd_state, 691 RKISP1_ISP_PAD_SINK_VIDEO); 692 rkisp1_isp_set_sink_crop(isp, sd_state, sink_crop); 693 } 694 695 static int rkisp1_isp_set_fmt(struct v4l2_subdev *sd, 696 struct v4l2_subdev_state *sd_state, 697 struct v4l2_subdev_format *fmt) 698 { 699 struct rkisp1_isp *isp = to_rkisp1_isp(sd); 700 701 if (fmt->pad == RKISP1_ISP_PAD_SINK_VIDEO) 702 rkisp1_isp_set_sink_fmt(isp, sd_state, &fmt->format); 703 else if (fmt->pad == RKISP1_ISP_PAD_SOURCE_VIDEO) 704 rkisp1_isp_set_src_fmt(isp, sd_state, &fmt->format); 705 else 706 fmt->format = *v4l2_subdev_state_get_format(sd_state, 707 fmt->pad); 708 709 return 0; 710 } 711 712 static int rkisp1_isp_get_selection(struct v4l2_subdev *sd, 713 struct v4l2_subdev_state *sd_state, 714 struct v4l2_subdev_selection *sel) 715 { 716 int ret = 0; 717 718 if (sel->pad != RKISP1_ISP_PAD_SOURCE_VIDEO && 719 sel->pad != RKISP1_ISP_PAD_SINK_VIDEO) 720 return -EINVAL; 721 722 switch (sel->target) { 723 case V4L2_SEL_TGT_CROP_BOUNDS: 724 if (sel->pad == RKISP1_ISP_PAD_SINK_VIDEO) { 725 struct v4l2_mbus_framefmt *fmt; 726 727 fmt = v4l2_subdev_state_get_format(sd_state, sel->pad); 728 sel->r.height = fmt->height; 729 sel->r.width = fmt->width; 730 sel->r.left = 0; 731 sel->r.top = 0; 732 } else { 733 sel->r = *v4l2_subdev_state_get_crop(sd_state, 734 RKISP1_ISP_PAD_SINK_VIDEO); 735 } 736 break; 737 738 case V4L2_SEL_TGT_CROP: 739 sel->r = *v4l2_subdev_state_get_crop(sd_state, sel->pad); 740 break; 741 742 default: 743 ret = -EINVAL; 744 break; 745 } 746 747 return ret; 748 } 749 750 static int rkisp1_isp_set_selection(struct v4l2_subdev *sd, 751 struct v4l2_subdev_state *sd_state, 752 struct v4l2_subdev_selection *sel) 753 { 754 struct rkisp1_isp *isp = to_rkisp1_isp(sd); 755 int ret = 0; 756 757 if (sel->target != V4L2_SEL_TGT_CROP) 758 return -EINVAL; 759 760 dev_dbg(isp->rkisp1->dev, "%s: pad: %d sel(%d,%d)/%dx%d\n", __func__, 761 sel->pad, sel->r.left, sel->r.top, sel->r.width, sel->r.height); 762 763 if (sel->pad == RKISP1_ISP_PAD_SINK_VIDEO) 764 rkisp1_isp_set_sink_crop(isp, sd_state, &sel->r); 765 else if (sel->pad == RKISP1_ISP_PAD_SOURCE_VIDEO) 766 rkisp1_isp_set_src_crop(isp, sd_state, &sel->r); 767 else 768 ret = -EINVAL; 769 770 return ret; 771 } 772 773 static int rkisp1_subdev_link_validate(struct media_link *link) 774 { 775 if (link->sink->index == RKISP1_ISP_PAD_SINK_PARAMS) 776 return 0; 777 778 return v4l2_subdev_link_validate(link); 779 } 780 781 static const struct v4l2_subdev_pad_ops rkisp1_isp_pad_ops = { 782 .enum_mbus_code = rkisp1_isp_enum_mbus_code, 783 .enum_frame_size = rkisp1_isp_enum_frame_size, 784 .get_selection = rkisp1_isp_get_selection, 785 .set_selection = rkisp1_isp_set_selection, 786 .get_fmt = v4l2_subdev_get_fmt, 787 .set_fmt = rkisp1_isp_set_fmt, 788 .link_validate = v4l2_subdev_link_validate_default, 789 }; 790 791 /* ---------------------------------------------------------------------------- 792 * Stream operations 793 */ 794 795 static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) 796 { 797 struct rkisp1_isp *isp = to_rkisp1_isp(sd); 798 struct rkisp1_device *rkisp1 = isp->rkisp1; 799 struct v4l2_subdev_state *sd_state; 800 struct media_pad *source_pad; 801 struct media_pad *sink_pad; 802 enum v4l2_mbus_type mbus_type; 803 u32 mbus_flags; 804 int ret; 805 806 if (!enable) { 807 v4l2_subdev_call(rkisp1->source, video, s_stream, false); 808 rkisp1_isp_stop(isp); 809 return 0; 810 } 811 812 sink_pad = &isp->pads[RKISP1_ISP_PAD_SINK_VIDEO]; 813 source_pad = media_pad_remote_pad_unique(sink_pad); 814 if (IS_ERR(source_pad)) { 815 dev_dbg(rkisp1->dev, "Failed to get source for ISP: %ld\n", 816 PTR_ERR(source_pad)); 817 return -EPIPE; 818 } 819 820 rkisp1->source = media_entity_to_v4l2_subdev(source_pad->entity); 821 if (!rkisp1->source) { 822 /* This should really not happen, so is not worth a message. */ 823 return -EPIPE; 824 } 825 826 if (rkisp1->source == &rkisp1->csi.sd) { 827 mbus_type = V4L2_MBUS_CSI2_DPHY; 828 mbus_flags = 0; 829 } else { 830 const struct rkisp1_sensor_async *asd; 831 struct v4l2_async_connection *asc; 832 833 asc = v4l2_async_connection_unique(rkisp1->source); 834 if (!asc) 835 return -EPIPE; 836 837 asd = container_of(asc, struct rkisp1_sensor_async, asd); 838 839 mbus_type = asd->mbus_type; 840 mbus_flags = asd->mbus_flags; 841 } 842 843 isp->frame_sequence = -1; 844 845 sd_state = v4l2_subdev_lock_and_get_active_state(sd); 846 847 ret = rkisp1_config_cif(isp, sd_state, mbus_type, mbus_flags); 848 if (ret) 849 goto out_unlock; 850 851 rkisp1_isp_start(isp, sd_state); 852 853 ret = v4l2_subdev_call(rkisp1->source, video, s_stream, true); 854 if (ret) { 855 rkisp1_isp_stop(isp); 856 goto out_unlock; 857 } 858 859 out_unlock: 860 v4l2_subdev_unlock_state(sd_state); 861 return ret; 862 } 863 864 static int rkisp1_isp_subs_evt(struct v4l2_subdev *sd, struct v4l2_fh *fh, 865 struct v4l2_event_subscription *sub) 866 { 867 if (sub->type != V4L2_EVENT_FRAME_SYNC) 868 return -EINVAL; 869 870 /* V4L2_EVENT_FRAME_SYNC doesn't require an id, so zero should be set */ 871 if (sub->id != 0) 872 return -EINVAL; 873 874 return v4l2_event_subscribe(fh, sub, 0, NULL); 875 } 876 877 static const struct media_entity_operations rkisp1_isp_media_ops = { 878 .link_validate = rkisp1_subdev_link_validate, 879 }; 880 881 static const struct v4l2_subdev_video_ops rkisp1_isp_video_ops = { 882 .s_stream = rkisp1_isp_s_stream, 883 }; 884 885 static const struct v4l2_subdev_core_ops rkisp1_isp_core_ops = { 886 .subscribe_event = rkisp1_isp_subs_evt, 887 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 888 }; 889 890 static const struct v4l2_subdev_ops rkisp1_isp_ops = { 891 .core = &rkisp1_isp_core_ops, 892 .video = &rkisp1_isp_video_ops, 893 .pad = &rkisp1_isp_pad_ops, 894 }; 895 896 static const struct v4l2_subdev_internal_ops rkisp1_isp_internal_ops = { 897 .init_state = rkisp1_isp_init_state, 898 }; 899 900 int rkisp1_isp_register(struct rkisp1_device *rkisp1) 901 { 902 struct rkisp1_isp *isp = &rkisp1->isp; 903 struct media_pad *pads = isp->pads; 904 struct v4l2_subdev *sd = &isp->sd; 905 int ret; 906 907 isp->rkisp1 = rkisp1; 908 909 v4l2_subdev_init(sd, &rkisp1_isp_ops); 910 sd->internal_ops = &rkisp1_isp_internal_ops; 911 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; 912 sd->entity.ops = &rkisp1_isp_media_ops; 913 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER; 914 sd->owner = THIS_MODULE; 915 strscpy(sd->name, RKISP1_ISP_DEV_NAME, sizeof(sd->name)); 916 917 pads[RKISP1_ISP_PAD_SINK_VIDEO].flags = MEDIA_PAD_FL_SINK | 918 MEDIA_PAD_FL_MUST_CONNECT; 919 pads[RKISP1_ISP_PAD_SINK_PARAMS].flags = MEDIA_PAD_FL_SINK; 920 pads[RKISP1_ISP_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE; 921 pads[RKISP1_ISP_PAD_SOURCE_STATS].flags = MEDIA_PAD_FL_SOURCE; 922 923 ret = media_entity_pads_init(&sd->entity, RKISP1_ISP_PAD_MAX, pads); 924 if (ret) 925 goto err_entity_cleanup; 926 927 ret = v4l2_subdev_init_finalize(sd); 928 if (ret) 929 goto err_subdev_cleanup; 930 931 ret = v4l2_device_register_subdev(&rkisp1->v4l2_dev, sd); 932 if (ret) { 933 dev_err(rkisp1->dev, "Failed to register isp subdev\n"); 934 goto err_subdev_cleanup; 935 } 936 937 return 0; 938 939 err_subdev_cleanup: 940 v4l2_subdev_cleanup(sd); 941 err_entity_cleanup: 942 media_entity_cleanup(&sd->entity); 943 isp->sd.v4l2_dev = NULL; 944 return ret; 945 } 946 947 void rkisp1_isp_unregister(struct rkisp1_device *rkisp1) 948 { 949 struct rkisp1_isp *isp = &rkisp1->isp; 950 951 if (!isp->sd.v4l2_dev) 952 return; 953 954 v4l2_device_unregister_subdev(&isp->sd); 955 v4l2_subdev_cleanup(&isp->sd); 956 media_entity_cleanup(&isp->sd.entity); 957 } 958 959 /* ---------------------------------------------------------------------------- 960 * Interrupt handlers 961 */ 962 963 static void rkisp1_isp_queue_event_sof(struct rkisp1_isp *isp) 964 { 965 struct v4l2_event event = { 966 .type = V4L2_EVENT_FRAME_SYNC, 967 }; 968 969 event.u.frame_sync.frame_sequence = isp->frame_sequence; 970 v4l2_event_queue(isp->sd.devnode, &event); 971 } 972 973 irqreturn_t rkisp1_isp_isr(int irq, void *ctx) 974 { 975 struct device *dev = ctx; 976 struct rkisp1_device *rkisp1 = dev_get_drvdata(dev); 977 u32 status, isp_err; 978 979 status = rkisp1_read(rkisp1, RKISP1_CIF_ISP_MIS); 980 if (!status) 981 return IRQ_NONE; 982 983 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ICR, status); 984 985 /* Vertical sync signal, starting generating new frame */ 986 if (status & RKISP1_CIF_ISP_V_START) { 987 rkisp1->isp.frame_sequence++; 988 rkisp1_isp_queue_event_sof(&rkisp1->isp); 989 if (status & RKISP1_CIF_ISP_FRAME) { 990 WARN_ONCE(1, "irq delay is too long, buffers might not be in sync\n"); 991 rkisp1->debug.irq_delay++; 992 } 993 } 994 if (status & RKISP1_CIF_ISP_PIC_SIZE_ERROR) { 995 /* Clear pic_size_error */ 996 isp_err = rkisp1_read(rkisp1, RKISP1_CIF_ISP_ERR); 997 if (isp_err & RKISP1_CIF_ISP_ERR_INFORM_SIZE) 998 rkisp1->debug.inform_size_error++; 999 if (isp_err & RKISP1_CIF_ISP_ERR_IS_SIZE) 1000 rkisp1->debug.img_stabilization_size_error++; 1001 if (isp_err & RKISP1_CIF_ISP_ERR_OUTFORM_SIZE) 1002 rkisp1->debug.outform_size_error++; 1003 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ERR_CLR, isp_err); 1004 } else if (status & RKISP1_CIF_ISP_DATA_LOSS) { 1005 /* keep track of data_loss in debugfs */ 1006 rkisp1->debug.data_loss++; 1007 } 1008 1009 if (status & RKISP1_CIF_ISP_FRAME) { 1010 u32 isp_ris; 1011 1012 rkisp1->debug.complete_frames++; 1013 1014 /* New frame from the sensor received */ 1015 isp_ris = rkisp1_read(rkisp1, RKISP1_CIF_ISP_RIS); 1016 if (isp_ris & RKISP1_STATS_MEAS_MASK) 1017 rkisp1_stats_isr(&rkisp1->stats, isp_ris); 1018 /* 1019 * Then update changed configs. Some of them involve 1020 * lot of register writes. Do those only one per frame. 1021 * Do the updates in the order of the processing flow. 1022 */ 1023 rkisp1_params_isr(rkisp1); 1024 } 1025 1026 return IRQ_HANDLED; 1027 } 1028