1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * vsp1_hgt.c -- R-Car VSP1 Histogram Generator 2D 4 * 5 * Copyright (C) 2016 Renesas Electronics Corporation 6 * 7 * Contact: Niklas Söderlund (niklas.soderlund@ragnatech.se) 8 */ 9 10 #include <linux/device.h> 11 #include <linux/gfp.h> 12 13 #include <media/v4l2-subdev.h> 14 #include <media/videobuf2-vmalloc.h> 15 16 #include "vsp1.h" 17 #include "vsp1_dl.h" 18 #include "vsp1_hgt.h" 19 20 #define HGT_DATA_SIZE ((2 + 6 * 32) * 4) 21 22 /* ----------------------------------------------------------------------------- 23 * Device Access 24 */ 25 26 static inline u32 vsp1_hgt_read(struct vsp1_hgt *hgt, u32 reg) 27 { 28 return vsp1_read(hgt->histo.entity.vsp1, reg); 29 } 30 31 static inline void vsp1_hgt_write(struct vsp1_hgt *hgt, 32 struct vsp1_dl_body *dlb, u32 reg, u32 data) 33 { 34 vsp1_dl_body_write(dlb, reg, data); 35 } 36 37 /* ----------------------------------------------------------------------------- 38 * Frame End Handler 39 */ 40 41 void vsp1_hgt_frame_end(struct vsp1_entity *entity) 42 { 43 struct vsp1_hgt *hgt = to_hgt(&entity->subdev); 44 struct vsp1_histogram_buffer *buf; 45 unsigned int m; 46 unsigned int n; 47 u32 *data; 48 49 buf = vsp1_histogram_buffer_get(&hgt->histo); 50 if (!buf) 51 return; 52 53 data = buf->addr; 54 55 *data++ = vsp1_hgt_read(hgt, VI6_HGT_MAXMIN); 56 *data++ = vsp1_hgt_read(hgt, VI6_HGT_SUM); 57 58 for (m = 0; m < 6; ++m) 59 for (n = 0; n < 32; ++n) 60 *data++ = vsp1_hgt_read(hgt, VI6_HGT_HISTO(m, n)); 61 62 vsp1_histogram_buffer_complete(&hgt->histo, buf, HGT_DATA_SIZE); 63 } 64 65 /* ----------------------------------------------------------------------------- 66 * Controls 67 */ 68 69 #define V4L2_CID_VSP1_HGT_HUE_AREAS (V4L2_CID_USER_BASE | 0x1001) 70 71 static int hgt_hue_areas_try_ctrl(struct v4l2_ctrl *ctrl) 72 { 73 const u8 *values = ctrl->p_new.p_u8; 74 unsigned int i; 75 76 /* 77 * The hardware has constraints on the hue area boundaries beyond the 78 * control min, max and step. The values must match one of the following 79 * expressions. 80 * 81 * 0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U 82 * 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <= 0L 83 * 84 * Start by verifying the common part... 85 */ 86 for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) { 87 if (values[i] > values[i+1]) 88 return -EINVAL; 89 } 90 91 /* ... and handle 0L separately. */ 92 if (values[0] > values[1] && values[11] > values[0]) 93 return -EINVAL; 94 95 return 0; 96 } 97 98 static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl) 99 { 100 struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt, 101 ctrls); 102 103 memcpy(hgt->hue_areas, ctrl->p_new.p_u8, sizeof(hgt->hue_areas)); 104 return 0; 105 } 106 107 static const struct v4l2_ctrl_ops hgt_hue_areas_ctrl_ops = { 108 .try_ctrl = hgt_hue_areas_try_ctrl, 109 .s_ctrl = hgt_hue_areas_s_ctrl, 110 }; 111 112 static const struct v4l2_ctrl_config hgt_hue_areas = { 113 .ops = &hgt_hue_areas_ctrl_ops, 114 .id = V4L2_CID_VSP1_HGT_HUE_AREAS, 115 .name = "Boundary Values for Hue Area", 116 .type = V4L2_CTRL_TYPE_U8, 117 .min = 0, 118 .max = 255, 119 .def = 0, 120 .step = 1, 121 .dims = { 12 }, 122 }; 123 124 /* ----------------------------------------------------------------------------- 125 * VSP1 Entity Operations 126 */ 127 128 static void hgt_configure_stream(struct vsp1_entity *entity, 129 struct v4l2_subdev_state *state, 130 struct vsp1_pipeline *pipe, 131 struct vsp1_dl_list *dl, 132 struct vsp1_dl_body *dlb) 133 { 134 struct vsp1_hgt *hgt = to_hgt(&entity->subdev); 135 struct v4l2_rect *compose; 136 struct v4l2_rect *crop; 137 unsigned int hratio; 138 unsigned int vratio; 139 u8 lower; 140 u8 upper; 141 unsigned int i; 142 143 crop = v4l2_subdev_state_get_crop(state, HISTO_PAD_SINK); 144 compose = v4l2_subdev_state_get_compose(state, HISTO_PAD_SINK); 145 146 vsp1_hgt_write(hgt, dlb, VI6_HGT_REGRST, VI6_HGT_REGRST_RCLEA); 147 148 vsp1_hgt_write(hgt, dlb, VI6_HGT_OFFSET, 149 (crop->left << VI6_HGT_OFFSET_HOFFSET_SHIFT) | 150 (crop->top << VI6_HGT_OFFSET_VOFFSET_SHIFT)); 151 vsp1_hgt_write(hgt, dlb, VI6_HGT_SIZE, 152 (crop->width << VI6_HGT_SIZE_HSIZE_SHIFT) | 153 (crop->height << VI6_HGT_SIZE_VSIZE_SHIFT)); 154 155 mutex_lock(hgt->ctrls.lock); 156 for (i = 0; i < HGT_NUM_HUE_AREAS; ++i) { 157 lower = hgt->hue_areas[i*2 + 0]; 158 upper = hgt->hue_areas[i*2 + 1]; 159 vsp1_hgt_write(hgt, dlb, VI6_HGT_HUE_AREA(i), 160 (lower << VI6_HGT_HUE_AREA_LOWER_SHIFT) | 161 (upper << VI6_HGT_HUE_AREA_UPPER_SHIFT)); 162 } 163 mutex_unlock(hgt->ctrls.lock); 164 165 hratio = crop->width * 2 / compose->width / 3; 166 vratio = crop->height * 2 / compose->height / 3; 167 vsp1_hgt_write(hgt, dlb, VI6_HGT_MODE, 168 (hratio << VI6_HGT_MODE_HRATIO_SHIFT) | 169 (vratio << VI6_HGT_MODE_VRATIO_SHIFT)); 170 } 171 172 static const struct vsp1_entity_operations hgt_entity_ops = { 173 .configure_stream = hgt_configure_stream, 174 .destroy = vsp1_histogram_destroy, 175 }; 176 177 /* ----------------------------------------------------------------------------- 178 * Initialization and Cleanup 179 */ 180 181 static const unsigned int hgt_mbus_formats[] = { 182 MEDIA_BUS_FMT_AHSV8888_1X32, 183 }; 184 185 struct vsp1_hgt *vsp1_hgt_create(struct vsp1_device *vsp1) 186 { 187 struct vsp1_hgt *hgt; 188 int ret; 189 190 hgt = devm_kzalloc(vsp1->dev, sizeof(*hgt), GFP_KERNEL); 191 if (hgt == NULL) 192 return ERR_PTR(-ENOMEM); 193 194 /* Initialize the video device and queue for statistics data. */ 195 ret = vsp1_histogram_init(vsp1, &hgt->histo, VSP1_ENTITY_HGT, "hgt", 196 &hgt_entity_ops, hgt_mbus_formats, 197 ARRAY_SIZE(hgt_mbus_formats), 198 HGT_DATA_SIZE, V4L2_META_FMT_VSP1_HGT); 199 if (ret < 0) { 200 vsp1_entity_destroy(&hgt->histo.entity); 201 return ERR_PTR(ret); 202 } 203 204 /* Initialize the control handler. */ 205 v4l2_ctrl_handler_init(&hgt->ctrls, 1); 206 v4l2_ctrl_new_custom(&hgt->ctrls, &hgt_hue_areas, NULL); 207 208 hgt->histo.entity.subdev.ctrl_handler = &hgt->ctrls; 209 210 v4l2_ctrl_handler_setup(&hgt->ctrls); 211 212 return hgt; 213 } 214