1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * camss.h 4 * 5 * Qualcomm MSM Camera Subsystem - Core 6 * 7 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 8 * Copyright (C) 2015-2018 Linaro Ltd. 9 */ 10 #ifndef QC_MSM_CAMSS_H 11 #define QC_MSM_CAMSS_H 12 13 #include <linux/device.h> 14 #include <linux/types.h> 15 #include <media/v4l2-async.h> 16 #include <media/v4l2-device.h> 17 #include <media/v4l2-subdev.h> 18 #include <media/media-device.h> 19 #include <media/media-entity.h> 20 21 #include "camss-csid.h" 22 #include "camss-csiphy.h" 23 #include "camss-ispif.h" 24 #include "camss-vfe.h" 25 26 #define to_camss(ptr_module) \ 27 container_of(ptr_module, struct camss, ptr_module) 28 29 #define to_device(ptr_module) \ 30 (to_camss(ptr_module)->dev) 31 32 #define module_pointer(ptr_module, index) \ 33 ((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)])) 34 35 #define to_camss_index(ptr_module, index) \ 36 container_of(module_pointer(ptr_module, index), \ 37 struct camss, ptr_module) 38 39 #define to_device_index(ptr_module, index) \ 40 (to_camss_index(ptr_module, index)->dev) 41 42 #define CAMSS_RES_MAX 17 43 44 struct resources { 45 char *regulators[CAMSS_RES_MAX]; 46 char *clock[CAMSS_RES_MAX]; 47 u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX]; 48 char *reg[CAMSS_RES_MAX]; 49 char *interrupt[CAMSS_RES_MAX]; 50 }; 51 52 struct resources_ispif { 53 char *clock[CAMSS_RES_MAX]; 54 char *clock_for_reset[CAMSS_RES_MAX]; 55 char *reg[CAMSS_RES_MAX]; 56 char *interrupt; 57 }; 58 59 struct icc_bw_tbl { 60 u32 avg; 61 u32 peak; 62 }; 63 64 struct resources_icc { 65 char *name; 66 struct icc_bw_tbl icc_bw_tbl; 67 }; 68 69 enum pm_domain { 70 PM_DOMAIN_VFE0 = 0, 71 PM_DOMAIN_VFE1 = 1, 72 PM_DOMAIN_GEN1_COUNT = 2, /* CAMSS series of ISPs */ 73 PM_DOMAIN_VFELITE = 2, /* VFELITE / TOP GDSC */ 74 PM_DOMAIN_GEN2_COUNT = 3, /* Titan series of ISPs */ 75 }; 76 77 enum camss_version { 78 CAMSS_8x16, 79 CAMSS_8x96, 80 CAMSS_660, 81 CAMSS_845, 82 CAMSS_8250, 83 }; 84 85 enum icc_count { 86 ICC_DEFAULT_COUNT = 0, 87 ICC_SM8250_COUNT = 4, 88 }; 89 90 struct camss { 91 enum camss_version version; 92 struct v4l2_device v4l2_dev; 93 struct v4l2_async_notifier notifier; 94 struct media_device media_dev; 95 struct device *dev; 96 int csiphy_num; 97 struct csiphy_device *csiphy; 98 int csid_num; 99 struct csid_device *csid; 100 struct ispif_device *ispif; 101 int vfe_num; 102 struct vfe_device *vfe; 103 atomic_t ref_count; 104 struct device *genpd[PM_DOMAIN_GEN2_COUNT]; 105 struct device_link *genpd_link[PM_DOMAIN_GEN2_COUNT]; 106 struct icc_path *icc_path[ICC_SM8250_COUNT]; 107 struct icc_bw_tbl icc_bw_tbl[ICC_SM8250_COUNT]; 108 }; 109 110 struct camss_camera_interface { 111 u8 csiphy_id; 112 struct csiphy_csi2_cfg csi2; 113 }; 114 115 struct camss_async_subdev { 116 struct v4l2_async_subdev asd; /* must be first */ 117 struct camss_camera_interface interface; 118 }; 119 120 struct camss_clock { 121 struct clk *clk; 122 const char *name; 123 u32 *freq; 124 u32 nfreqs; 125 }; 126 127 void camss_add_clock_margin(u64 *rate); 128 int camss_enable_clocks(int nclocks, struct camss_clock *clock, 129 struct device *dev); 130 void camss_disable_clocks(int nclocks, struct camss_clock *clock); 131 struct media_entity *camss_find_sensor(struct media_entity *entity); 132 s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, 133 unsigned int lanes); 134 int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock); 135 int camss_pm_domain_on(struct camss *camss, int id); 136 void camss_pm_domain_off(struct camss *camss, int id); 137 void camss_delete(struct camss *camss); 138 139 #endif /* QC_MSM_CAMSS_H */ 140