1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * camss-vfe-480.c 4 * 5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v480 (SM8250) 6 * 7 * Copyright (C) 2020-2021 Linaro Ltd. 8 * Copyright (C) 2021 Jonathan Marek 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/iopoll.h> 15 16 #include "camss.h" 17 #include "camss-vfe.h" 18 19 /* VFE 2/3 are lite and have a different register layout */ 20 #define IS_LITE (vfe->id >= 2 ? 1 : 0) 21 22 #define VFE_HW_VERSION (0x00) 23 24 #define VFE_GLOBAL_RESET_CMD (IS_LITE ? 0x0c : 0x1c) 25 #define GLOBAL_RESET_HW_AND_REG (IS_LITE ? BIT(1) : BIT(0)) 26 27 #define VFE_REG_UPDATE_CMD (IS_LITE ? 0x20 : 0x34) 28 static inline int reg_update_rdi(struct vfe_device *vfe, int n) 29 { 30 return IS_LITE ? BIT(n) : BIT(1 + (n)); 31 } 32 33 #define REG_UPDATE_RDI reg_update_rdi 34 #define VFE_IRQ_CMD (IS_LITE ? 0x24 : 0x38) 35 #define IRQ_CMD_GLOBAL_CLEAR BIT(0) 36 37 #define VFE_IRQ_MASK(n) ((IS_LITE ? 0x28 : 0x3c) + (n) * 4) 38 #define IRQ_MASK_0_RESET_ACK (IS_LITE ? BIT(17) : BIT(0)) 39 #define IRQ_MASK_0_BUS_TOP_IRQ (IS_LITE ? BIT(4) : BIT(7)) 40 #define VFE_IRQ_CLEAR(n) ((IS_LITE ? 0x34 : 0x48) + (n) * 4) 41 #define VFE_IRQ_STATUS(n) ((IS_LITE ? 0x40 : 0x54) + (n) * 4) 42 43 #define BUS_REG_BASE (IS_LITE ? 0x1a00 : 0xaa00) 44 45 #define VFE_BUS_WM_CGC_OVERRIDE (BUS_REG_BASE + 0x08) 46 #define WM_CGC_OVERRIDE_ALL (0x3FFFFFF) 47 48 #define VFE_BUS_WM_TEST_BUS_CTRL (BUS_REG_BASE + 0xdc) 49 50 #define VFE_BUS_IRQ_MASK(n) (BUS_REG_BASE + 0x18 + (n) * 4) 51 static inline int bus_irq_mask_0_rdi_rup(struct vfe_device *vfe, int n) 52 { 53 return IS_LITE ? BIT(n) : BIT(3 + (n)); 54 } 55 56 #define BUS_IRQ_MASK_0_RDI_RUP bus_irq_mask_0_rdi_rup 57 static inline int bus_irq_mask_0_comp_done(struct vfe_device *vfe, int n) 58 { 59 return IS_LITE ? BIT(4 + (n)) : BIT(6 + (n)); 60 } 61 62 #define BUS_IRQ_MASK_0_COMP_DONE bus_irq_mask_0_comp_done 63 #define VFE_BUS_IRQ_CLEAR(n) (BUS_REG_BASE + 0x20 + (n) * 4) 64 #define VFE_BUS_IRQ_STATUS(n) (BUS_REG_BASE + 0x28 + (n) * 4) 65 #define VFE_BUS_IRQ_CLEAR_GLOBAL (BUS_REG_BASE + 0x30) 66 67 #define VFE_BUS_WM_CFG(n) (BUS_REG_BASE + 0x200 + (n) * 0x100) 68 #define WM_CFG_EN (0) 69 #define WM_CFG_MODE (16) 70 #define MODE_QCOM_PLAIN (0) 71 #define MODE_MIPI_RAW (1) 72 #define VFE_BUS_WM_IMAGE_ADDR(n) (BUS_REG_BASE + 0x204 + (n) * 0x100) 73 #define VFE_BUS_WM_FRAME_INCR(n) (BUS_REG_BASE + 0x208 + (n) * 0x100) 74 #define VFE_BUS_WM_IMAGE_CFG_0(n) (BUS_REG_BASE + 0x20c + (n) * 0x100) 75 #define WM_IMAGE_CFG_0_DEFAULT_WIDTH (0xFFFF) 76 #define VFE_BUS_WM_IMAGE_CFG_1(n) (BUS_REG_BASE + 0x210 + (n) * 0x100) 77 #define VFE_BUS_WM_IMAGE_CFG_2(n) (BUS_REG_BASE + 0x214 + (n) * 0x100) 78 #define VFE_BUS_WM_PACKER_CFG(n) (BUS_REG_BASE + 0x218 + (n) * 0x100) 79 #define VFE_BUS_WM_HEADER_ADDR(n) (BUS_REG_BASE + 0x220 + (n) * 0x100) 80 #define VFE_BUS_WM_HEADER_INCR(n) (BUS_REG_BASE + 0x224 + (n) * 0x100) 81 #define VFE_BUS_WM_HEADER_CFG(n) (BUS_REG_BASE + 0x228 + (n) * 0x100) 82 83 #define VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(n) (BUS_REG_BASE + 0x230 + (n) * 0x100) 84 #define VFE_BUS_WM_IRQ_SUBSAMPLE_PATTERN(n) (BUS_REG_BASE + 0x234 + (n) * 0x100) 85 #define VFE_BUS_WM_FRAMEDROP_PERIOD(n) (BUS_REG_BASE + 0x238 + (n) * 0x100) 86 #define VFE_BUS_WM_FRAMEDROP_PATTERN(n) (BUS_REG_BASE + 0x23c + (n) * 0x100) 87 88 #define VFE_BUS_WM_SYSTEM_CACHE_CFG(n) (BUS_REG_BASE + 0x260 + (n) * 0x100) 89 #define VFE_BUS_WM_BURST_LIMIT(n) (BUS_REG_BASE + 0x264 + (n) * 0x100) 90 91 /* for titan 480, each bus client is hardcoded to a specific path 92 * and each bus client is part of a hardcoded "comp group" 93 */ 94 #define RDI_WM(n) ((IS_LITE ? 0 : 23) + (n)) 95 #define RDI_COMP_GROUP(n) ((IS_LITE ? 0 : 11) + (n)) 96 97 static u32 vfe_hw_version(struct vfe_device *vfe) 98 { 99 u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION); 100 101 u32 gen = (hw_version >> 28) & 0xF; 102 u32 rev = (hw_version >> 16) & 0xFFF; 103 u32 step = hw_version & 0xFFFF; 104 105 dev_dbg(vfe->camss->dev, "VFE HW Version = %u.%u.%u\n", gen, rev, step); 106 107 return hw_version; 108 } 109 110 static void vfe_global_reset(struct vfe_device *vfe) 111 { 112 writel_relaxed(IRQ_MASK_0_RESET_ACK, vfe->base + VFE_IRQ_MASK(0)); 113 writel_relaxed(GLOBAL_RESET_HW_AND_REG, vfe->base + VFE_GLOBAL_RESET_CMD); 114 } 115 116 static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line) 117 { 118 struct v4l2_pix_format_mplane *pix = 119 &line->video_out.active_fmt.fmt.pix_mp; 120 121 wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ 122 123 /* no clock gating at bus input */ 124 writel_relaxed(WM_CGC_OVERRIDE_ALL, vfe->base + VFE_BUS_WM_CGC_OVERRIDE); 125 126 writel_relaxed(0x0, vfe->base + VFE_BUS_WM_TEST_BUS_CTRL); 127 128 writel_relaxed(pix->plane_fmt[0].bytesperline * pix->height, 129 vfe->base + VFE_BUS_WM_FRAME_INCR(wm)); 130 writel_relaxed(0xf, vfe->base + VFE_BUS_WM_BURST_LIMIT(wm)); 131 writel_relaxed(WM_IMAGE_CFG_0_DEFAULT_WIDTH, 132 vfe->base + VFE_BUS_WM_IMAGE_CFG_0(wm)); 133 writel_relaxed(pix->plane_fmt[0].bytesperline, 134 vfe->base + VFE_BUS_WM_IMAGE_CFG_2(wm)); 135 writel_relaxed(0, vfe->base + VFE_BUS_WM_PACKER_CFG(wm)); 136 137 /* no dropped frames, one irq per frame */ 138 writel_relaxed(0, vfe->base + VFE_BUS_WM_FRAMEDROP_PERIOD(wm)); 139 writel_relaxed(1, vfe->base + VFE_BUS_WM_FRAMEDROP_PATTERN(wm)); 140 writel_relaxed(0, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PERIOD(wm)); 141 writel_relaxed(1, vfe->base + VFE_BUS_WM_IRQ_SUBSAMPLE_PATTERN(wm)); 142 143 writel_relaxed(1 << WM_CFG_EN | MODE_MIPI_RAW << WM_CFG_MODE, 144 vfe->base + VFE_BUS_WM_CFG(wm)); 145 } 146 147 static void vfe_wm_stop(struct vfe_device *vfe, u8 wm) 148 { 149 wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ 150 writel_relaxed(0, vfe->base + VFE_BUS_WM_CFG(wm)); 151 } 152 153 static void vfe_wm_update(struct vfe_device *vfe, u8 wm, u32 addr, 154 struct vfe_line *line) 155 { 156 wm = RDI_WM(wm); /* map to actual WM used (from wm=RDI index) */ 157 writel_relaxed(addr, vfe->base + VFE_BUS_WM_IMAGE_ADDR(wm)); 158 } 159 160 static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) 161 { 162 vfe->reg_update |= REG_UPDATE_RDI(vfe, line_id); 163 writel_relaxed(vfe->reg_update, vfe->base + VFE_REG_UPDATE_CMD); 164 } 165 166 static inline void vfe_reg_update_clear(struct vfe_device *vfe, 167 enum vfe_line_id line_id) 168 { 169 vfe->reg_update &= ~REG_UPDATE_RDI(vfe, line_id); 170 } 171 172 static void vfe_enable_irq_common(struct vfe_device *vfe) 173 { 174 /* enable only the IRQs used: rup and comp_done irqs for RDI0 */ 175 writel_relaxed(IRQ_MASK_0_RESET_ACK | IRQ_MASK_0_BUS_TOP_IRQ, 176 vfe->base + VFE_IRQ_MASK(0)); 177 writel_relaxed(BUS_IRQ_MASK_0_RDI_RUP(vfe, 0) | 178 BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)), 179 vfe->base + VFE_BUS_IRQ_MASK(0)); 180 } 181 182 static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id); 183 static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm); 184 185 /* 186 * vfe_isr - VFE module interrupt handler 187 * @irq: Interrupt line 188 * @dev: VFE device 189 * 190 * Return IRQ_HANDLED on success 191 */ 192 static irqreturn_t vfe_isr(int irq, void *dev) 193 { 194 struct vfe_device *vfe = dev; 195 u32 status; 196 197 status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0)); 198 writel_relaxed(status, vfe->base + VFE_IRQ_CLEAR(0)); 199 writel_relaxed(IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_IRQ_CMD); 200 201 if (status & IRQ_MASK_0_RESET_ACK) 202 vfe_isr_reset_ack(vfe); 203 204 if (status & IRQ_MASK_0_BUS_TOP_IRQ) { 205 u32 status = readl_relaxed(vfe->base + VFE_BUS_IRQ_STATUS(0)); 206 207 writel_relaxed(status, vfe->base + VFE_BUS_IRQ_CLEAR(0)); 208 writel_relaxed(1, vfe->base + VFE_BUS_IRQ_CLEAR_GLOBAL); 209 210 if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, 0)) 211 vfe_isr_reg_update(vfe, 0); 212 213 if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0))) 214 vfe_isr_wm_done(vfe, 0); 215 } 216 217 return IRQ_HANDLED; 218 } 219 220 /* 221 * vfe_halt - Trigger halt on VFE module and wait to complete 222 * @vfe: VFE device 223 * 224 * Return 0 on success or a negative error code otherwise 225 */ 226 static int vfe_halt(struct vfe_device *vfe) 227 { 228 /* rely on vfe_disable_output() to stop the VFE */ 229 return 0; 230 } 231 232 static int vfe_get_output(struct vfe_line *line) 233 { 234 struct vfe_device *vfe = to_vfe(line); 235 struct vfe_output *output; 236 unsigned long flags; 237 int wm_idx; 238 239 spin_lock_irqsave(&vfe->output_lock, flags); 240 241 output = &line->output; 242 if (output->state != VFE_OUTPUT_OFF) { 243 dev_err(vfe->camss->dev, "Output is running\n"); 244 goto error; 245 } 246 247 output->wm_num = 1; 248 249 wm_idx = vfe_reserve_wm(vfe, line->id); 250 if (wm_idx < 0) { 251 dev_err(vfe->camss->dev, "Can not reserve wm\n"); 252 goto error_get_wm; 253 } 254 output->wm_idx[0] = wm_idx; 255 256 output->drop_update_idx = 0; 257 258 spin_unlock_irqrestore(&vfe->output_lock, flags); 259 260 return 0; 261 262 error_get_wm: 263 vfe_release_wm(vfe, output->wm_idx[0]); 264 output->state = VFE_OUTPUT_OFF; 265 error: 266 spin_unlock_irqrestore(&vfe->output_lock, flags); 267 268 return -EINVAL; 269 } 270 271 static int vfe_enable_output(struct vfe_line *line) 272 { 273 struct vfe_device *vfe = to_vfe(line); 274 struct vfe_output *output = &line->output; 275 unsigned long flags; 276 unsigned int i; 277 278 spin_lock_irqsave(&vfe->output_lock, flags); 279 280 vfe_reg_update_clear(vfe, line->id); 281 282 if (output->state != VFE_OUTPUT_OFF) { 283 dev_err(vfe->camss->dev, "Output is not in reserved state %d\n", 284 output->state); 285 spin_unlock_irqrestore(&vfe->output_lock, flags); 286 return -EINVAL; 287 } 288 289 WARN_ON(output->gen2.active_num); 290 291 output->state = VFE_OUTPUT_ON; 292 293 output->sequence = 0; 294 output->wait_reg_update = 0; 295 reinit_completion(&output->reg_update); 296 297 vfe_wm_start(vfe, output->wm_idx[0], line); 298 299 for (i = 0; i < 2; i++) { 300 output->buf[i] = vfe_buf_get_pending(output); 301 if (!output->buf[i]) 302 break; 303 output->gen2.active_num++; 304 vfe_wm_update(vfe, output->wm_idx[0], output->buf[i]->addr[0], line); 305 } 306 307 vfe_reg_update(vfe, line->id); 308 309 spin_unlock_irqrestore(&vfe->output_lock, flags); 310 311 return 0; 312 } 313 314 static int vfe_disable_output(struct vfe_line *line) 315 { 316 struct vfe_device *vfe = to_vfe(line); 317 struct vfe_output *output = &line->output; 318 unsigned long flags; 319 unsigned int i; 320 bool done; 321 int timeout = 0; 322 323 do { 324 spin_lock_irqsave(&vfe->output_lock, flags); 325 done = !output->gen2.active_num; 326 spin_unlock_irqrestore(&vfe->output_lock, flags); 327 usleep_range(10000, 20000); 328 329 if (timeout++ == 100) { 330 dev_err(vfe->camss->dev, "VFE idle timeout - resetting\n"); 331 vfe_reset(vfe); 332 output->gen2.active_num = 0; 333 return 0; 334 } 335 } while (!done); 336 337 spin_lock_irqsave(&vfe->output_lock, flags); 338 for (i = 0; i < output->wm_num; i++) 339 vfe_wm_stop(vfe, output->wm_idx[i]); 340 spin_unlock_irqrestore(&vfe->output_lock, flags); 341 342 return 0; 343 } 344 345 /* 346 * vfe_enable - Enable streaming on VFE line 347 * @line: VFE line 348 * 349 * Return 0 on success or a negative error code otherwise 350 */ 351 static int vfe_enable(struct vfe_line *line) 352 { 353 struct vfe_device *vfe = to_vfe(line); 354 int ret; 355 356 mutex_lock(&vfe->stream_lock); 357 358 if (!vfe->stream_count) 359 vfe_enable_irq_common(vfe); 360 361 vfe->stream_count++; 362 363 mutex_unlock(&vfe->stream_lock); 364 365 ret = vfe_get_output(line); 366 if (ret < 0) 367 goto error_get_output; 368 369 ret = vfe_enable_output(line); 370 if (ret < 0) 371 goto error_enable_output; 372 373 vfe->was_streaming = 1; 374 375 return 0; 376 377 error_enable_output: 378 vfe_put_output(line); 379 380 error_get_output: 381 mutex_lock(&vfe->stream_lock); 382 383 vfe->stream_count--; 384 385 mutex_unlock(&vfe->stream_lock); 386 387 return ret; 388 } 389 390 /* 391 * vfe_disable - Disable streaming on VFE line 392 * @line: VFE line 393 * 394 * Return 0 on success or a negative error code otherwise 395 */ 396 static int vfe_disable(struct vfe_line *line) 397 { 398 struct vfe_device *vfe = to_vfe(line); 399 400 vfe_disable_output(line); 401 402 vfe_put_output(line); 403 404 mutex_lock(&vfe->stream_lock); 405 406 vfe->stream_count--; 407 408 mutex_unlock(&vfe->stream_lock); 409 410 return 0; 411 } 412 413 /* 414 * vfe_isr_reg_update - Process reg update interrupt 415 * @vfe: VFE Device 416 * @line_id: VFE line 417 */ 418 static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id) 419 { 420 struct vfe_output *output; 421 unsigned long flags; 422 423 spin_lock_irqsave(&vfe->output_lock, flags); 424 vfe_reg_update_clear(vfe, line_id); 425 426 output = &vfe->line[line_id].output; 427 428 if (output->wait_reg_update) { 429 output->wait_reg_update = 0; 430 complete(&output->reg_update); 431 } 432 433 spin_unlock_irqrestore(&vfe->output_lock, flags); 434 } 435 436 /* 437 * vfe_isr_wm_done - Process write master done interrupt 438 * @vfe: VFE Device 439 * @wm: Write master id 440 */ 441 static void vfe_isr_wm_done(struct vfe_device *vfe, u8 wm) 442 { 443 struct vfe_line *line = &vfe->line[vfe->wm_output_map[wm]]; 444 struct camss_buffer *ready_buf; 445 struct vfe_output *output; 446 unsigned long flags; 447 u32 index; 448 u64 ts = ktime_get_ns(); 449 450 spin_lock_irqsave(&vfe->output_lock, flags); 451 452 if (vfe->wm_output_map[wm] == VFE_LINE_NONE) { 453 dev_err_ratelimited(vfe->camss->dev, 454 "Received wm done for unmapped index\n"); 455 goto out_unlock; 456 } 457 output = &vfe->line[vfe->wm_output_map[wm]].output; 458 459 ready_buf = output->buf[0]; 460 if (!ready_buf) { 461 dev_err_ratelimited(vfe->camss->dev, 462 "Missing ready buf %d!\n", output->state); 463 goto out_unlock; 464 } 465 466 ready_buf->vb.vb2_buf.timestamp = ts; 467 ready_buf->vb.sequence = output->sequence++; 468 469 index = 0; 470 output->buf[0] = output->buf[1]; 471 if (output->buf[0]) 472 index = 1; 473 474 output->buf[index] = vfe_buf_get_pending(output); 475 476 if (output->buf[index]) 477 vfe_wm_update(vfe, output->wm_idx[0], output->buf[index]->addr[0], line); 478 else 479 output->gen2.active_num--; 480 481 spin_unlock_irqrestore(&vfe->output_lock, flags); 482 483 vb2_buffer_done(&ready_buf->vb.vb2_buf, VB2_BUF_STATE_DONE); 484 485 return; 486 487 out_unlock: 488 spin_unlock_irqrestore(&vfe->output_lock, flags); 489 } 490 491 /* 492 * vfe_pm_domain_off - Disable power domains specific to this VFE. 493 * @vfe: VFE Device 494 */ 495 static void vfe_pm_domain_off(struct vfe_device *vfe) 496 { 497 struct camss *camss = vfe->camss; 498 499 if (vfe->id >= camss->vfe_num) 500 return; 501 502 device_link_del(camss->genpd_link[vfe->id]); 503 } 504 505 /* 506 * vfe_pm_domain_on - Enable power domains specific to this VFE. 507 * @vfe: VFE Device 508 */ 509 static int vfe_pm_domain_on(struct vfe_device *vfe) 510 { 511 struct camss *camss = vfe->camss; 512 enum vfe_line_id id = vfe->id; 513 514 if (id >= camss->vfe_num) 515 return 0; 516 517 camss->genpd_link[id] = device_link_add(camss->dev, camss->genpd[id], 518 DL_FLAG_STATELESS | 519 DL_FLAG_PM_RUNTIME | 520 DL_FLAG_RPM_ACTIVE); 521 if (!camss->genpd_link[id]) 522 return -EINVAL; 523 524 return 0; 525 } 526 527 /* 528 * vfe_queue_buffer - Add empty buffer 529 * @vid: Video device structure 530 * @buf: Buffer to be enqueued 531 * 532 * Add an empty buffer - depending on the current number of buffers it will be 533 * put in pending buffer queue or directly given to the hardware to be filled. 534 * 535 * Return 0 on success or a negative error code otherwise 536 */ 537 static int vfe_queue_buffer(struct camss_video *vid, 538 struct camss_buffer *buf) 539 { 540 struct vfe_line *line = container_of(vid, struct vfe_line, video_out); 541 struct vfe_device *vfe = to_vfe(line); 542 struct vfe_output *output; 543 unsigned long flags; 544 545 output = &line->output; 546 547 spin_lock_irqsave(&vfe->output_lock, flags); 548 549 if (output->state == VFE_OUTPUT_ON && output->gen2.active_num < 2) { 550 output->buf[output->gen2.active_num++] = buf; 551 vfe_wm_update(vfe, output->wm_idx[0], buf->addr[0], line); 552 } else { 553 vfe_buf_add_pending(output, buf); 554 } 555 556 spin_unlock_irqrestore(&vfe->output_lock, flags); 557 558 return 0; 559 } 560 561 static const struct camss_video_ops vfe_video_ops_480 = { 562 .queue_buffer = vfe_queue_buffer, 563 .flush_buffers = vfe_flush_buffers, 564 }; 565 566 static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) 567 { 568 vfe->video_ops = vfe_video_ops_480; 569 vfe->line_num = 1; 570 } 571 572 const struct vfe_hw_ops vfe_ops_480 = { 573 .global_reset = vfe_global_reset, 574 .hw_version = vfe_hw_version, 575 .isr = vfe_isr, 576 .pm_domain_off = vfe_pm_domain_off, 577 .pm_domain_on = vfe_pm_domain_on, 578 .subdev_init = vfe_subdev_init, 579 .vfe_disable = vfe_disable, 580 .vfe_enable = vfe_enable, 581 .vfe_halt = vfe_halt, 582 }; 583