1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * camss-csiphy.h 4 * 5 * Qualcomm MSM Camera Subsystem - CSIPHY Module 6 * 7 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved. 8 * Copyright (C) 2016-2018 Linaro Ltd. 9 */ 10 #ifndef QC_MSM_CAMSS_CSIPHY_H 11 #define QC_MSM_CAMSS_CSIPHY_H 12 13 #include <linux/clk.h> 14 #include <linux/interrupt.h> 15 #include <media/media-entity.h> 16 #include <media/v4l2-device.h> 17 #include <media/v4l2-mediabus.h> 18 #include <media/v4l2-subdev.h> 19 20 #define MSM_CSIPHY_PAD_SINK 0 21 #define MSM_CSIPHY_PAD_SRC 1 22 #define MSM_CSIPHY_PADS_NUM 2 23 24 struct csiphy_lane { 25 u8 pos; 26 u8 pol; 27 }; 28 29 struct csiphy_lanes_cfg { 30 int num_data; 31 struct csiphy_lane *data; 32 struct csiphy_lane clk; 33 }; 34 35 struct csiphy_csi2_cfg { 36 struct csiphy_lanes_cfg lane_cfg; 37 }; 38 39 struct csiphy_config { 40 u8 combo_mode; 41 u8 csid_id; 42 struct csiphy_csi2_cfg *csi2; 43 }; 44 45 struct csiphy_format_info { 46 u32 code; 47 u8 bpp; 48 }; 49 50 struct csiphy_formats { 51 unsigned int nformats; 52 const struct csiphy_format_info *formats; 53 }; 54 55 struct csiphy_device; 56 57 struct csiphy_hw_ops { 58 /* 59 * csiphy_get_lane_mask - Calculate CSI2 lane mask configuration parameter 60 * @lane_cfg - CSI2 lane configuration 61 * 62 * Return lane mask 63 */ 64 u8 (*get_lane_mask)(struct csiphy_lanes_cfg *lane_cfg); 65 void (*hw_version_read)(struct csiphy_device *csiphy, 66 struct device *dev); 67 void (*reset)(struct csiphy_device *csiphy); 68 void (*lanes_enable)(struct csiphy_device *csiphy, 69 struct csiphy_config *cfg, 70 s64 link_freq, u8 lane_mask); 71 void (*lanes_disable)(struct csiphy_device *csiphy, 72 struct csiphy_config *cfg); 73 irqreturn_t (*isr)(int irq, void *dev); 74 }; 75 76 struct csiphy_subdev_resources { 77 const struct csiphy_hw_ops *hw_ops; 78 const struct csiphy_formats *formats; 79 }; 80 81 struct csiphy_device { 82 struct camss *camss; 83 u8 id; 84 struct v4l2_subdev subdev; 85 struct media_pad pads[MSM_CSIPHY_PADS_NUM]; 86 void __iomem *base; 87 void __iomem *base_clk_mux; 88 u32 irq; 89 char irq_name[30]; 90 struct camss_clock *clock; 91 bool *rate_set; 92 int nclocks; 93 u32 timer_clk_rate; 94 struct csiphy_config cfg; 95 struct v4l2_mbus_framefmt fmt[MSM_CSIPHY_PADS_NUM]; 96 const struct csiphy_subdev_resources *res; 97 }; 98 99 struct camss_subdev_resources; 100 101 int msm_csiphy_subdev_init(struct camss *camss, 102 struct csiphy_device *csiphy, 103 const struct camss_subdev_resources *res, u8 id); 104 105 int msm_csiphy_register_entity(struct csiphy_device *csiphy, 106 struct v4l2_device *v4l2_dev); 107 108 void msm_csiphy_unregister_entity(struct csiphy_device *csiphy); 109 110 extern const struct csiphy_formats csiphy_formats_8x16; 111 extern const struct csiphy_formats csiphy_formats_8x96; 112 extern const struct csiphy_formats csiphy_formats_sdm845; 113 114 extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0; 115 extern const struct csiphy_hw_ops csiphy_ops_3ph_1_0; 116 117 #endif /* QC_MSM_CAMSS_CSIPHY_H */ 118