xref: /linux/drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c (revision fd7d598270724cc787982ea48bbe17ad383a8b7f)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2023 MediaTek Inc.
4  * Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
5  */
6 
7 #include "mtk-img-ipi.h"
8 #include "mtk-mdp3-cfg.h"
9 #include "mtk-mdp3-core.h"
10 #include "mtk-mdp3-comp.h"
11 #include "mtk-mdp3-regs.h"
12 
13 enum mt8183_mdp_comp_id {
14 	/* ISP */
15 	MT8183_MDP_COMP_WPEI = 0,
16 	MT8183_MDP_COMP_WPEO,           /* 1 */
17 	MT8183_MDP_COMP_WPEI2,          /* 2 */
18 	MT8183_MDP_COMP_WPEO2,          /* 3 */
19 	MT8183_MDP_COMP_ISP_IMGI,       /* 4 */
20 	MT8183_MDP_COMP_ISP_IMGO,       /* 5 */
21 	MT8183_MDP_COMP_ISP_IMG2O,      /* 6 */
22 
23 	/* IPU */
24 	MT8183_MDP_COMP_IPUI,           /* 7 */
25 	MT8183_MDP_COMP_IPUO,           /* 8 */
26 
27 	/* MDP */
28 	MT8183_MDP_COMP_CAMIN,          /* 9 */
29 	MT8183_MDP_COMP_CAMIN2,         /* 10 */
30 	MT8183_MDP_COMP_RDMA0,          /* 11 */
31 	MT8183_MDP_COMP_AAL0,           /* 12 */
32 	MT8183_MDP_COMP_CCORR0,         /* 13 */
33 	MT8183_MDP_COMP_RSZ0,           /* 14 */
34 	MT8183_MDP_COMP_RSZ1,           /* 15 */
35 	MT8183_MDP_COMP_TDSHP0,         /* 16 */
36 	MT8183_MDP_COMP_COLOR0,         /* 17 */
37 	MT8183_MDP_COMP_PATH0_SOUT,     /* 18 */
38 	MT8183_MDP_COMP_PATH1_SOUT,     /* 19 */
39 	MT8183_MDP_COMP_WROT0,          /* 20 */
40 	MT8183_MDP_COMP_WDMA,           /* 21 */
41 
42 	/* Dummy Engine */
43 	MT8183_MDP_COMP_RDMA1,          /* 22 */
44 	MT8183_MDP_COMP_RSZ2,           /* 23 */
45 	MT8183_MDP_COMP_TDSHP1,         /* 24 */
46 	MT8183_MDP_COMP_WROT1,          /* 25 */
47 };
48 
49 static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] = {
50 	[MDP_INFRA_MMSYS] = { .compatible = "mediatek,mt8183-mmsys" },
51 	[MDP_INFRA_MUTEX] = { .compatible = "mediatek,mt8183-disp-mutex" },
52 	[MDP_INFRA_SCP] = { .compatible = "mediatek,mt8183-scp" }
53 };
54 
55 static const struct mdp_platform_config mt8183_plat_cfg = {
56 	.rdma_support_10bit		= true,
57 	.rdma_rsz1_sram_sharing		= true,
58 	.rdma_upsample_repeat_only	= true,
59 	.rsz_disable_dcm_small_sample	= false,
60 	.wrot_filter_constraint		= false,
61 };
62 
63 static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] = {
64 	[MDP_COMP_RDMA0] = MUTEX_MOD_IDX_MDP_RDMA0,
65 	[MDP_COMP_RSZ0] = MUTEX_MOD_IDX_MDP_RSZ0,
66 	[MDP_COMP_RSZ1] = MUTEX_MOD_IDX_MDP_RSZ1,
67 	[MDP_COMP_TDSHP0] = MUTEX_MOD_IDX_MDP_TDSHP0,
68 	[MDP_COMP_WROT0] = MUTEX_MOD_IDX_MDP_WROT0,
69 	[MDP_COMP_WDMA] = MUTEX_MOD_IDX_MDP_WDMA,
70 	[MDP_COMP_AAL0] = MUTEX_MOD_IDX_MDP_AAL0,
71 	[MDP_COMP_CCORR0] = MUTEX_MOD_IDX_MDP_CCORR0,
72 };
73 
74 static const struct mdp_comp_data mt8183_mdp_comp_data[MDP_MAX_COMP_COUNT] = {
75 	[MDP_COMP_WPEI] = {
76 		{MDP_COMP_TYPE_WPEI, 0, MT8183_MDP_COMP_WPEI},
77 		{0, 0, 0}
78 	},
79 	[MDP_COMP_WPEO] = {
80 		{MDP_COMP_TYPE_EXTO, 2, MT8183_MDP_COMP_WPEO},
81 		{0, 0, 0}
82 	},
83 	[MDP_COMP_WPEI2] = {
84 		{MDP_COMP_TYPE_WPEI, 1, MT8183_MDP_COMP_WPEI2},
85 		{0, 0, 0}
86 	},
87 	[MDP_COMP_WPEO2] = {
88 		{MDP_COMP_TYPE_EXTO, 3, MT8183_MDP_COMP_WPEO2},
89 		{0, 0, 0}
90 	},
91 	[MDP_COMP_ISP_IMGI] = {
92 		{MDP_COMP_TYPE_IMGI, 0, MT8183_MDP_COMP_ISP_IMGI},
93 		{0, 0, 4}
94 	},
95 	[MDP_COMP_ISP_IMGO] = {
96 		{MDP_COMP_TYPE_EXTO, 0, MT8183_MDP_COMP_ISP_IMGO},
97 		{0, 0, 4}
98 	},
99 	[MDP_COMP_ISP_IMG2O] = {
100 		{MDP_COMP_TYPE_EXTO, 1, MT8183_MDP_COMP_ISP_IMG2O},
101 		{0, 0, 0}
102 	},
103 	[MDP_COMP_CAMIN] = {
104 		{MDP_COMP_TYPE_DL_PATH, 0, MT8183_MDP_COMP_CAMIN},
105 		{2, 2, 1}
106 	},
107 	[MDP_COMP_CAMIN2] = {
108 		{MDP_COMP_TYPE_DL_PATH, 1, MT8183_MDP_COMP_CAMIN2},
109 		{2, 4, 1}
110 	},
111 	[MDP_COMP_RDMA0] = {
112 		{MDP_COMP_TYPE_RDMA, 0, MT8183_MDP_COMP_RDMA0},
113 		{2, 0, 0}
114 	},
115 	[MDP_COMP_CCORR0] = {
116 		{MDP_COMP_TYPE_CCORR, 0, MT8183_MDP_COMP_CCORR0},
117 		{1, 0, 0}
118 	},
119 	[MDP_COMP_RSZ0] = {
120 		{MDP_COMP_TYPE_RSZ, 0, MT8183_MDP_COMP_RSZ0},
121 		{1, 0, 0}
122 	},
123 	[MDP_COMP_RSZ1] = {
124 		{MDP_COMP_TYPE_RSZ, 1, MT8183_MDP_COMP_RSZ1},
125 		{1, 0, 0}
126 	},
127 	[MDP_COMP_TDSHP0] = {
128 		{MDP_COMP_TYPE_TDSHP, 0, MT8183_MDP_COMP_TDSHP0},
129 		{0, 0, 0}
130 	},
131 	[MDP_COMP_PATH0_SOUT] = {
132 		{MDP_COMP_TYPE_PATH, 0, MT8183_MDP_COMP_PATH0_SOUT},
133 		{0, 0, 0}
134 	},
135 	[MDP_COMP_PATH1_SOUT] = {
136 		{MDP_COMP_TYPE_PATH, 1, MT8183_MDP_COMP_PATH1_SOUT},
137 		{0, 0, 0}
138 	},
139 	[MDP_COMP_WROT0] = {
140 		{MDP_COMP_TYPE_WROT, 0, MT8183_MDP_COMP_WROT0},
141 		{1, 0, 0}
142 	},
143 	[MDP_COMP_WDMA] = {
144 		{MDP_COMP_TYPE_WDMA, 0, MT8183_MDP_COMP_WDMA},
145 		{1, 0, 0}
146 	},
147 };
148 
149 static const struct of_device_id mt8183_sub_comp_dt_ids[] = {
150 	{
151 		.compatible = "mediatek,mt8183-mdp3-wdma",
152 		.data = (void *)MDP_COMP_TYPE_PATH,
153 	}, {
154 		.compatible = "mediatek,mt8183-mdp3-wrot",
155 		.data = (void *)MDP_COMP_TYPE_PATH,
156 	},
157 	{}
158 };
159 
160 /*
161  * All 10-bit related formats are not added in the basic format list,
162  * please add the corresponding format settings before use.
163  */
164 static const struct mdp_format mt8183_formats[] = {
165 	{
166 		.pixelformat	= V4L2_PIX_FMT_GREY,
167 		.mdp_color	= MDP_COLOR_GREY,
168 		.depth		= { 8 },
169 		.row_depth	= { 8 },
170 		.num_planes	= 1,
171 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
172 	}, {
173 		.pixelformat	= V4L2_PIX_FMT_RGB565X,
174 		.mdp_color	= MDP_COLOR_BGR565,
175 		.depth		= { 16 },
176 		.row_depth	= { 16 },
177 		.num_planes	= 1,
178 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
179 	}, {
180 		.pixelformat	= V4L2_PIX_FMT_RGB565,
181 		.mdp_color	= MDP_COLOR_RGB565,
182 		.depth		= { 16 },
183 		.row_depth	= { 16 },
184 		.num_planes	= 1,
185 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
186 	}, {
187 		.pixelformat	= V4L2_PIX_FMT_RGB24,
188 		.mdp_color	= MDP_COLOR_RGB888,
189 		.depth		= { 24 },
190 		.row_depth	= { 24 },
191 		.num_planes	= 1,
192 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
193 	}, {
194 		.pixelformat	= V4L2_PIX_FMT_BGR24,
195 		.mdp_color	= MDP_COLOR_BGR888,
196 		.depth		= { 24 },
197 		.row_depth	= { 24 },
198 		.num_planes	= 1,
199 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
200 	}, {
201 		.pixelformat	= V4L2_PIX_FMT_ABGR32,
202 		.mdp_color	= MDP_COLOR_BGRA8888,
203 		.depth		= { 32 },
204 		.row_depth	= { 32 },
205 		.num_planes	= 1,
206 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
207 	}, {
208 		.pixelformat	= V4L2_PIX_FMT_ARGB32,
209 		.mdp_color	= MDP_COLOR_ARGB8888,
210 		.depth		= { 32 },
211 		.row_depth	= { 32 },
212 		.num_planes	= 1,
213 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
214 	}, {
215 		.pixelformat	= V4L2_PIX_FMT_UYVY,
216 		.mdp_color	= MDP_COLOR_UYVY,
217 		.depth		= { 16 },
218 		.row_depth	= { 16 },
219 		.num_planes	= 1,
220 		.walign		= 1,
221 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
222 	}, {
223 		.pixelformat	= V4L2_PIX_FMT_VYUY,
224 		.mdp_color	= MDP_COLOR_VYUY,
225 		.depth		= { 16 },
226 		.row_depth	= { 16 },
227 		.num_planes	= 1,
228 		.walign		= 1,
229 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
230 	}, {
231 		.pixelformat	= V4L2_PIX_FMT_YUYV,
232 		.mdp_color	= MDP_COLOR_YUYV,
233 		.depth		= { 16 },
234 		.row_depth	= { 16 },
235 		.num_planes	= 1,
236 		.walign		= 1,
237 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
238 	}, {
239 		.pixelformat	= V4L2_PIX_FMT_YVYU,
240 		.mdp_color	= MDP_COLOR_YVYU,
241 		.depth		= { 16 },
242 		.row_depth	= { 16 },
243 		.num_planes	= 1,
244 		.walign		= 1,
245 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
246 	}, {
247 		.pixelformat	= V4L2_PIX_FMT_YUV420,
248 		.mdp_color	= MDP_COLOR_I420,
249 		.depth		= { 12 },
250 		.row_depth	= { 8 },
251 		.num_planes	= 1,
252 		.walign		= 1,
253 		.halign		= 1,
254 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
255 	}, {
256 		.pixelformat	= V4L2_PIX_FMT_YVU420,
257 		.mdp_color	= MDP_COLOR_YV12,
258 		.depth		= { 12 },
259 		.row_depth	= { 8 },
260 		.num_planes	= 1,
261 		.walign		= 1,
262 		.halign		= 1,
263 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
264 	}, {
265 		.pixelformat	= V4L2_PIX_FMT_NV12,
266 		.mdp_color	= MDP_COLOR_NV12,
267 		.depth		= { 12 },
268 		.row_depth	= { 8 },
269 		.num_planes	= 1,
270 		.walign		= 1,
271 		.halign		= 1,
272 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
273 	}, {
274 		.pixelformat	= V4L2_PIX_FMT_NV21,
275 		.mdp_color	= MDP_COLOR_NV21,
276 		.depth		= { 12 },
277 		.row_depth	= { 8 },
278 		.num_planes	= 1,
279 		.walign		= 1,
280 		.halign		= 1,
281 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
282 	}, {
283 		.pixelformat	= V4L2_PIX_FMT_NV16,
284 		.mdp_color	= MDP_COLOR_NV16,
285 		.depth		= { 16 },
286 		.row_depth	= { 8 },
287 		.num_planes	= 1,
288 		.walign		= 1,
289 		.flags		= MDP_FMT_FLAG_OUTPUT,
290 	}, {
291 		.pixelformat	= V4L2_PIX_FMT_NV61,
292 		.mdp_color	= MDP_COLOR_NV61,
293 		.depth		= { 16 },
294 		.row_depth	= { 8 },
295 		.num_planes	= 1,
296 		.walign		= 1,
297 		.flags		= MDP_FMT_FLAG_OUTPUT,
298 	}, {
299 		.pixelformat	= V4L2_PIX_FMT_NV24,
300 		.mdp_color	= MDP_COLOR_NV24,
301 		.depth		= { 24 },
302 		.row_depth	= { 8 },
303 		.num_planes	= 1,
304 		.flags		= MDP_FMT_FLAG_OUTPUT,
305 	}, {
306 		.pixelformat	= V4L2_PIX_FMT_NV42,
307 		.mdp_color	= MDP_COLOR_NV42,
308 		.depth		= { 24 },
309 		.row_depth	= { 8 },
310 		.num_planes	= 1,
311 		.flags		= MDP_FMT_FLAG_OUTPUT,
312 	}, {
313 		.pixelformat	= V4L2_PIX_FMT_MT21C,
314 		.mdp_color	= MDP_COLOR_420_BLK_UFO,
315 		.depth		= { 8, 4 },
316 		.row_depth	= { 8, 8 },
317 		.num_planes	= 2,
318 		.walign		= 4,
319 		.halign		= 5,
320 		.flags		= MDP_FMT_FLAG_OUTPUT,
321 	}, {
322 		.pixelformat	= V4L2_PIX_FMT_MM21,
323 		.mdp_color	= MDP_COLOR_420_BLK,
324 		.depth		= { 8, 4 },
325 		.row_depth	= { 8, 8 },
326 		.num_planes	= 2,
327 		.walign		= 4,
328 		.halign		= 5,
329 		.flags		= MDP_FMT_FLAG_OUTPUT,
330 	}, {
331 		.pixelformat	= V4L2_PIX_FMT_NV12M,
332 		.mdp_color	= MDP_COLOR_NV12,
333 		.depth		= { 8, 4 },
334 		.row_depth	= { 8, 8 },
335 		.num_planes	= 2,
336 		.walign		= 1,
337 		.halign		= 1,
338 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
339 	}, {
340 		.pixelformat	= V4L2_PIX_FMT_NV21M,
341 		.mdp_color	= MDP_COLOR_NV21,
342 		.depth		= { 8, 4 },
343 		.row_depth	= { 8, 8 },
344 		.num_planes	= 2,
345 		.walign		= 1,
346 		.halign		= 1,
347 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
348 	}, {
349 		.pixelformat	= V4L2_PIX_FMT_NV16M,
350 		.mdp_color	= MDP_COLOR_NV16,
351 		.depth		= { 8, 8 },
352 		.row_depth	= { 8, 8 },
353 		.num_planes	= 2,
354 		.walign		= 1,
355 		.flags		= MDP_FMT_FLAG_OUTPUT,
356 	}, {
357 		.pixelformat	= V4L2_PIX_FMT_NV61M,
358 		.mdp_color	= MDP_COLOR_NV61,
359 		.depth		= { 8, 8 },
360 		.row_depth	= { 8, 8 },
361 		.num_planes	= 2,
362 		.walign		= 1,
363 		.flags		= MDP_FMT_FLAG_OUTPUT,
364 	}, {
365 		.pixelformat	= V4L2_PIX_FMT_YUV420M,
366 		.mdp_color	= MDP_COLOR_I420,
367 		.depth		= { 8, 2, 2 },
368 		.row_depth	= { 8, 4, 4 },
369 		.num_planes	= 3,
370 		.walign		= 1,
371 		.halign		= 1,
372 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
373 	}, {
374 		.pixelformat	= V4L2_PIX_FMT_YVU420M,
375 		.mdp_color	= MDP_COLOR_YV12,
376 		.depth		= { 8, 2, 2 },
377 		.row_depth	= { 8, 4, 4 },
378 		.num_planes	= 3,
379 		.walign		= 1,
380 		.halign		= 1,
381 		.flags		= MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
382 	}
383 };
384 
385 static const struct mdp_limit mt8183_mdp_def_limit = {
386 	.out_limit = {
387 		.wmin	= 16,
388 		.hmin	= 16,
389 		.wmax	= 8176,
390 		.hmax	= 8176,
391 	},
392 	.cap_limit = {
393 		.wmin	= 2,
394 		.hmin	= 2,
395 		.wmax	= 8176,
396 		.hmax	= 8176,
397 	},
398 	.h_scale_up_max = 32,
399 	.v_scale_up_max = 32,
400 	.h_scale_down_max = 20,
401 	.v_scale_down_max = 128,
402 };
403 
404 static const struct mdp_pipe_info mt8183_pipe_info[] = {
405 	[MDP_PIPE_WPEI] = {MDP_PIPE_WPEI, 0},
406 	[MDP_PIPE_WPEI2] = {MDP_PIPE_WPEI2, 1},
407 	[MDP_PIPE_IMGI] = {MDP_PIPE_IMGI, 2},
408 	[MDP_PIPE_RDMA0] = {MDP_PIPE_RDMA0, 3}
409 };
410 
411 const struct mtk_mdp_driver_data mt8183_mdp_driver_data = {
412 	.mdp_plat_id = MT8183,
413 	.mdp_probe_infra = mt8183_mdp_probe_infra,
414 	.mdp_cfg = &mt8183_plat_cfg,
415 	.mdp_mutex_table_idx = mt8183_mutex_idx,
416 	.comp_data = mt8183_mdp_comp_data,
417 	.comp_data_len = ARRAY_SIZE(mt8183_mdp_comp_data),
418 	.mdp_sub_comp_dt_ids = mt8183_sub_comp_dt_ids,
419 	.format = mt8183_formats,
420 	.format_len = ARRAY_SIZE(mt8183_formats),
421 	.def_limit = &mt8183_mdp_def_limit,
422 	.pipe_info = mt8183_pipe_info,
423 	.pipe_info_len = ARRAY_SIZE(mt8183_pipe_info),
424 };
425 
426 s32 mdp_cfg_get_id_inner(struct mdp_dev *mdp_dev, enum mtk_mdp_comp_id id)
427 {
428 	if (!mdp_dev)
429 		return MDP_COMP_NONE;
430 	if (id <= MDP_COMP_NONE || id >= MDP_MAX_COMP_COUNT)
431 		return MDP_COMP_NONE;
432 
433 	return mdp_dev->mdp_data->comp_data[id].match.inner_id;
434 }
435 
436 enum mtk_mdp_comp_id mdp_cfg_get_id_public(struct mdp_dev *mdp_dev, s32 inner_id)
437 {
438 	enum mtk_mdp_comp_id public_id = MDP_COMP_NONE;
439 	u32 i;
440 
441 	if (IS_ERR(mdp_dev) || !inner_id)
442 		goto err_public_id;
443 
444 	for (i = 0; i < MDP_MAX_COMP_COUNT; i++) {
445 		if (mdp_dev->mdp_data->comp_data[i].match.inner_id == inner_id) {
446 			public_id = i;
447 			return public_id;
448 		}
449 	}
450 
451 err_public_id:
452 	return public_id;
453 }
454