1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2020-2021 NXP 4 */ 5 6 #include <linux/init.h> 7 #include <linux/interconnect.h> 8 #include <linux/ioctl.h> 9 #include <linux/list.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/pm_runtime.h> 13 #include <linux/videodev2.h> 14 #include <media/v4l2-device.h> 15 #include <media/v4l2-event.h> 16 #include <media/v4l2-mem2mem.h> 17 #include <media/v4l2-ioctl.h> 18 #include <media/videobuf2-v4l2.h> 19 #include <media/videobuf2-dma-contig.h> 20 #include <media/videobuf2-vmalloc.h> 21 #include "vpu.h" 22 #include "vpu_core.h" 23 #include "vpu_v4l2.h" 24 #include "vpu_msgs.h" 25 #include "vpu_helpers.h" 26 27 static char *vpu_type_name(u32 type) 28 { 29 return V4L2_TYPE_IS_OUTPUT(type) ? "output" : "capture"; 30 } 31 32 void vpu_inst_lock(struct vpu_inst *inst) 33 { 34 mutex_lock(&inst->lock); 35 } 36 37 void vpu_inst_unlock(struct vpu_inst *inst) 38 { 39 mutex_unlock(&inst->lock); 40 } 41 42 dma_addr_t vpu_get_vb_phy_addr(struct vb2_buffer *vb, u32 plane_no) 43 { 44 if (plane_no >= vb->num_planes) 45 return 0; 46 return vb2_dma_contig_plane_dma_addr(vb, plane_no) + 47 vb->planes[plane_no].data_offset; 48 } 49 50 static unsigned int vpu_get_vb_length(struct vb2_buffer *vb, u32 plane_no) 51 { 52 if (plane_no >= vb->num_planes) 53 return 0; 54 return vb2_plane_size(vb, plane_no) - vb->planes[plane_no].data_offset; 55 } 56 57 void vpu_set_buffer_state(struct vb2_v4l2_buffer *vbuf, unsigned int state) 58 { 59 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf); 60 61 vpu_buf->state = state; 62 } 63 64 unsigned int vpu_get_buffer_state(struct vb2_v4l2_buffer *vbuf) 65 { 66 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf); 67 68 return vpu_buf->state; 69 } 70 71 void vpu_set_buffer_average_qp(struct vb2_v4l2_buffer *vbuf, u32 qp) 72 { 73 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf); 74 75 vpu_buf->average_qp = qp; 76 } 77 78 void vpu_v4l2_set_error(struct vpu_inst *inst) 79 { 80 vpu_inst_lock(inst); 81 dev_err(inst->dev, "some error occurs in codec\n"); 82 if (inst->fh.m2m_ctx) { 83 vb2_queue_error(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx)); 84 vb2_queue_error(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx)); 85 } 86 vpu_inst_unlock(inst); 87 } 88 89 static int vpu_notify_eos(struct vpu_inst *inst) 90 { 91 static const struct v4l2_event ev = { 92 .id = 0, 93 .type = V4L2_EVENT_EOS 94 }; 95 96 vpu_trace(inst->dev, "[%d]\n", inst->id); 97 v4l2_event_queue_fh(&inst->fh, &ev); 98 99 return 0; 100 } 101 102 int vpu_notify_source_change(struct vpu_inst *inst) 103 { 104 static const struct v4l2_event ev = { 105 .type = V4L2_EVENT_SOURCE_CHANGE, 106 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION 107 }; 108 109 vpu_trace(inst->dev, "[%d]\n", inst->id); 110 v4l2_event_queue_fh(&inst->fh, &ev); 111 return 0; 112 } 113 114 int vpu_set_last_buffer_dequeued(struct vpu_inst *inst, bool eos) 115 { 116 struct vb2_queue *q; 117 118 if (!inst || !inst->fh.m2m_ctx) 119 return -EINVAL; 120 121 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx); 122 if (!list_empty(&q->done_list)) 123 return -EINVAL; 124 125 if (q->last_buffer_dequeued) 126 return 0; 127 vpu_trace(inst->dev, "last buffer dequeued\n"); 128 q->last_buffer_dequeued = true; 129 wake_up(&q->done_wq); 130 if (eos) 131 vpu_notify_eos(inst); 132 return 0; 133 } 134 135 bool vpu_is_source_empty(struct vpu_inst *inst) 136 { 137 struct v4l2_m2m_buffer *buf = NULL; 138 139 if (!inst->fh.m2m_ctx) 140 return true; 141 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) { 142 if (vpu_get_buffer_state(&buf->vb) == VPU_BUF_STATE_IDLE) 143 return false; 144 } 145 return true; 146 } 147 148 static int vpu_init_format(struct vpu_inst *inst, struct vpu_format *fmt) 149 { 150 const struct vpu_format *info; 151 152 info = vpu_helper_find_format(inst, fmt->type, fmt->pixfmt); 153 if (!info) { 154 info = vpu_helper_enum_format(inst, fmt->type, 0); 155 if (!info) 156 return -EINVAL; 157 } 158 memcpy(fmt, info, sizeof(*fmt)); 159 160 return 0; 161 } 162 163 static int vpu_calc_fmt_bytesperline(struct v4l2_format *f, struct vpu_format *fmt) 164 { 165 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 166 int i; 167 168 if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) { 169 for (i = 0; i < fmt->comp_planes; i++) 170 fmt->bytesperline[i] = 0; 171 return 0; 172 } 173 if (pixmp->num_planes == fmt->comp_planes) { 174 for (i = 0; i < fmt->comp_planes; i++) 175 fmt->bytesperline[i] = pixmp->plane_fmt[i].bytesperline; 176 return 0; 177 } 178 if (pixmp->num_planes > 1) 179 return -EINVAL; 180 181 /*amphion vpu only support nv12 and nv12 tiled, 182 * so the bytesperline of luma and chroma should be same 183 */ 184 for (i = 0; i < fmt->comp_planes; i++) 185 fmt->bytesperline[i] = pixmp->plane_fmt[0].bytesperline; 186 187 return 0; 188 } 189 190 static int vpu_calc_fmt_sizeimage(struct vpu_inst *inst, struct vpu_format *fmt) 191 { 192 u32 stride = 1; 193 int i; 194 195 if (!(fmt->flags & V4L2_FMT_FLAG_COMPRESSED)) { 196 const struct vpu_core_resources *res = vpu_get_resource(inst); 197 198 if (res) 199 stride = res->stride; 200 } 201 202 for (i = 0; i < fmt->comp_planes; i++) { 203 fmt->sizeimage[i] = vpu_helper_get_plane_size(fmt->pixfmt, 204 fmt->width, 205 fmt->height, 206 i, 207 stride, 208 fmt->field != V4L2_FIELD_NONE ? 1 : 0, 209 &fmt->bytesperline[i]); 210 fmt->sizeimage[i] = max_t(u32, fmt->sizeimage[i], PAGE_SIZE); 211 if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) { 212 fmt->sizeimage[i] = clamp_val(fmt->sizeimage[i], SZ_128K, SZ_8M); 213 fmt->bytesperline[i] = 0; 214 } 215 } 216 217 return 0; 218 } 219 220 u32 vpu_get_fmt_plane_size(struct vpu_format *fmt, u32 plane_no) 221 { 222 u32 size; 223 int i; 224 225 if (plane_no >= fmt->mem_planes) 226 return 0; 227 228 if (fmt->comp_planes == fmt->mem_planes) 229 return fmt->sizeimage[plane_no]; 230 if (plane_no < fmt->mem_planes - 1) 231 return fmt->sizeimage[plane_no]; 232 233 size = fmt->sizeimage[plane_no]; 234 for (i = fmt->mem_planes; i < fmt->comp_planes; i++) 235 size += fmt->sizeimage[i]; 236 237 return size; 238 } 239 240 int vpu_try_fmt_common(struct vpu_inst *inst, struct v4l2_format *f, struct vpu_format *fmt) 241 { 242 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 243 int i; 244 int ret; 245 246 fmt->pixfmt = pixmp->pixelformat; 247 fmt->type = f->type; 248 ret = vpu_init_format(inst, fmt); 249 if (ret < 0) 250 return ret; 251 252 fmt->width = pixmp->width; 253 fmt->height = pixmp->height; 254 if (fmt->width) 255 fmt->width = vpu_helper_valid_frame_width(inst, fmt->width); 256 if (fmt->height) 257 fmt->height = vpu_helper_valid_frame_height(inst, fmt->height); 258 fmt->field = pixmp->field == V4L2_FIELD_ANY ? V4L2_FIELD_NONE : pixmp->field; 259 vpu_calc_fmt_bytesperline(f, fmt); 260 vpu_calc_fmt_sizeimage(inst, fmt); 261 if ((fmt->flags & V4L2_FMT_FLAG_COMPRESSED) && pixmp->plane_fmt[0].sizeimage) 262 fmt->sizeimage[0] = clamp_val(pixmp->plane_fmt[0].sizeimage, SZ_128K, SZ_8M); 263 264 pixmp->pixelformat = fmt->pixfmt; 265 pixmp->width = fmt->width; 266 pixmp->height = fmt->height; 267 pixmp->flags = fmt->flags; 268 pixmp->num_planes = fmt->mem_planes; 269 pixmp->field = fmt->field; 270 memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); 271 for (i = 0; i < pixmp->num_planes; i++) { 272 pixmp->plane_fmt[i].bytesperline = fmt->bytesperline[i]; 273 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(fmt, i); 274 memset(pixmp->plane_fmt[i].reserved, 0, sizeof(pixmp->plane_fmt[i].reserved)); 275 } 276 277 return 0; 278 } 279 280 static bool vpu_check_ready(struct vpu_inst *inst, u32 type) 281 { 282 if (!inst) 283 return false; 284 if (inst->state == VPU_CODEC_STATE_DEINIT || inst->id < 0) 285 return false; 286 if (!inst->ops->check_ready) 287 return true; 288 return call_vop(inst, check_ready, type); 289 } 290 291 int vpu_process_output_buffer(struct vpu_inst *inst) 292 { 293 struct v4l2_m2m_buffer *buf = NULL; 294 struct vb2_v4l2_buffer *vbuf = NULL; 295 296 if (!inst || !inst->fh.m2m_ctx) 297 return -EINVAL; 298 299 if (!vpu_check_ready(inst, inst->out_format.type)) 300 return -EINVAL; 301 302 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) { 303 vbuf = &buf->vb; 304 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_IDLE) 305 break; 306 vbuf = NULL; 307 } 308 309 if (!vbuf) 310 return -EINVAL; 311 312 dev_dbg(inst->dev, "[%d]frame id = %d / %d\n", 313 inst->id, vbuf->sequence, inst->sequence); 314 return call_vop(inst, process_output, &vbuf->vb2_buf); 315 } 316 317 int vpu_process_capture_buffer(struct vpu_inst *inst) 318 { 319 struct v4l2_m2m_buffer *buf = NULL; 320 struct vb2_v4l2_buffer *vbuf = NULL; 321 322 if (!inst || !inst->fh.m2m_ctx) 323 return -EINVAL; 324 325 if (!vpu_check_ready(inst, inst->cap_format.type)) 326 return -EINVAL; 327 328 v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) { 329 vbuf = &buf->vb; 330 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_IDLE) 331 break; 332 vbuf = NULL; 333 } 334 if (!vbuf) 335 return -EINVAL; 336 337 return call_vop(inst, process_capture, &vbuf->vb2_buf); 338 } 339 340 struct vb2_v4l2_buffer *vpu_next_src_buf(struct vpu_inst *inst) 341 { 342 struct vb2_v4l2_buffer *src_buf = NULL; 343 344 if (!inst->fh.m2m_ctx) 345 return NULL; 346 347 src_buf = v4l2_m2m_next_src_buf(inst->fh.m2m_ctx); 348 if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE) 349 return NULL; 350 351 return src_buf; 352 } 353 354 void vpu_skip_frame(struct vpu_inst *inst, int count) 355 { 356 struct vb2_v4l2_buffer *src_buf; 357 enum vb2_buffer_state state; 358 int i = 0; 359 360 if (count <= 0 || !inst->fh.m2m_ctx) 361 return; 362 363 while (i < count) { 364 src_buf = v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx); 365 if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE) 366 return; 367 if (vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_DECODED) 368 state = VB2_BUF_STATE_DONE; 369 else 370 state = VB2_BUF_STATE_ERROR; 371 i++; 372 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE); 373 v4l2_m2m_buf_done(src_buf, state); 374 } 375 } 376 377 struct vb2_v4l2_buffer *vpu_find_buf_by_sequence(struct vpu_inst *inst, u32 type, u32 sequence) 378 { 379 struct v4l2_m2m_buffer *buf = NULL; 380 struct vb2_v4l2_buffer *vbuf = NULL; 381 382 if (!inst || !inst->fh.m2m_ctx) 383 return NULL; 384 385 if (V4L2_TYPE_IS_OUTPUT(type)) { 386 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) { 387 vbuf = &buf->vb; 388 if (vbuf->sequence == sequence) 389 break; 390 vbuf = NULL; 391 } 392 } else { 393 v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) { 394 vbuf = &buf->vb; 395 if (vbuf->sequence == sequence) 396 break; 397 vbuf = NULL; 398 } 399 } 400 401 return vbuf; 402 } 403 404 struct vb2_v4l2_buffer *vpu_find_buf_by_idx(struct vpu_inst *inst, u32 type, u32 idx) 405 { 406 struct v4l2_m2m_buffer *buf = NULL; 407 struct vb2_v4l2_buffer *vbuf = NULL; 408 409 if (!inst || !inst->fh.m2m_ctx) 410 return NULL; 411 412 if (V4L2_TYPE_IS_OUTPUT(type)) { 413 v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) { 414 vbuf = &buf->vb; 415 if (vbuf->vb2_buf.index == idx) 416 break; 417 vbuf = NULL; 418 } 419 } else { 420 v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) { 421 vbuf = &buf->vb; 422 if (vbuf->vb2_buf.index == idx) 423 break; 424 vbuf = NULL; 425 } 426 } 427 428 return vbuf; 429 } 430 431 int vpu_get_num_buffers(struct vpu_inst *inst, u32 type) 432 { 433 struct vb2_queue *q; 434 435 if (!inst || !inst->fh.m2m_ctx) 436 return -EINVAL; 437 438 if (V4L2_TYPE_IS_OUTPUT(type)) 439 q = v4l2_m2m_get_src_vq(inst->fh.m2m_ctx); 440 else 441 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx); 442 443 return vb2_get_num_buffers(q); 444 } 445 446 static void vpu_m2m_device_run(void *priv) 447 { 448 } 449 450 static int vpu_m2m_job_ready(void *priv) 451 { 452 return 0; 453 } 454 455 static const struct v4l2_m2m_ops vpu_m2m_ops = { 456 .device_run = vpu_m2m_device_run, 457 .job_ready = vpu_m2m_job_ready, 458 }; 459 460 static int vpu_vb2_queue_setup(struct vb2_queue *vq, 461 unsigned int *buf_count, 462 unsigned int *plane_count, 463 unsigned int psize[], 464 struct device *allocators[]) 465 { 466 struct vpu_inst *inst = vb2_get_drv_priv(vq); 467 struct vpu_format *cur_fmt; 468 int i; 469 470 cur_fmt = vpu_get_format(inst, vq->type); 471 472 if (*plane_count) { 473 if (*plane_count != cur_fmt->mem_planes) 474 return -EINVAL; 475 for (i = 0; i < cur_fmt->mem_planes; i++) { 476 if (psize[i] < vpu_get_fmt_plane_size(cur_fmt, i)) 477 return -EINVAL; 478 } 479 return 0; 480 } 481 482 if (V4L2_TYPE_IS_OUTPUT(vq->type)) 483 *buf_count = max_t(unsigned int, *buf_count, inst->min_buffer_out); 484 else 485 *buf_count = max_t(unsigned int, *buf_count, inst->min_buffer_cap); 486 *plane_count = cur_fmt->mem_planes; 487 for (i = 0; i < cur_fmt->mem_planes; i++) 488 psize[i] = vpu_get_fmt_plane_size(cur_fmt, i); 489 490 if (V4L2_TYPE_IS_OUTPUT(vq->type) && inst->state == VPU_CODEC_STATE_SEEK) { 491 vpu_trace(inst->dev, "reinit when VIDIOC_REQBUFS(OUTPUT, 0)\n"); 492 call_void_vop(inst, release); 493 } 494 495 if (V4L2_TYPE_IS_CAPTURE(vq->type)) 496 call_void_vop(inst, reset_frame_store); 497 498 return 0; 499 } 500 501 static int vpu_vb2_buf_init(struct vb2_buffer *vb) 502 { 503 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 504 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf); 505 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue); 506 507 vpu_buf->fs_id = -1; 508 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE); 509 510 if (!inst->ops->attach_frame_store || V4L2_TYPE_IS_OUTPUT(vb->type)) 511 return 0; 512 513 call_void_vop(inst, attach_frame_store, vb); 514 return 0; 515 } 516 517 static int vpu_vb2_buf_out_validate(struct vb2_buffer *vb) 518 { 519 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 520 521 vbuf->field = V4L2_FIELD_NONE; 522 523 return 0; 524 } 525 526 static int vpu_vb2_buf_prepare(struct vb2_buffer *vb) 527 { 528 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue); 529 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 530 struct vpu_format *cur_fmt; 531 u32 i; 532 533 cur_fmt = vpu_get_format(inst, vb->type); 534 for (i = 0; i < cur_fmt->mem_planes; i++) { 535 if (vpu_get_vb_length(vb, i) < vpu_get_fmt_plane_size(cur_fmt, i)) { 536 dev_dbg(inst->dev, "[%d] %s buf[%d] is invalid\n", 537 inst->id, vpu_type_name(vb->type), vb->index); 538 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_ERROR); 539 } 540 } 541 542 return 0; 543 } 544 545 static void vpu_vb2_buf_finish(struct vb2_buffer *vb) 546 { 547 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 548 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue); 549 struct vb2_queue *q = vb->vb2_queue; 550 551 if (V4L2_TYPE_IS_CAPTURE(vb->type)) { 552 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf); 553 struct v4l2_ctrl *ctrl = v4l2_ctrl_find(&inst->ctrl_handler, 554 V4L2_CID_MPEG_VIDEO_AVERAGE_QP); 555 556 if (ctrl) 557 v4l2_ctrl_s_ctrl(ctrl, vpu_buf->average_qp); 558 } 559 560 if (vbuf->flags & V4L2_BUF_FLAG_LAST) 561 vpu_notify_eos(inst); 562 563 if (list_empty(&q->done_list)) 564 call_void_vop(inst, on_queue_empty, q->type); 565 } 566 567 static void vpu_vb2_buffers_return(struct vpu_inst *inst, unsigned int type, 568 enum vb2_buffer_state state) 569 { 570 struct vb2_v4l2_buffer *buf; 571 572 if (V4L2_TYPE_IS_OUTPUT(type)) { 573 while ((buf = v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx))) { 574 vpu_set_buffer_state(buf, VPU_BUF_STATE_IDLE); 575 v4l2_m2m_buf_done(buf, state); 576 } 577 } else { 578 while ((buf = v4l2_m2m_dst_buf_remove(inst->fh.m2m_ctx))) { 579 vpu_set_buffer_state(buf, VPU_BUF_STATE_IDLE); 580 v4l2_m2m_buf_done(buf, state); 581 } 582 } 583 } 584 585 static int vpu_vb2_start_streaming(struct vb2_queue *q, unsigned int count) 586 { 587 struct vpu_inst *inst = vb2_get_drv_priv(q); 588 struct vpu_format *fmt = vpu_get_format(inst, q->type); 589 int ret; 590 591 vpu_inst_unlock(inst); 592 ret = vpu_inst_register(inst); 593 vpu_inst_lock(inst); 594 if (ret) { 595 vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_QUEUED); 596 return ret; 597 } 598 599 vpu_trace(inst->dev, "[%d] %s %c%c%c%c %dx%d %u(%u) %u(%u) %u(%u) %d\n", 600 inst->id, vpu_type_name(q->type), 601 fmt->pixfmt, 602 fmt->pixfmt >> 8, 603 fmt->pixfmt >> 16, 604 fmt->pixfmt >> 24, 605 fmt->width, fmt->height, 606 fmt->sizeimage[0], fmt->bytesperline[0], 607 fmt->sizeimage[1], fmt->bytesperline[1], 608 fmt->sizeimage[2], fmt->bytesperline[2], 609 vb2_get_num_buffers(q)); 610 vb2_clear_last_buffer_dequeued(q); 611 ret = call_vop(inst, start, q->type); 612 if (ret) 613 vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_QUEUED); 614 615 return ret; 616 } 617 618 static void vpu_vb2_stop_streaming(struct vb2_queue *q) 619 { 620 struct vpu_inst *inst = vb2_get_drv_priv(q); 621 622 vpu_trace(inst->dev, "[%d] %s\n", inst->id, vpu_type_name(q->type)); 623 624 call_void_vop(inst, stop, q->type); 625 vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_ERROR); 626 if (V4L2_TYPE_IS_OUTPUT(q->type)) 627 inst->sequence = 0; 628 } 629 630 static void vpu_vb2_buf_queue(struct vb2_buffer *vb) 631 { 632 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 633 struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue); 634 635 if (V4L2_TYPE_IS_OUTPUT(vb->type)) 636 vbuf->sequence = inst->sequence++; 637 638 v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf); 639 vpu_process_output_buffer(inst); 640 vpu_process_capture_buffer(inst); 641 } 642 643 static const struct vb2_ops vpu_vb2_ops = { 644 .queue_setup = vpu_vb2_queue_setup, 645 .buf_init = vpu_vb2_buf_init, 646 .buf_out_validate = vpu_vb2_buf_out_validate, 647 .buf_prepare = vpu_vb2_buf_prepare, 648 .buf_finish = vpu_vb2_buf_finish, 649 .start_streaming = vpu_vb2_start_streaming, 650 .stop_streaming = vpu_vb2_stop_streaming, 651 .buf_queue = vpu_vb2_buf_queue, 652 }; 653 654 static int vpu_m2m_queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) 655 { 656 struct vpu_inst *inst = priv; 657 int ret; 658 659 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; 660 inst->out_format.type = src_vq->type; 661 src_vq->io_modes = VB2_MMAP | VB2_DMABUF; 662 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; 663 src_vq->ops = &vpu_vb2_ops; 664 src_vq->mem_ops = &vb2_dma_contig_memops; 665 if (inst->type == VPU_CORE_TYPE_DEC && inst->use_stream_buffer) 666 src_vq->mem_ops = &vb2_vmalloc_memops; 667 src_vq->drv_priv = inst; 668 src_vq->buf_struct_size = sizeof(struct vpu_vb2_buffer); 669 src_vq->dev = inst->vpu->dev; 670 src_vq->lock = &inst->lock; 671 ret = vb2_queue_init(src_vq); 672 if (ret) 673 return ret; 674 675 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; 676 inst->cap_format.type = dst_vq->type; 677 dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; 678 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; 679 dst_vq->ops = &vpu_vb2_ops; 680 dst_vq->mem_ops = &vb2_dma_contig_memops; 681 if (inst->type == VPU_CORE_TYPE_ENC && inst->use_stream_buffer) 682 dst_vq->mem_ops = &vb2_vmalloc_memops; 683 dst_vq->drv_priv = inst; 684 dst_vq->buf_struct_size = sizeof(struct vpu_vb2_buffer); 685 dst_vq->dev = inst->vpu->dev; 686 dst_vq->lock = &inst->lock; 687 ret = vb2_queue_init(dst_vq); 688 if (ret) { 689 vb2_queue_release(src_vq); 690 return ret; 691 } 692 693 return 0; 694 } 695 696 static int vpu_v4l2_release(struct vpu_inst *inst) 697 { 698 vpu_trace(inst->vpu->dev, "%p\n", inst); 699 700 if (inst->workqueue) { 701 cancel_work_sync(&inst->msg_work); 702 destroy_workqueue(inst->workqueue); 703 inst->workqueue = NULL; 704 } 705 706 vpu_release_core(inst->core); 707 put_device(inst->dev); 708 709 v4l2_ctrl_handler_free(&inst->ctrl_handler); 710 mutex_destroy(&inst->lock); 711 712 call_void_vop(inst, cleanup); 713 714 return 0; 715 } 716 717 int vpu_v4l2_open(struct file *file, struct vpu_inst *inst) 718 { 719 struct vpu_dev *vpu = video_drvdata(file); 720 struct vpu_func *func; 721 int ret = 0; 722 723 if (!inst || !inst->ops) 724 return -EINVAL; 725 726 if (inst->type == VPU_CORE_TYPE_ENC) 727 func = &vpu->encoder; 728 else 729 func = &vpu->decoder; 730 731 atomic_set(&inst->ref_count, 0); 732 atomic_long_set(&inst->last_response_cmd, 0); 733 vpu_inst_get(inst); 734 inst->vpu = vpu; 735 inst->core = vpu_request_core(vpu, inst->type); 736 if (inst->core) 737 inst->dev = get_device(inst->core->dev); 738 mutex_init(&inst->lock); 739 INIT_LIST_HEAD(&inst->cmd_q); 740 inst->id = VPU_INST_NULL_ID; 741 inst->release = vpu_v4l2_release; 742 inst->pid = current->pid; 743 inst->tgid = current->tgid; 744 inst->min_buffer_cap = 2; 745 inst->min_buffer_out = 2; 746 v4l2_fh_init(&inst->fh, func->vfd); 747 v4l2_fh_add(&inst->fh, file); 748 749 ret = call_vop(inst, ctrl_init); 750 if (ret) 751 goto error; 752 753 inst->fh.m2m_ctx = v4l2_m2m_ctx_init(func->m2m_dev, inst, vpu_m2m_queue_init); 754 if (IS_ERR(inst->fh.m2m_ctx)) { 755 dev_err(vpu->dev, "v4l2_m2m_ctx_init fail\n"); 756 ret = PTR_ERR(inst->fh.m2m_ctx); 757 goto error; 758 } 759 760 inst->fh.ctrl_handler = &inst->ctrl_handler; 761 inst->state = VPU_CODEC_STATE_DEINIT; 762 inst->workqueue = alloc_ordered_workqueue("vpu_inst", WQ_MEM_RECLAIM); 763 if (inst->workqueue) { 764 INIT_WORK(&inst->msg_work, vpu_inst_run_work); 765 ret = kfifo_init(&inst->msg_fifo, 766 inst->msg_buffer, 767 rounddown_pow_of_two(sizeof(inst->msg_buffer))); 768 if (ret) { 769 destroy_workqueue(inst->workqueue); 770 inst->workqueue = NULL; 771 } 772 } 773 vpu_trace(vpu->dev, "tgid = %d, pid = %d, type = %s, inst = %p\n", 774 inst->tgid, inst->pid, vpu_core_type_desc(inst->type), inst); 775 776 return 0; 777 error: 778 v4l2_fh_del(&inst->fh, file); 779 v4l2_fh_exit(&inst->fh); 780 vpu_inst_put(inst); 781 return ret; 782 } 783 784 int vpu_v4l2_close(struct file *file) 785 { 786 struct vpu_dev *vpu = video_drvdata(file); 787 struct vpu_inst *inst = to_inst(file); 788 789 vpu_trace(vpu->dev, "tgid = %d, pid = %d, inst = %p\n", inst->tgid, inst->pid, inst); 790 791 vpu_inst_lock(inst); 792 if (inst->fh.m2m_ctx) { 793 v4l2_m2m_ctx_release(inst->fh.m2m_ctx); 794 inst->fh.m2m_ctx = NULL; 795 } 796 call_void_vop(inst, release); 797 vpu_inst_unlock(inst); 798 799 v4l2_fh_del(&inst->fh, file); 800 v4l2_fh_exit(&inst->fh); 801 802 vpu_inst_unregister(inst); 803 vpu_inst_put(inst); 804 805 return 0; 806 } 807 808 int vpu_add_func(struct vpu_dev *vpu, struct vpu_func *func) 809 { 810 struct video_device *vfd; 811 int ret; 812 813 if (!vpu || !func) 814 return -EINVAL; 815 816 if (func->vfd) 817 return 0; 818 819 func->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops); 820 if (IS_ERR(func->m2m_dev)) { 821 dev_err(vpu->dev, "v4l2_m2m_init fail\n"); 822 func->vfd = NULL; 823 return PTR_ERR(func->m2m_dev); 824 } 825 826 vfd = video_device_alloc(); 827 if (!vfd) { 828 v4l2_m2m_release(func->m2m_dev); 829 dev_err(vpu->dev, "alloc vpu decoder video device fail\n"); 830 return -ENOMEM; 831 } 832 vfd->release = video_device_release; 833 vfd->vfl_dir = VFL_DIR_M2M; 834 vfd->v4l2_dev = &vpu->v4l2_dev; 835 vfd->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING; 836 if (func->type == VPU_CORE_TYPE_ENC) { 837 strscpy(vfd->name, "amphion-vpu-encoder", sizeof(vfd->name)); 838 vfd->fops = venc_get_fops(); 839 vfd->ioctl_ops = venc_get_ioctl_ops(); 840 } else { 841 strscpy(vfd->name, "amphion-vpu-decoder", sizeof(vfd->name)); 842 vfd->fops = vdec_get_fops(); 843 vfd->ioctl_ops = vdec_get_ioctl_ops(); 844 } 845 video_set_drvdata(vfd, vpu); 846 847 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1); 848 if (ret) { 849 video_device_release(vfd); 850 v4l2_m2m_release(func->m2m_dev); 851 return ret; 852 } 853 func->vfd = vfd; 854 855 ret = v4l2_m2m_register_media_controller(func->m2m_dev, func->vfd, func->function); 856 if (ret) { 857 v4l2_m2m_release(func->m2m_dev); 858 func->m2m_dev = NULL; 859 video_unregister_device(func->vfd); 860 func->vfd = NULL; 861 return ret; 862 } 863 864 return 0; 865 } 866 867 void vpu_remove_func(struct vpu_func *func) 868 { 869 if (!func) 870 return; 871 872 if (func->m2m_dev) { 873 v4l2_m2m_unregister_media_controller(func->m2m_dev); 874 v4l2_m2m_release(func->m2m_dev); 875 func->m2m_dev = NULL; 876 } 877 if (func->vfd) { 878 video_unregister_device(func->vfd); 879 func->vfd = NULL; 880 } 881 } 882