1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2020-2021 NXP 4 */ 5 6 #include <linux/init.h> 7 #include <linux/interconnect.h> 8 #include <linux/ioctl.h> 9 #include <linux/list.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/vmalloc.h> 13 #include <linux/videodev2.h> 14 #include <media/v4l2-device.h> 15 #include <media/v4l2-event.h> 16 #include <media/v4l2-mem2mem.h> 17 #include <media/v4l2-ioctl.h> 18 #include <media/videobuf2-v4l2.h> 19 #include <media/videobuf2-dma-contig.h> 20 #include <media/videobuf2-vmalloc.h> 21 #include "vpu.h" 22 #include "vpu_defs.h" 23 #include "vpu_core.h" 24 #include "vpu_helpers.h" 25 #include "vpu_v4l2.h" 26 #include "vpu_cmds.h" 27 #include "vpu_rpc.h" 28 29 #define VDEC_MIN_BUFFER_CAP 8 30 #define VDEC_MIN_BUFFER_OUT 8 31 32 struct vdec_fs_info { 33 char name[8]; 34 u32 type; 35 u32 max_count; 36 u32 req_count; 37 u32 count; 38 u32 index; 39 u32 size; 40 struct vpu_buffer buffer[32]; 41 u32 tag; 42 }; 43 44 struct vdec_t { 45 u32 seq_hdr_found; 46 struct vpu_buffer udata; 47 struct vpu_decode_params params; 48 struct vpu_dec_codec_info codec_info; 49 enum vpu_codec_state state; 50 51 struct vpu_vb2_buffer *slots[VB2_MAX_FRAME]; 52 u32 req_frame_count; 53 struct vdec_fs_info mbi; 54 struct vdec_fs_info dcp; 55 u32 seq_tag; 56 57 bool reset_codec; 58 bool fixed_fmt; 59 u32 decoded_frame_count; 60 u32 display_frame_count; 61 u32 sequence; 62 u32 eos_received; 63 bool is_source_changed; 64 u32 source_change; 65 u32 drain; 66 bool aborting; 67 }; 68 69 static const struct vpu_format vdec_formats[] = { 70 { 71 .pixfmt = V4L2_PIX_FMT_NV12M_8L128, 72 .mem_planes = 2, 73 .comp_planes = 2, 74 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 75 .sibling = V4L2_PIX_FMT_NV12_8L128, 76 }, 77 { 78 .pixfmt = V4L2_PIX_FMT_NV12_8L128, 79 .mem_planes = 1, 80 .comp_planes = 2, 81 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 82 .sibling = V4L2_PIX_FMT_NV12M_8L128, 83 }, 84 { 85 .pixfmt = V4L2_PIX_FMT_NV12M_10BE_8L128, 86 .mem_planes = 2, 87 .comp_planes = 2, 88 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 89 .sibling = V4L2_PIX_FMT_NV12_10BE_8L128, 90 }, 91 { 92 .pixfmt = V4L2_PIX_FMT_NV12_10BE_8L128, 93 .mem_planes = 1, 94 .comp_planes = 2, 95 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 96 .sibling = V4L2_PIX_FMT_NV12M_10BE_8L128 97 }, 98 { 99 .pixfmt = V4L2_PIX_FMT_H264, 100 .mem_planes = 1, 101 .comp_planes = 1, 102 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 103 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 104 }, 105 { 106 .pixfmt = V4L2_PIX_FMT_H264_MVC, 107 .mem_planes = 1, 108 .comp_planes = 1, 109 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 110 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 111 }, 112 { 113 .pixfmt = V4L2_PIX_FMT_HEVC, 114 .mem_planes = 1, 115 .comp_planes = 1, 116 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 117 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 118 }, 119 { 120 .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_G, 121 .mem_planes = 1, 122 .comp_planes = 1, 123 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 124 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 125 }, 126 { 127 .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_L, 128 .mem_planes = 1, 129 .comp_planes = 1, 130 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 131 .flags = V4L2_FMT_FLAG_COMPRESSED 132 }, 133 { 134 .pixfmt = V4L2_PIX_FMT_MPEG2, 135 .mem_planes = 1, 136 .comp_planes = 1, 137 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 138 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 139 }, 140 { 141 .pixfmt = V4L2_PIX_FMT_MPEG4, 142 .mem_planes = 1, 143 .comp_planes = 1, 144 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 145 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 146 }, 147 { 148 .pixfmt = V4L2_PIX_FMT_XVID, 149 .mem_planes = 1, 150 .comp_planes = 1, 151 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 152 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 153 }, 154 { 155 .pixfmt = V4L2_PIX_FMT_VP8, 156 .mem_planes = 1, 157 .comp_planes = 1, 158 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 159 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 160 }, 161 { 162 .pixfmt = V4L2_PIX_FMT_H263, 163 .mem_planes = 1, 164 .comp_planes = 1, 165 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 166 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 167 }, 168 { 169 .pixfmt = V4L2_PIX_FMT_SPK, 170 .mem_planes = 1, 171 .comp_planes = 1, 172 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 173 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 174 }, 175 { 176 .pixfmt = V4L2_PIX_FMT_RV30, 177 .mem_planes = 1, 178 .comp_planes = 1, 179 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 180 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 181 }, 182 { 183 .pixfmt = V4L2_PIX_FMT_RV40, 184 .mem_planes = 1, 185 .comp_planes = 1, 186 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 187 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 188 }, 189 {0, 0, 0, 0}, 190 }; 191 192 static int vdec_op_s_ctrl(struct v4l2_ctrl *ctrl) 193 { 194 struct vpu_inst *inst = ctrl_to_inst(ctrl); 195 struct vdec_t *vdec = inst->priv; 196 int ret = 0; 197 198 switch (ctrl->id) { 199 case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE: 200 vdec->params.display_delay_enable = ctrl->val; 201 break; 202 case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY: 203 vdec->params.display_delay = ctrl->val; 204 break; 205 default: 206 ret = -EINVAL; 207 break; 208 } 209 210 return ret; 211 } 212 213 static const struct v4l2_ctrl_ops vdec_ctrl_ops = { 214 .s_ctrl = vdec_op_s_ctrl, 215 .g_volatile_ctrl = vpu_helper_g_volatile_ctrl, 216 }; 217 218 static int vdec_ctrl_init(struct vpu_inst *inst) 219 { 220 struct v4l2_ctrl *ctrl; 221 int ret; 222 223 ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 20); 224 if (ret) 225 return ret; 226 227 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 228 V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, 229 0, 0, 1, 0); 230 231 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 232 V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, 233 0, 1, 1, 0); 234 235 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 236 V4L2_CID_MPEG_VIDEO_H264_PROFILE, 237 V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH, 238 ~((1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | 239 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | 240 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | 241 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED) | 242 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)), 243 V4L2_MPEG_VIDEO_H264_PROFILE_MAIN); 244 245 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 246 V4L2_CID_MPEG_VIDEO_H264_LEVEL, 247 V4L2_MPEG_VIDEO_H264_LEVEL_6_2, 248 0, 249 V4L2_MPEG_VIDEO_H264_LEVEL_4_0); 250 251 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 252 V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, 253 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, 254 ~((1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | 255 (1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10)), 256 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN); 257 258 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 259 V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, 260 V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, 261 0, 262 V4L2_MPEG_VIDEO_HEVC_LEVEL_4); 263 264 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 265 V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 32, 1, 2); 266 if (ctrl) 267 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; 268 269 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 270 V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 1, 32, 1, 2); 271 if (ctrl) 272 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; 273 274 if (inst->ctrl_handler.error) { 275 ret = inst->ctrl_handler.error; 276 v4l2_ctrl_handler_free(&inst->ctrl_handler); 277 return ret; 278 } 279 280 ret = v4l2_ctrl_handler_setup(&inst->ctrl_handler); 281 if (ret) { 282 dev_err(inst->dev, "[%d] setup ctrls fail, ret = %d\n", inst->id, ret); 283 v4l2_ctrl_handler_free(&inst->ctrl_handler); 284 return ret; 285 } 286 287 return 0; 288 } 289 290 static void vdec_handle_resolution_change(struct vpu_inst *inst) 291 { 292 struct vdec_t *vdec = inst->priv; 293 struct vb2_queue *q; 294 295 if (!inst->fh.m2m_ctx) 296 return; 297 298 if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 299 return; 300 if (!vdec->source_change) 301 return; 302 303 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx); 304 if (!list_empty(&q->done_list)) 305 return; 306 307 vdec->source_change--; 308 vpu_notify_source_change(inst); 309 vpu_set_last_buffer_dequeued(inst, false); 310 } 311 312 static int vdec_update_state(struct vpu_inst *inst, enum vpu_codec_state state, u32 force) 313 { 314 struct vdec_t *vdec = inst->priv; 315 enum vpu_codec_state pre_state = inst->state; 316 317 if (state == VPU_CODEC_STATE_SEEK) { 318 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 319 vdec->state = inst->state; 320 else 321 vdec->state = VPU_CODEC_STATE_ACTIVE; 322 } 323 if (inst->state != VPU_CODEC_STATE_SEEK || force) 324 inst->state = state; 325 else if (state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 326 vdec->state = VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE; 327 328 if (inst->state != pre_state) 329 vpu_trace(inst->dev, "[%d] %s -> %s\n", inst->id, 330 vpu_codec_state_name(pre_state), vpu_codec_state_name(inst->state)); 331 332 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 333 vdec_handle_resolution_change(inst); 334 335 return 0; 336 } 337 338 static void vdec_set_last_buffer_dequeued(struct vpu_inst *inst) 339 { 340 struct vdec_t *vdec = inst->priv; 341 342 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 343 return; 344 345 if (vdec->eos_received) { 346 if (!vpu_set_last_buffer_dequeued(inst, true)) { 347 vdec->eos_received--; 348 vdec_update_state(inst, VPU_CODEC_STATE_DRAIN, 0); 349 } 350 } 351 } 352 353 static int vdec_querycap(struct file *file, void *fh, struct v4l2_capability *cap) 354 { 355 strscpy(cap->driver, "amphion-vpu", sizeof(cap->driver)); 356 strscpy(cap->card, "amphion vpu decoder", sizeof(cap->card)); 357 strscpy(cap->bus_info, "platform: amphion-vpu", sizeof(cap->bus_info)); 358 359 return 0; 360 } 361 362 static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) 363 { 364 struct vpu_inst *inst = to_inst(file); 365 struct vdec_t *vdec = inst->priv; 366 const struct vpu_format *fmt; 367 int ret = -EINVAL; 368 369 vpu_inst_lock(inst); 370 if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) { 371 fmt = vpu_get_format(inst, f->type); 372 if (f->index == 1) 373 fmt = vpu_helper_find_sibling(inst, f->type, fmt->pixfmt); 374 if (f->index > 1) 375 fmt = NULL; 376 } else { 377 fmt = vpu_helper_enum_format(inst, f->type, f->index); 378 } 379 if (!fmt) 380 goto exit; 381 382 memset(f->reserved, 0, sizeof(f->reserved)); 383 f->pixelformat = fmt->pixfmt; 384 f->flags = fmt->flags; 385 ret = 0; 386 exit: 387 vpu_inst_unlock(inst); 388 return ret; 389 } 390 391 static int vdec_g_fmt(struct file *file, void *fh, struct v4l2_format *f) 392 { 393 struct vpu_inst *inst = to_inst(file); 394 struct vdec_t *vdec = inst->priv; 395 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 396 struct vpu_format *cur_fmt; 397 int i; 398 399 vpu_inst_lock(inst); 400 cur_fmt = vpu_get_format(inst, f->type); 401 402 pixmp->pixelformat = cur_fmt->pixfmt; 403 pixmp->num_planes = cur_fmt->mem_planes; 404 pixmp->width = cur_fmt->width; 405 pixmp->height = cur_fmt->height; 406 pixmp->field = cur_fmt->field; 407 pixmp->flags = cur_fmt->flags; 408 for (i = 0; i < pixmp->num_planes; i++) { 409 pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i]; 410 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i); 411 } 412 413 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries; 414 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars; 415 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs; 416 f->fmt.pix_mp.quantization = vdec->codec_info.full_range; 417 vpu_inst_unlock(inst); 418 419 return 0; 420 } 421 422 static int vdec_try_fmt(struct file *file, void *fh, struct v4l2_format *f) 423 { 424 struct vpu_inst *inst = to_inst(file); 425 struct vdec_t *vdec = inst->priv; 426 struct vpu_format fmt; 427 428 vpu_inst_lock(inst); 429 if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) { 430 struct vpu_format *cap_fmt = vpu_get_format(inst, f->type); 431 432 if (!vpu_helper_match_format(inst, cap_fmt->type, cap_fmt->pixfmt, 433 f->fmt.pix_mp.pixelformat)) 434 f->fmt.pix_mp.pixelformat = cap_fmt->pixfmt; 435 } 436 437 vpu_try_fmt_common(inst, f, &fmt); 438 439 if (vdec->fixed_fmt) { 440 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries; 441 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars; 442 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs; 443 f->fmt.pix_mp.quantization = vdec->codec_info.full_range; 444 } else { 445 f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; 446 f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; 447 f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; 448 f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; 449 } 450 vpu_inst_unlock(inst); 451 452 return 0; 453 } 454 455 static int vdec_s_fmt_common(struct vpu_inst *inst, struct v4l2_format *f) 456 { 457 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 458 struct vpu_format fmt; 459 struct vpu_format *cur_fmt; 460 struct vb2_queue *q; 461 struct vdec_t *vdec = inst->priv; 462 int i; 463 464 if (!inst->fh.m2m_ctx) 465 return -EINVAL; 466 467 q = v4l2_m2m_get_vq(inst->fh.m2m_ctx, f->type); 468 if (!q) 469 return -EINVAL; 470 if (vb2_is_busy(q)) 471 return -EBUSY; 472 473 if (vpu_try_fmt_common(inst, f, &fmt)) 474 return -EINVAL; 475 476 cur_fmt = vpu_get_format(inst, f->type); 477 if (V4L2_TYPE_IS_OUTPUT(f->type) && inst->state != VPU_CODEC_STATE_DEINIT) { 478 if (cur_fmt->pixfmt != fmt.pixfmt) { 479 vdec->reset_codec = true; 480 vdec->fixed_fmt = false; 481 } 482 } 483 if (V4L2_TYPE_IS_OUTPUT(f->type) || !vdec->fixed_fmt) { 484 memcpy(cur_fmt, &fmt, sizeof(*cur_fmt)); 485 } else { 486 if (vpu_helper_match_format(inst, f->type, cur_fmt->pixfmt, pixmp->pixelformat)) { 487 cur_fmt->pixfmt = fmt.pixfmt; 488 cur_fmt->mem_planes = fmt.mem_planes; 489 } 490 pixmp->pixelformat = cur_fmt->pixfmt; 491 pixmp->num_planes = cur_fmt->mem_planes; 492 pixmp->width = cur_fmt->width; 493 pixmp->height = cur_fmt->height; 494 for (i = 0; i < pixmp->num_planes; i++) { 495 pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i]; 496 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i); 497 } 498 pixmp->field = cur_fmt->field; 499 } 500 501 if (!vdec->fixed_fmt) { 502 if (V4L2_TYPE_IS_OUTPUT(f->type)) { 503 vdec->params.codec_format = cur_fmt->pixfmt; 504 vdec->codec_info.color_primaries = f->fmt.pix_mp.colorspace; 505 vdec->codec_info.transfer_chars = f->fmt.pix_mp.xfer_func; 506 vdec->codec_info.matrix_coeffs = f->fmt.pix_mp.ycbcr_enc; 507 vdec->codec_info.full_range = f->fmt.pix_mp.quantization; 508 } else { 509 vdec->params.output_format = cur_fmt->pixfmt; 510 inst->crop.left = 0; 511 inst->crop.top = 0; 512 inst->crop.width = cur_fmt->width; 513 inst->crop.height = cur_fmt->height; 514 } 515 } 516 517 vpu_trace(inst->dev, "[%d] %c%c%c%c %dx%d\n", inst->id, 518 f->fmt.pix_mp.pixelformat, 519 f->fmt.pix_mp.pixelformat >> 8, 520 f->fmt.pix_mp.pixelformat >> 16, 521 f->fmt.pix_mp.pixelformat >> 24, 522 f->fmt.pix_mp.width, 523 f->fmt.pix_mp.height); 524 525 return 0; 526 } 527 528 static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f) 529 { 530 struct vpu_inst *inst = to_inst(file); 531 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 532 struct vdec_t *vdec = inst->priv; 533 int ret = 0; 534 535 vpu_inst_lock(inst); 536 ret = vdec_s_fmt_common(inst, f); 537 if (ret) 538 goto exit; 539 540 if (V4L2_TYPE_IS_OUTPUT(f->type) && !vdec->fixed_fmt) { 541 struct v4l2_format fc; 542 543 memset(&fc, 0, sizeof(fc)); 544 fc.type = inst->cap_format.type; 545 fc.fmt.pix_mp.pixelformat = inst->cap_format.pixfmt; 546 fc.fmt.pix_mp.width = pixmp->width; 547 fc.fmt.pix_mp.height = pixmp->height; 548 vdec_s_fmt_common(inst, &fc); 549 } 550 551 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries; 552 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars; 553 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs; 554 f->fmt.pix_mp.quantization = vdec->codec_info.full_range; 555 556 exit: 557 vpu_inst_unlock(inst); 558 return ret; 559 } 560 561 static int vdec_g_selection(struct file *file, void *fh, struct v4l2_selection *s) 562 { 563 struct vpu_inst *inst = to_inst(file); 564 565 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) 566 return -EINVAL; 567 568 switch (s->target) { 569 case V4L2_SEL_TGT_COMPOSE: 570 case V4L2_SEL_TGT_COMPOSE_DEFAULT: 571 case V4L2_SEL_TGT_COMPOSE_PADDED: 572 s->r = inst->crop; 573 break; 574 case V4L2_SEL_TGT_COMPOSE_BOUNDS: 575 s->r.left = 0; 576 s->r.top = 0; 577 s->r.width = inst->cap_format.width; 578 s->r.height = inst->cap_format.height; 579 break; 580 default: 581 return -EINVAL; 582 } 583 584 return 0; 585 } 586 587 static int vdec_drain(struct vpu_inst *inst) 588 { 589 struct vdec_t *vdec = inst->priv; 590 591 if (!inst->fh.m2m_ctx) 592 return 0; 593 594 if (!vdec->drain) 595 return 0; 596 597 if (!vpu_is_source_empty(inst)) 598 return 0; 599 600 if (!vdec->params.frame_count) { 601 vpu_set_last_buffer_dequeued(inst, true); 602 return 0; 603 } 604 605 vpu_iface_add_scode(inst, SCODE_PADDING_EOS); 606 vdec->params.end_flag = 1; 607 vpu_iface_set_decode_params(inst, &vdec->params, 1); 608 vdec->drain = 0; 609 vpu_trace(inst->dev, "[%d] frame_count = %d\n", inst->id, vdec->params.frame_count); 610 611 return 0; 612 } 613 614 static int vdec_cmd_start(struct vpu_inst *inst) 615 { 616 struct vdec_t *vdec = inst->priv; 617 618 switch (inst->state) { 619 case VPU_CODEC_STATE_STARTED: 620 case VPU_CODEC_STATE_DRAIN: 621 case VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE: 622 vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0); 623 break; 624 default: 625 break; 626 } 627 vpu_process_capture_buffer(inst); 628 if (vdec->eos_received) 629 vdec_set_last_buffer_dequeued(inst); 630 return 0; 631 } 632 633 static int vdec_cmd_stop(struct vpu_inst *inst) 634 { 635 struct vdec_t *vdec = inst->priv; 636 637 vpu_trace(inst->dev, "[%d]\n", inst->id); 638 639 if (inst->state == VPU_CODEC_STATE_DEINIT) { 640 vpu_set_last_buffer_dequeued(inst, true); 641 } else { 642 vdec->drain = 1; 643 vdec_drain(inst); 644 } 645 646 return 0; 647 } 648 649 static int vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) 650 { 651 struct vpu_inst *inst = to_inst(file); 652 int ret; 653 654 ret = v4l2_m2m_ioctl_try_decoder_cmd(file, fh, cmd); 655 if (ret) 656 return ret; 657 658 vpu_inst_lock(inst); 659 switch (cmd->cmd) { 660 case V4L2_DEC_CMD_START: 661 vdec_cmd_start(inst); 662 break; 663 case V4L2_DEC_CMD_STOP: 664 vdec_cmd_stop(inst); 665 break; 666 default: 667 break; 668 } 669 vpu_inst_unlock(inst); 670 671 return 0; 672 } 673 674 static int vdec_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub) 675 { 676 switch (sub->type) { 677 case V4L2_EVENT_EOS: 678 return v4l2_event_subscribe(fh, sub, 0, NULL); 679 case V4L2_EVENT_SOURCE_CHANGE: 680 return v4l2_src_change_event_subscribe(fh, sub); 681 case V4L2_EVENT_CTRL: 682 return v4l2_ctrl_subscribe_event(fh, sub); 683 default: 684 return -EINVAL; 685 } 686 687 return 0; 688 } 689 690 static const struct v4l2_ioctl_ops vdec_ioctl_ops = { 691 .vidioc_querycap = vdec_querycap, 692 .vidioc_enum_fmt_vid_cap = vdec_enum_fmt, 693 .vidioc_enum_fmt_vid_out = vdec_enum_fmt, 694 .vidioc_g_fmt_vid_cap_mplane = vdec_g_fmt, 695 .vidioc_g_fmt_vid_out_mplane = vdec_g_fmt, 696 .vidioc_try_fmt_vid_cap_mplane = vdec_try_fmt, 697 .vidioc_try_fmt_vid_out_mplane = vdec_try_fmt, 698 .vidioc_s_fmt_vid_cap_mplane = vdec_s_fmt, 699 .vidioc_s_fmt_vid_out_mplane = vdec_s_fmt, 700 .vidioc_g_selection = vdec_g_selection, 701 .vidioc_try_decoder_cmd = v4l2_m2m_ioctl_try_decoder_cmd, 702 .vidioc_decoder_cmd = vdec_decoder_cmd, 703 .vidioc_subscribe_event = vdec_subscribe_event, 704 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 705 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, 706 .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, 707 .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, 708 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, 709 .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, 710 .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, 711 .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, 712 .vidioc_streamon = v4l2_m2m_ioctl_streamon, 713 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, 714 }; 715 716 static bool vdec_check_ready(struct vpu_inst *inst, unsigned int type) 717 { 718 struct vdec_t *vdec = inst->priv; 719 720 if (V4L2_TYPE_IS_OUTPUT(type)) 721 return true; 722 723 if (vdec->req_frame_count) 724 return true; 725 726 return false; 727 } 728 729 static struct vb2_v4l2_buffer *vdec_get_src_buffer(struct vpu_inst *inst, u32 count) 730 { 731 if (count > 1) 732 vpu_skip_frame(inst, count - 1); 733 734 return vpu_next_src_buf(inst); 735 } 736 737 static int vdec_frame_decoded(struct vpu_inst *inst, void *arg) 738 { 739 struct vdec_t *vdec = inst->priv; 740 struct vpu_dec_pic_info *info = arg; 741 struct vpu_vb2_buffer *vpu_buf; 742 struct vb2_v4l2_buffer *vbuf; 743 struct vb2_v4l2_buffer *src_buf; 744 int ret = 0; 745 746 if (!info || info->id >= ARRAY_SIZE(vdec->slots)) 747 return -EINVAL; 748 749 vpu_inst_lock(inst); 750 vpu_buf = vdec->slots[info->id]; 751 if (!vpu_buf) { 752 dev_err(inst->dev, "[%d] decoded invalid frame[%d]\n", inst->id, info->id); 753 ret = -EINVAL; 754 goto exit; 755 } 756 vbuf = &vpu_buf->m2m_buf.vb; 757 src_buf = vdec_get_src_buffer(inst, info->consumed_count); 758 if (src_buf) { 759 v4l2_m2m_buf_copy_metadata(src_buf, vbuf, true); 760 if (info->consumed_count) { 761 v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx); 762 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE); 763 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); 764 } else { 765 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_DECODED); 766 } 767 } 768 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_DECODED) 769 dev_info(inst->dev, "[%d] buf[%d] has been decoded\n", inst->id, info->id); 770 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_DECODED); 771 vdec->decoded_frame_count++; 772 if (vdec->params.display_delay_enable) { 773 struct vpu_format *cur_fmt; 774 775 cur_fmt = vpu_get_format(inst, inst->cap_format.type); 776 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY); 777 for (int i = 0; i < vbuf->vb2_buf.num_planes; i++) 778 vb2_set_plane_payload(&vbuf->vb2_buf, 779 i, vpu_get_fmt_plane_size(cur_fmt, i)); 780 vbuf->field = cur_fmt->field; 781 vbuf->sequence = vdec->sequence++; 782 dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp); 783 784 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); 785 vdec->display_frame_count++; 786 } 787 exit: 788 vpu_inst_unlock(inst); 789 790 return ret; 791 } 792 793 static struct vpu_vb2_buffer *vdec_find_buffer(struct vpu_inst *inst, u32 luma) 794 { 795 struct vdec_t *vdec = inst->priv; 796 int i; 797 798 for (i = 0; i < ARRAY_SIZE(vdec->slots); i++) { 799 if (!vdec->slots[i]) 800 continue; 801 if (luma == vdec->slots[i]->luma) 802 return vdec->slots[i]; 803 } 804 805 return NULL; 806 } 807 808 static void vdec_buf_done(struct vpu_inst *inst, struct vpu_frame_info *frame) 809 { 810 struct vdec_t *vdec = inst->priv; 811 struct vpu_format *cur_fmt; 812 struct vpu_vb2_buffer *vpu_buf; 813 struct vb2_v4l2_buffer *vbuf; 814 int i; 815 816 if (!frame) 817 return; 818 819 vpu_inst_lock(inst); 820 if (!vdec->params.display_delay_enable) 821 vdec->sequence++; 822 vpu_buf = vdec_find_buffer(inst, frame->luma); 823 vpu_inst_unlock(inst); 824 if (!vpu_buf) { 825 dev_err(inst->dev, "[%d] can't find buffer, id = %d, addr = 0x%x\n", 826 inst->id, frame->id, frame->luma); 827 return; 828 } 829 if (frame->skipped) { 830 dev_dbg(inst->dev, "[%d] frame skip\n", inst->id); 831 return; 832 } 833 834 cur_fmt = vpu_get_format(inst, inst->cap_format.type); 835 vbuf = &vpu_buf->m2m_buf.vb; 836 if (vbuf->vb2_buf.index != frame->id) 837 dev_err(inst->dev, "[%d] buffer id(%d, %d) mismatch\n", 838 inst->id, vbuf->vb2_buf.index, frame->id); 839 840 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_READY && vdec->params.display_delay_enable) 841 return; 842 843 if (vpu_get_buffer_state(vbuf) != VPU_BUF_STATE_DECODED) 844 dev_err(inst->dev, "[%d] buffer(%d) ready without decoded\n", inst->id, frame->id); 845 846 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY); 847 for (i = 0; i < vbuf->vb2_buf.num_planes; i++) 848 vb2_set_plane_payload(&vbuf->vb2_buf, i, vpu_get_fmt_plane_size(cur_fmt, i)); 849 vbuf->field = cur_fmt->field; 850 vbuf->sequence = vdec->sequence; 851 dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp); 852 853 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); 854 vpu_inst_lock(inst); 855 vdec->display_frame_count++; 856 vpu_inst_unlock(inst); 857 dev_dbg(inst->dev, "[%d] decoded : %d, display : %d, sequence : %d\n", 858 inst->id, vdec->decoded_frame_count, vdec->display_frame_count, vdec->sequence); 859 } 860 861 static void vdec_stop_done(struct vpu_inst *inst) 862 { 863 struct vdec_t *vdec = inst->priv; 864 865 vpu_inst_lock(inst); 866 vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 0); 867 vdec->seq_hdr_found = 0; 868 vdec->req_frame_count = 0; 869 vdec->reset_codec = false; 870 vdec->fixed_fmt = false; 871 vdec->params.end_flag = 0; 872 vdec->drain = 0; 873 vdec->params.frame_count = 0; 874 vdec->decoded_frame_count = 0; 875 vdec->display_frame_count = 0; 876 vdec->sequence = 0; 877 vdec->eos_received = 0; 878 vdec->is_source_changed = false; 879 vdec->source_change = 0; 880 inst->total_input_count = 0; 881 vpu_inst_unlock(inst); 882 } 883 884 static bool vdec_check_source_change(struct vpu_inst *inst) 885 { 886 struct vdec_t *vdec = inst->priv; 887 const struct vpu_format *sibling; 888 889 if (!inst->fh.m2m_ctx) 890 return false; 891 892 if (vdec->reset_codec) 893 return false; 894 895 sibling = vpu_helper_find_sibling(inst, inst->cap_format.type, inst->cap_format.pixfmt); 896 if (sibling && vdec->codec_info.pixfmt == sibling->pixfmt) 897 vdec->codec_info.pixfmt = inst->cap_format.pixfmt; 898 899 if (!vb2_is_streaming(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx))) 900 return true; 901 if (inst->cap_format.pixfmt != vdec->codec_info.pixfmt) 902 return true; 903 if (inst->cap_format.width != vdec->codec_info.decoded_width) 904 return true; 905 if (inst->cap_format.height != vdec->codec_info.decoded_height) 906 return true; 907 if (vpu_get_num_buffers(inst, inst->cap_format.type) < inst->min_buffer_cap) 908 return true; 909 if (inst->crop.left != vdec->codec_info.offset_x) 910 return true; 911 if (inst->crop.top != vdec->codec_info.offset_y) 912 return true; 913 if (inst->crop.width != vdec->codec_info.width) 914 return true; 915 if (inst->crop.height != vdec->codec_info.height) 916 return true; 917 918 return false; 919 } 920 921 static void vdec_init_fmt(struct vpu_inst *inst) 922 { 923 struct vdec_t *vdec = inst->priv; 924 struct v4l2_format f; 925 926 memset(&f, 0, sizeof(f)); 927 f.type = inst->cap_format.type; 928 f.fmt.pix_mp.pixelformat = vdec->codec_info.pixfmt; 929 f.fmt.pix_mp.width = vdec->codec_info.decoded_width; 930 f.fmt.pix_mp.height = vdec->codec_info.decoded_height; 931 if (vdec->codec_info.progressive) 932 f.fmt.pix_mp.field = V4L2_FIELD_NONE; 933 else 934 f.fmt.pix_mp.field = V4L2_FIELD_SEQ_TB; 935 vpu_try_fmt_common(inst, &f, &inst->cap_format); 936 937 inst->out_format.width = vdec->codec_info.width; 938 inst->out_format.height = vdec->codec_info.height; 939 } 940 941 static void vdec_init_crop(struct vpu_inst *inst) 942 { 943 struct vdec_t *vdec = inst->priv; 944 945 inst->crop.left = vdec->codec_info.offset_x; 946 inst->crop.top = vdec->codec_info.offset_y; 947 inst->crop.width = vdec->codec_info.width; 948 inst->crop.height = vdec->codec_info.height; 949 } 950 951 static void vdec_init_mbi(struct vpu_inst *inst) 952 { 953 struct vdec_t *vdec = inst->priv; 954 955 vdec->mbi.size = vdec->codec_info.mbi_size; 956 vdec->mbi.max_count = ARRAY_SIZE(vdec->mbi.buffer); 957 scnprintf(vdec->mbi.name, sizeof(vdec->mbi.name), "mbi"); 958 vdec->mbi.type = MEM_RES_MBI; 959 vdec->mbi.tag = vdec->seq_tag; 960 } 961 962 static void vdec_init_dcp(struct vpu_inst *inst) 963 { 964 struct vdec_t *vdec = inst->priv; 965 966 vdec->dcp.size = vdec->codec_info.dcp_size; 967 vdec->dcp.max_count = ARRAY_SIZE(vdec->dcp.buffer); 968 scnprintf(vdec->dcp.name, sizeof(vdec->dcp.name), "dcp"); 969 vdec->dcp.type = MEM_RES_DCP; 970 vdec->dcp.tag = vdec->seq_tag; 971 } 972 973 static void vdec_request_one_fs(struct vdec_fs_info *fs) 974 { 975 fs->req_count++; 976 if (fs->req_count > fs->max_count) 977 fs->req_count = fs->max_count; 978 } 979 980 static int vdec_alloc_fs_buffer(struct vpu_inst *inst, struct vdec_fs_info *fs) 981 { 982 struct vpu_buffer *buffer; 983 984 if (!fs->size) 985 return -EINVAL; 986 987 if (fs->count >= fs->req_count) 988 return -EINVAL; 989 990 buffer = &fs->buffer[fs->count]; 991 if (buffer->virt && buffer->length >= fs->size) 992 return 0; 993 994 vpu_free_dma(buffer); 995 buffer->length = fs->size; 996 return vpu_alloc_dma(inst->core, buffer); 997 } 998 999 static void vdec_alloc_fs(struct vpu_inst *inst, struct vdec_fs_info *fs) 1000 { 1001 int ret; 1002 1003 while (fs->count < fs->req_count) { 1004 ret = vdec_alloc_fs_buffer(inst, fs); 1005 if (ret) 1006 break; 1007 fs->count++; 1008 } 1009 } 1010 1011 static void vdec_clear_fs(struct vdec_fs_info *fs) 1012 { 1013 u32 i; 1014 1015 if (!fs) 1016 return; 1017 1018 for (i = 0; i < ARRAY_SIZE(fs->buffer); i++) 1019 vpu_free_dma(&fs->buffer[i]); 1020 memset(fs, 0, sizeof(*fs)); 1021 } 1022 1023 static int vdec_response_fs(struct vpu_inst *inst, struct vdec_fs_info *fs) 1024 { 1025 struct vpu_fs_info info; 1026 int ret; 1027 1028 if (fs->index >= fs->count) 1029 return 0; 1030 1031 memset(&info, 0, sizeof(info)); 1032 info.id = fs->index; 1033 info.type = fs->type; 1034 info.tag = fs->tag; 1035 info.luma_addr = fs->buffer[fs->index].phys; 1036 info.luma_size = fs->buffer[fs->index].length; 1037 ret = vpu_session_alloc_fs(inst, &info); 1038 if (ret) 1039 return ret; 1040 1041 fs->index++; 1042 return 0; 1043 } 1044 1045 static int vdec_response_frame_abnormal(struct vpu_inst *inst) 1046 { 1047 struct vdec_t *vdec = inst->priv; 1048 struct vpu_fs_info info; 1049 int ret; 1050 1051 if (!vdec->req_frame_count) 1052 return 0; 1053 1054 memset(&info, 0, sizeof(info)); 1055 info.type = MEM_RES_FRAME; 1056 info.tag = vdec->seq_tag + 0xf0; 1057 ret = vpu_session_alloc_fs(inst, &info); 1058 if (ret) 1059 return ret; 1060 vdec->req_frame_count--; 1061 1062 return 0; 1063 } 1064 1065 static int vdec_response_frame(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf) 1066 { 1067 struct vdec_t *vdec = inst->priv; 1068 struct vpu_vb2_buffer *vpu_buf; 1069 struct vpu_fs_info info; 1070 int ret; 1071 1072 if (inst->state != VPU_CODEC_STATE_ACTIVE) 1073 return -EINVAL; 1074 1075 if (vdec->aborting) 1076 return -EINVAL; 1077 1078 if (!vdec->req_frame_count) 1079 return -EINVAL; 1080 1081 if (!vbuf) 1082 return -EINVAL; 1083 1084 if (vdec->slots[vbuf->vb2_buf.index]) { 1085 dev_err(inst->dev, "[%d] repeat alloc fs %d\n", 1086 inst->id, vbuf->vb2_buf.index); 1087 return -EINVAL; 1088 } 1089 1090 dev_dbg(inst->dev, "[%d] state = %s, alloc fs %d, tag = 0x%x\n", 1091 inst->id, vpu_codec_state_name(inst->state), vbuf->vb2_buf.index, vdec->seq_tag); 1092 vpu_buf = to_vpu_vb2_buffer(vbuf); 1093 1094 memset(&info, 0, sizeof(info)); 1095 info.id = vbuf->vb2_buf.index; 1096 info.type = MEM_RES_FRAME; 1097 info.tag = vdec->seq_tag; 1098 info.luma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 0); 1099 info.luma_size = inst->cap_format.sizeimage[0]; 1100 if (vbuf->vb2_buf.num_planes > 1) 1101 info.chroma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 1); 1102 else 1103 info.chroma_addr = info.luma_addr + info.luma_size; 1104 info.chromau_size = inst->cap_format.sizeimage[1]; 1105 info.bytesperline = inst->cap_format.bytesperline[0]; 1106 ret = vpu_session_alloc_fs(inst, &info); 1107 if (ret) 1108 return ret; 1109 1110 vpu_buf->tag = info.tag; 1111 vpu_buf->luma = info.luma_addr; 1112 vpu_buf->chroma_u = info.chroma_addr; 1113 vpu_buf->chroma_v = 0; 1114 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE); 1115 vdec->slots[info.id] = vpu_buf; 1116 vdec->req_frame_count--; 1117 1118 return 0; 1119 } 1120 1121 static void vdec_response_fs_request(struct vpu_inst *inst, bool force) 1122 { 1123 struct vdec_t *vdec = inst->priv; 1124 int i; 1125 int ret; 1126 1127 if (force) { 1128 for (i = vdec->req_frame_count; i > 0; i--) 1129 vdec_response_frame_abnormal(inst); 1130 return; 1131 } 1132 1133 for (i = vdec->req_frame_count; i > 0; i--) { 1134 ret = vpu_process_capture_buffer(inst); 1135 if (ret) 1136 break; 1137 if (vdec->eos_received) 1138 break; 1139 } 1140 1141 for (i = vdec->mbi.index; i < vdec->mbi.count; i++) { 1142 if (vdec_response_fs(inst, &vdec->mbi)) 1143 break; 1144 if (vdec->eos_received) 1145 break; 1146 } 1147 for (i = vdec->dcp.index; i < vdec->dcp.count; i++) { 1148 if (vdec_response_fs(inst, &vdec->dcp)) 1149 break; 1150 if (vdec->eos_received) 1151 break; 1152 } 1153 } 1154 1155 static void vdec_response_fs_release(struct vpu_inst *inst, u32 id, u32 tag) 1156 { 1157 struct vpu_fs_info info; 1158 1159 memset(&info, 0, sizeof(info)); 1160 info.id = id; 1161 info.tag = tag; 1162 vpu_session_release_fs(inst, &info); 1163 } 1164 1165 static void vdec_recycle_buffer(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf) 1166 { 1167 if (!inst->fh.m2m_ctx) 1168 return; 1169 if (vbuf->vb2_buf.state != VB2_BUF_STATE_ACTIVE) 1170 return; 1171 if (vpu_find_buf_by_idx(inst, vbuf->vb2_buf.type, vbuf->vb2_buf.index)) 1172 return; 1173 v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf); 1174 } 1175 1176 static void vdec_clear_slots(struct vpu_inst *inst) 1177 { 1178 struct vdec_t *vdec = inst->priv; 1179 struct vpu_vb2_buffer *vpu_buf; 1180 struct vb2_v4l2_buffer *vbuf; 1181 int i; 1182 1183 for (i = 0; i < ARRAY_SIZE(vdec->slots); i++) { 1184 if (!vdec->slots[i]) 1185 continue; 1186 1187 vpu_buf = vdec->slots[i]; 1188 vbuf = &vpu_buf->m2m_buf.vb; 1189 1190 vpu_trace(inst->dev, "clear slot %d\n", i); 1191 vdec_response_fs_release(inst, i, vpu_buf->tag); 1192 vdec_recycle_buffer(inst, vbuf); 1193 vdec->slots[i]->state = VPU_BUF_STATE_IDLE; 1194 vdec->slots[i] = NULL; 1195 } 1196 } 1197 1198 static void vdec_update_v4l2_ctrl(struct vpu_inst *inst, u32 id, u32 val) 1199 { 1200 struct v4l2_ctrl *ctrl = v4l2_ctrl_find(&inst->ctrl_handler, id); 1201 1202 if (ctrl) 1203 v4l2_ctrl_s_ctrl(ctrl, val); 1204 } 1205 1206 static void vdec_update_v4l2_profile_level(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr) 1207 { 1208 switch (inst->out_format.pixfmt) { 1209 case V4L2_PIX_FMT_H264: 1210 case V4L2_PIX_FMT_H264_MVC: 1211 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_PROFILE, 1212 vpu_get_h264_v4l2_profile(hdr)); 1213 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_LEVEL, 1214 vpu_get_h264_v4l2_level(hdr)); 1215 break; 1216 case V4L2_PIX_FMT_HEVC: 1217 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, 1218 vpu_get_hevc_v4l2_profile(hdr)); 1219 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, 1220 vpu_get_hevc_v4l2_level(hdr)); 1221 break; 1222 default: 1223 return; 1224 } 1225 } 1226 1227 static void vdec_event_seq_hdr(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr) 1228 { 1229 struct vdec_t *vdec = inst->priv; 1230 1231 vpu_inst_lock(inst); 1232 memcpy(&vdec->codec_info, hdr, sizeof(vdec->codec_info)); 1233 1234 vpu_trace(inst->dev, "[%d] %d x %d, crop : (%d, %d) %d x %d, %d, %d\n", 1235 inst->id, 1236 vdec->codec_info.decoded_width, 1237 vdec->codec_info.decoded_height, 1238 vdec->codec_info.offset_x, 1239 vdec->codec_info.offset_y, 1240 vdec->codec_info.width, 1241 vdec->codec_info.height, 1242 hdr->num_ref_frms, 1243 hdr->num_dpb_frms); 1244 inst->min_buffer_cap = hdr->num_ref_frms + hdr->num_dpb_frms; 1245 vdec->is_source_changed = vdec_check_source_change(inst); 1246 vdec_init_fmt(inst); 1247 vdec_init_crop(inst); 1248 vdec_init_mbi(inst); 1249 vdec_init_dcp(inst); 1250 vdec_update_v4l2_profile_level(inst, hdr); 1251 if (!vdec->seq_hdr_found) { 1252 vdec->seq_tag = vdec->codec_info.tag; 1253 if (vdec->is_source_changed) { 1254 vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0); 1255 vdec->source_change++; 1256 vdec_handle_resolution_change(inst); 1257 vdec->is_source_changed = false; 1258 } 1259 } 1260 if (vdec->seq_tag != vdec->codec_info.tag) { 1261 vdec_response_fs_request(inst, true); 1262 vpu_trace(inst->dev, "[%d] seq tag change: %d -> %d\n", 1263 inst->id, vdec->seq_tag, vdec->codec_info.tag); 1264 } 1265 vdec->seq_hdr_found++; 1266 vdec->fixed_fmt = true; 1267 vpu_inst_unlock(inst); 1268 } 1269 1270 static void vdec_event_resolution_change(struct vpu_inst *inst) 1271 { 1272 struct vdec_t *vdec = inst->priv; 1273 1274 vpu_trace(inst->dev, "[%d]\n", inst->id); 1275 vpu_inst_lock(inst); 1276 vdec->seq_tag = vdec->codec_info.tag; 1277 vdec_clear_fs(&vdec->mbi); 1278 vdec_clear_fs(&vdec->dcp); 1279 vdec_clear_slots(inst); 1280 vdec_init_mbi(inst); 1281 vdec_init_dcp(inst); 1282 if (vdec->is_source_changed) { 1283 vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0); 1284 vdec->source_change++; 1285 vdec_handle_resolution_change(inst); 1286 vdec->is_source_changed = false; 1287 } 1288 vpu_inst_unlock(inst); 1289 } 1290 1291 static void vdec_event_req_fs(struct vpu_inst *inst, struct vpu_fs_info *fs) 1292 { 1293 struct vdec_t *vdec = inst->priv; 1294 1295 if (!fs) 1296 return; 1297 1298 vpu_inst_lock(inst); 1299 1300 switch (fs->type) { 1301 case MEM_RES_FRAME: 1302 vdec->req_frame_count++; 1303 break; 1304 case MEM_RES_MBI: 1305 vdec_request_one_fs(&vdec->mbi); 1306 break; 1307 case MEM_RES_DCP: 1308 vdec_request_one_fs(&vdec->dcp); 1309 break; 1310 default: 1311 break; 1312 } 1313 1314 vdec_alloc_fs(inst, &vdec->mbi); 1315 vdec_alloc_fs(inst, &vdec->dcp); 1316 1317 vdec_response_fs_request(inst, false); 1318 1319 vpu_inst_unlock(inst); 1320 } 1321 1322 static void vdec_evnet_rel_fs(struct vpu_inst *inst, struct vpu_fs_info *fs) 1323 { 1324 struct vdec_t *vdec = inst->priv; 1325 struct vpu_vb2_buffer *vpu_buf; 1326 struct vb2_v4l2_buffer *vbuf; 1327 1328 if (!fs || fs->id >= ARRAY_SIZE(vdec->slots)) 1329 return; 1330 if (fs->type != MEM_RES_FRAME) 1331 return; 1332 1333 if (fs->id >= vpu_get_num_buffers(inst, inst->cap_format.type)) { 1334 dev_err(inst->dev, "[%d] invalid fs(%d) to release\n", inst->id, fs->id); 1335 return; 1336 } 1337 1338 vpu_inst_lock(inst); 1339 vpu_buf = vdec->slots[fs->id]; 1340 vdec->slots[fs->id] = NULL; 1341 1342 if (!vpu_buf) { 1343 dev_dbg(inst->dev, "[%d] fs[%d] has bee released\n", inst->id, fs->id); 1344 goto exit; 1345 } 1346 1347 vbuf = &vpu_buf->m2m_buf.vb; 1348 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_DECODED) { 1349 dev_dbg(inst->dev, "[%d] frame skip\n", inst->id); 1350 vdec->sequence++; 1351 } 1352 1353 vdec_response_fs_release(inst, fs->id, vpu_buf->tag); 1354 if (vpu_get_buffer_state(vbuf) != VPU_BUF_STATE_READY) 1355 vdec_recycle_buffer(inst, vbuf); 1356 1357 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE); 1358 vpu_process_capture_buffer(inst); 1359 1360 exit: 1361 vpu_inst_unlock(inst); 1362 } 1363 1364 static void vdec_event_eos(struct vpu_inst *inst) 1365 { 1366 struct vdec_t *vdec = inst->priv; 1367 1368 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n", 1369 inst->id, 1370 vdec->params.frame_count, 1371 vdec->decoded_frame_count, 1372 vdec->display_frame_count, 1373 vdec->sequence); 1374 vpu_inst_lock(inst); 1375 vdec->eos_received++; 1376 vdec->fixed_fmt = false; 1377 inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP; 1378 vdec_set_last_buffer_dequeued(inst); 1379 vpu_inst_unlock(inst); 1380 } 1381 1382 static void vdec_event_notify(struct vpu_inst *inst, u32 event, void *data) 1383 { 1384 switch (event) { 1385 case VPU_MSG_ID_SEQ_HDR_FOUND: 1386 vdec_event_seq_hdr(inst, data); 1387 break; 1388 case VPU_MSG_ID_RES_CHANGE: 1389 vdec_event_resolution_change(inst); 1390 break; 1391 case VPU_MSG_ID_FRAME_REQ: 1392 vdec_event_req_fs(inst, data); 1393 break; 1394 case VPU_MSG_ID_FRAME_RELEASE: 1395 vdec_evnet_rel_fs(inst, data); 1396 break; 1397 case VPU_MSG_ID_PIC_EOS: 1398 vdec_event_eos(inst); 1399 break; 1400 default: 1401 break; 1402 } 1403 } 1404 1405 static int vdec_process_output(struct vpu_inst *inst, struct vb2_buffer *vb) 1406 { 1407 struct vdec_t *vdec = inst->priv; 1408 struct vb2_v4l2_buffer *vbuf; 1409 struct vpu_rpc_buffer_desc desc; 1410 u32 free_space; 1411 int ret; 1412 1413 vbuf = to_vb2_v4l2_buffer(vb); 1414 dev_dbg(inst->dev, "[%d] dec output [%d] %d : %ld\n", 1415 inst->id, vbuf->sequence, vb->index, vb2_get_plane_payload(vb, 0)); 1416 1417 if (inst->state == VPU_CODEC_STATE_DEINIT) 1418 return -EINVAL; 1419 if (vdec->reset_codec) 1420 return -EINVAL; 1421 1422 if (inst->state == VPU_CODEC_STATE_STARTED) 1423 vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0); 1424 1425 ret = vpu_iface_get_stream_buffer_desc(inst, &desc); 1426 if (ret) 1427 return ret; 1428 1429 free_space = vpu_helper_get_free_space(inst); 1430 if (free_space < vb2_get_plane_payload(vb, 0) + 0x40000) 1431 return -ENOMEM; 1432 1433 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE); 1434 ret = vpu_iface_input_frame(inst, vb); 1435 if (ret < 0) 1436 return -ENOMEM; 1437 1438 dev_dbg(inst->dev, "[%d][INPUT TS]%32lld\n", inst->id, vb->timestamp); 1439 vdec->params.frame_count++; 1440 1441 if (vdec->drain) 1442 vdec_drain(inst); 1443 1444 return 0; 1445 } 1446 1447 static int vdec_process_capture(struct vpu_inst *inst, struct vb2_buffer *vb) 1448 { 1449 struct vdec_t *vdec = inst->priv; 1450 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 1451 int ret; 1452 1453 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 1454 return -EINVAL; 1455 if (vdec->reset_codec) 1456 return -EINVAL; 1457 1458 ret = vdec_response_frame(inst, vbuf); 1459 if (ret) 1460 return ret; 1461 v4l2_m2m_dst_buf_remove_by_buf(inst->fh.m2m_ctx, vbuf); 1462 return 0; 1463 } 1464 1465 static void vdec_on_queue_empty(struct vpu_inst *inst, u32 type) 1466 { 1467 struct vdec_t *vdec = inst->priv; 1468 1469 if (V4L2_TYPE_IS_OUTPUT(type)) 1470 return; 1471 1472 vdec_handle_resolution_change(inst); 1473 if (vdec->eos_received) 1474 vdec_set_last_buffer_dequeued(inst); 1475 } 1476 1477 static void vdec_abort(struct vpu_inst *inst) 1478 { 1479 struct vdec_t *vdec = inst->priv; 1480 struct vpu_rpc_buffer_desc desc; 1481 int ret; 1482 1483 vpu_trace(inst->dev, "[%d] state = %s\n", inst->id, vpu_codec_state_name(inst->state)); 1484 1485 vdec->aborting = true; 1486 vpu_iface_add_scode(inst, SCODE_PADDING_ABORT); 1487 vdec->params.end_flag = 1; 1488 vpu_iface_set_decode_params(inst, &vdec->params, 1); 1489 1490 vpu_session_abort(inst); 1491 1492 ret = vpu_iface_get_stream_buffer_desc(inst, &desc); 1493 if (!ret) 1494 vpu_iface_update_stream_buffer(inst, desc.rptr, 1); 1495 1496 vpu_session_rst_buf(inst); 1497 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n", 1498 inst->id, 1499 vdec->params.frame_count, 1500 vdec->decoded_frame_count, 1501 vdec->display_frame_count, 1502 vdec->sequence); 1503 if (!vdec->seq_hdr_found) 1504 vdec->reset_codec = true; 1505 vdec->params.end_flag = 0; 1506 vdec->drain = 0; 1507 vdec->params.frame_count = 0; 1508 vdec->decoded_frame_count = 0; 1509 vdec->display_frame_count = 0; 1510 vdec->sequence = 0; 1511 vdec->aborting = false; 1512 inst->extra_size = 0; 1513 } 1514 1515 static void vdec_stop(struct vpu_inst *inst, bool free) 1516 { 1517 struct vdec_t *vdec = inst->priv; 1518 1519 vdec_clear_slots(inst); 1520 if (inst->state != VPU_CODEC_STATE_DEINIT) 1521 vpu_session_stop(inst); 1522 vdec_clear_fs(&vdec->mbi); 1523 vdec_clear_fs(&vdec->dcp); 1524 if (free) { 1525 vpu_free_dma(&vdec->udata); 1526 vpu_free_dma(&inst->stream_buffer); 1527 } 1528 vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 1); 1529 vdec->reset_codec = false; 1530 } 1531 1532 static void vdec_release(struct vpu_inst *inst) 1533 { 1534 if (inst->id != VPU_INST_NULL_ID) 1535 vpu_trace(inst->dev, "[%d]\n", inst->id); 1536 vdec_stop(inst, true); 1537 } 1538 1539 static void vdec_cleanup(struct vpu_inst *inst) 1540 { 1541 struct vdec_t *vdec; 1542 1543 if (!inst) 1544 return; 1545 1546 vdec = inst->priv; 1547 vfree(vdec); 1548 inst->priv = NULL; 1549 vfree(inst); 1550 } 1551 1552 static void vdec_init_params(struct vdec_t *vdec) 1553 { 1554 vdec->params.frame_count = 0; 1555 vdec->params.end_flag = 0; 1556 } 1557 1558 static int vdec_start(struct vpu_inst *inst) 1559 { 1560 struct vdec_t *vdec = inst->priv; 1561 int stream_buffer_size; 1562 int ret; 1563 1564 if (inst->state != VPU_CODEC_STATE_DEINIT) 1565 return 0; 1566 1567 vpu_trace(inst->dev, "[%d]\n", inst->id); 1568 if (!vdec->udata.virt) { 1569 vdec->udata.length = 0x1000; 1570 ret = vpu_alloc_dma(inst->core, &vdec->udata); 1571 if (ret) { 1572 dev_err(inst->dev, "[%d] alloc udata fail\n", inst->id); 1573 goto error; 1574 } 1575 } 1576 1577 if (!inst->stream_buffer.virt) { 1578 stream_buffer_size = vpu_iface_get_stream_buffer_size(inst->core); 1579 if (stream_buffer_size > 0) { 1580 inst->stream_buffer.length = stream_buffer_size; 1581 ret = vpu_alloc_dma(inst->core, &inst->stream_buffer); 1582 if (ret) { 1583 dev_err(inst->dev, "[%d] alloc stream buffer fail\n", inst->id); 1584 goto error; 1585 } 1586 inst->use_stream_buffer = true; 1587 } 1588 } 1589 1590 if (inst->use_stream_buffer) 1591 vpu_iface_config_stream_buffer(inst, &inst->stream_buffer); 1592 vpu_iface_init_instance(inst); 1593 vdec->params.udata.base = vdec->udata.phys; 1594 vdec->params.udata.size = vdec->udata.length; 1595 ret = vpu_iface_set_decode_params(inst, &vdec->params, 0); 1596 if (ret) { 1597 dev_err(inst->dev, "[%d] set decode params fail\n", inst->id); 1598 goto error; 1599 } 1600 1601 vdec_init_params(vdec); 1602 ret = vpu_session_start(inst); 1603 if (ret) { 1604 dev_err(inst->dev, "[%d] start fail\n", inst->id); 1605 goto error; 1606 } 1607 1608 vdec_update_state(inst, VPU_CODEC_STATE_STARTED, 0); 1609 1610 return 0; 1611 error: 1612 vpu_free_dma(&vdec->udata); 1613 vpu_free_dma(&inst->stream_buffer); 1614 return ret; 1615 } 1616 1617 static int vdec_start_session(struct vpu_inst *inst, u32 type) 1618 { 1619 struct vdec_t *vdec = inst->priv; 1620 int ret = 0; 1621 1622 if (V4L2_TYPE_IS_OUTPUT(type)) { 1623 if (vdec->reset_codec) 1624 vdec_stop(inst, false); 1625 if (inst->state == VPU_CODEC_STATE_DEINIT) { 1626 ret = vdec_start(inst); 1627 if (ret) 1628 return ret; 1629 } 1630 } 1631 1632 if (V4L2_TYPE_IS_OUTPUT(type)) { 1633 vdec_update_state(inst, vdec->state, 1); 1634 vdec->eos_received = 0; 1635 vpu_process_output_buffer(inst); 1636 } else { 1637 vdec_cmd_start(inst); 1638 } 1639 if (inst->state == VPU_CODEC_STATE_ACTIVE) 1640 vdec_response_fs_request(inst, false); 1641 1642 return ret; 1643 } 1644 1645 static int vdec_stop_session(struct vpu_inst *inst, u32 type) 1646 { 1647 struct vdec_t *vdec = inst->priv; 1648 1649 if (inst->state == VPU_CODEC_STATE_DEINIT) 1650 return 0; 1651 1652 if (V4L2_TYPE_IS_OUTPUT(type)) { 1653 vdec_update_state(inst, VPU_CODEC_STATE_SEEK, 0); 1654 vdec->drain = 0; 1655 vdec_abort(inst); 1656 } else { 1657 if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) { 1658 if (vb2_is_streaming(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx))) 1659 vdec_abort(inst); 1660 vdec->eos_received = 0; 1661 } 1662 vdec_clear_slots(inst); 1663 } 1664 1665 return 0; 1666 } 1667 1668 static int vdec_get_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i) 1669 { 1670 struct vdec_t *vdec = inst->priv; 1671 int num = -1; 1672 1673 switch (i) { 1674 case 0: 1675 num = scnprintf(str, size, 1676 "req_frame_count = %d\ninterlaced = %d\n", 1677 vdec->req_frame_count, 1678 vdec->codec_info.progressive ? 0 : 1); 1679 break; 1680 case 1: 1681 num = scnprintf(str, size, 1682 "mbi: size = 0x%x request = %d, alloc = %d, response = %d\n", 1683 vdec->mbi.size, 1684 vdec->mbi.req_count, 1685 vdec->mbi.count, 1686 vdec->mbi.index); 1687 break; 1688 case 2: 1689 num = scnprintf(str, size, 1690 "dcp: size = 0x%x request = %d, alloc = %d, response = %d\n", 1691 vdec->dcp.size, 1692 vdec->dcp.req_count, 1693 vdec->dcp.count, 1694 vdec->dcp.index); 1695 break; 1696 case 3: 1697 num = scnprintf(str, size, "input_frame_count = %d\n", vdec->params.frame_count); 1698 break; 1699 case 4: 1700 num = scnprintf(str, size, "decoded_frame_count = %d\n", vdec->decoded_frame_count); 1701 break; 1702 case 5: 1703 num = scnprintf(str, size, "display_frame_count = %d\n", vdec->display_frame_count); 1704 break; 1705 case 6: 1706 num = scnprintf(str, size, "sequence = %d\n", vdec->sequence); 1707 break; 1708 case 7: 1709 num = scnprintf(str, size, "drain = %d, eos = %d, source_change = %d\n", 1710 vdec->drain, vdec->eos_received, vdec->source_change); 1711 break; 1712 case 8: 1713 num = scnprintf(str, size, "fps = %d/%d\n", 1714 vdec->codec_info.frame_rate.numerator, 1715 vdec->codec_info.frame_rate.denominator); 1716 break; 1717 case 9: 1718 num = scnprintf(str, size, "colorspace: %d, %d, %d, %d (%d)\n", 1719 vdec->codec_info.color_primaries, 1720 vdec->codec_info.transfer_chars, 1721 vdec->codec_info.matrix_coeffs, 1722 vdec->codec_info.full_range, 1723 vdec->codec_info.vui_present); 1724 break; 1725 default: 1726 break; 1727 } 1728 1729 return num; 1730 } 1731 1732 static struct vpu_inst_ops vdec_inst_ops = { 1733 .ctrl_init = vdec_ctrl_init, 1734 .check_ready = vdec_check_ready, 1735 .buf_done = vdec_buf_done, 1736 .get_one_frame = vdec_frame_decoded, 1737 .stop_done = vdec_stop_done, 1738 .event_notify = vdec_event_notify, 1739 .release = vdec_release, 1740 .cleanup = vdec_cleanup, 1741 .start = vdec_start_session, 1742 .stop = vdec_stop_session, 1743 .process_output = vdec_process_output, 1744 .process_capture = vdec_process_capture, 1745 .on_queue_empty = vdec_on_queue_empty, 1746 .get_debug_info = vdec_get_debug_info, 1747 .wait_prepare = vpu_inst_unlock, 1748 .wait_finish = vpu_inst_lock, 1749 }; 1750 1751 static void vdec_init(struct file *file) 1752 { 1753 struct vpu_inst *inst = to_inst(file); 1754 struct v4l2_format f; 1755 1756 memset(&f, 0, sizeof(f)); 1757 f.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; 1758 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; 1759 f.fmt.pix_mp.width = 1280; 1760 f.fmt.pix_mp.height = 720; 1761 f.fmt.pix_mp.field = V4L2_FIELD_NONE; 1762 vdec_s_fmt(file, &inst->fh, &f); 1763 1764 memset(&f, 0, sizeof(f)); 1765 f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; 1766 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M_8L128; 1767 f.fmt.pix_mp.width = 1280; 1768 f.fmt.pix_mp.height = 720; 1769 f.fmt.pix_mp.field = V4L2_FIELD_NONE; 1770 vdec_s_fmt(file, &inst->fh, &f); 1771 } 1772 1773 static int vdec_open(struct file *file) 1774 { 1775 struct vpu_inst *inst; 1776 struct vdec_t *vdec; 1777 int ret; 1778 1779 inst = vzalloc(sizeof(*inst)); 1780 if (!inst) 1781 return -ENOMEM; 1782 1783 vdec = vzalloc(sizeof(*vdec)); 1784 if (!vdec) { 1785 vfree(inst); 1786 return -ENOMEM; 1787 } 1788 1789 inst->ops = &vdec_inst_ops; 1790 inst->formats = vdec_formats; 1791 inst->type = VPU_CORE_TYPE_DEC; 1792 inst->priv = vdec; 1793 1794 ret = vpu_v4l2_open(file, inst); 1795 if (ret) 1796 return ret; 1797 1798 vdec->fixed_fmt = false; 1799 vdec->state = VPU_CODEC_STATE_ACTIVE; 1800 inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP; 1801 inst->min_buffer_out = VDEC_MIN_BUFFER_OUT; 1802 vdec_init(file); 1803 1804 return 0; 1805 } 1806 1807 static const struct v4l2_file_operations vdec_fops = { 1808 .owner = THIS_MODULE, 1809 .open = vdec_open, 1810 .release = vpu_v4l2_close, 1811 .unlocked_ioctl = video_ioctl2, 1812 .poll = v4l2_m2m_fop_poll, 1813 .mmap = v4l2_m2m_fop_mmap, 1814 }; 1815 1816 const struct v4l2_ioctl_ops *vdec_get_ioctl_ops(void) 1817 { 1818 return &vdec_ioctl_ops; 1819 } 1820 1821 const struct v4l2_file_operations *vdec_get_fops(void) 1822 { 1823 return &vdec_fops; 1824 } 1825