1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2020-2021 NXP 4 */ 5 6 #include <linux/init.h> 7 #include <linux/interconnect.h> 8 #include <linux/ioctl.h> 9 #include <linux/list.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/vmalloc.h> 13 #include <linux/videodev2.h> 14 #include <media/v4l2-device.h> 15 #include <media/v4l2-event.h> 16 #include <media/v4l2-mem2mem.h> 17 #include <media/v4l2-ioctl.h> 18 #include <media/videobuf2-v4l2.h> 19 #include <media/videobuf2-dma-contig.h> 20 #include <media/videobuf2-vmalloc.h> 21 #include "vpu.h" 22 #include "vpu_defs.h" 23 #include "vpu_core.h" 24 #include "vpu_helpers.h" 25 #include "vpu_v4l2.h" 26 #include "vpu_cmds.h" 27 #include "vpu_rpc.h" 28 29 #define VDEC_SLOT_CNT_DFT 32 30 #define VDEC_MIN_BUFFER_CAP 8 31 #define VDEC_MIN_BUFFER_OUT 8 32 33 struct vdec_fs_info { 34 char name[8]; 35 u32 type; 36 u32 max_count; 37 u32 req_count; 38 u32 count; 39 u32 index; 40 u32 size; 41 struct vpu_buffer buffer[32]; 42 u32 tag; 43 }; 44 45 struct vdec_frame_store_t { 46 struct vpu_vb2_buffer *curr; 47 struct vpu_vb2_buffer *pend; 48 dma_addr_t addr; 49 unsigned int state; 50 u32 tag; 51 }; 52 53 struct vdec_t { 54 u32 seq_hdr_found; 55 struct vpu_buffer udata; 56 struct vpu_decode_params params; 57 struct vpu_dec_codec_info codec_info; 58 enum vpu_codec_state state; 59 60 struct vdec_frame_store_t *slots; 61 u32 slot_count; 62 u32 req_frame_count; 63 struct vdec_fs_info mbi; 64 struct vdec_fs_info dcp; 65 u32 seq_tag; 66 67 bool reset_codec; 68 bool fixed_fmt; 69 u32 decoded_frame_count; 70 u32 display_frame_count; 71 u32 sequence; 72 u32 eos_received; 73 bool is_source_changed; 74 u32 source_change; 75 u32 drain; 76 bool aborting; 77 }; 78 79 static const struct vpu_format vdec_formats[] = { 80 { 81 .pixfmt = V4L2_PIX_FMT_NV12M_8L128, 82 .mem_planes = 2, 83 .comp_planes = 2, 84 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 85 .sibling = V4L2_PIX_FMT_NV12_8L128, 86 }, 87 { 88 .pixfmt = V4L2_PIX_FMT_NV12_8L128, 89 .mem_planes = 1, 90 .comp_planes = 2, 91 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 92 .sibling = V4L2_PIX_FMT_NV12M_8L128, 93 }, 94 { 95 .pixfmt = V4L2_PIX_FMT_NV12M_10BE_8L128, 96 .mem_planes = 2, 97 .comp_planes = 2, 98 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 99 .sibling = V4L2_PIX_FMT_NV12_10BE_8L128, 100 }, 101 { 102 .pixfmt = V4L2_PIX_FMT_NV12_10BE_8L128, 103 .mem_planes = 1, 104 .comp_planes = 2, 105 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, 106 .sibling = V4L2_PIX_FMT_NV12M_10BE_8L128 107 }, 108 { 109 .pixfmt = V4L2_PIX_FMT_H264, 110 .mem_planes = 1, 111 .comp_planes = 1, 112 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 113 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 114 }, 115 { 116 .pixfmt = V4L2_PIX_FMT_H264_MVC, 117 .mem_planes = 1, 118 .comp_planes = 1, 119 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 120 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 121 }, 122 { 123 .pixfmt = V4L2_PIX_FMT_HEVC, 124 .mem_planes = 1, 125 .comp_planes = 1, 126 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 127 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 128 }, 129 { 130 .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_G, 131 .mem_planes = 1, 132 .comp_planes = 1, 133 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 134 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 135 }, 136 { 137 .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_L, 138 .mem_planes = 1, 139 .comp_planes = 1, 140 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 141 .flags = V4L2_FMT_FLAG_COMPRESSED 142 }, 143 { 144 .pixfmt = V4L2_PIX_FMT_MPEG2, 145 .mem_planes = 1, 146 .comp_planes = 1, 147 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 148 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 149 }, 150 { 151 .pixfmt = V4L2_PIX_FMT_MPEG4, 152 .mem_planes = 1, 153 .comp_planes = 1, 154 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 155 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 156 }, 157 { 158 .pixfmt = V4L2_PIX_FMT_XVID, 159 .mem_planes = 1, 160 .comp_planes = 1, 161 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 162 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 163 }, 164 { 165 .pixfmt = V4L2_PIX_FMT_VP8, 166 .mem_planes = 1, 167 .comp_planes = 1, 168 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 169 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 170 }, 171 { 172 .pixfmt = V4L2_PIX_FMT_H263, 173 .mem_planes = 1, 174 .comp_planes = 1, 175 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 176 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 177 }, 178 { 179 .pixfmt = V4L2_PIX_FMT_SPK, 180 .mem_planes = 1, 181 .comp_planes = 1, 182 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 183 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 184 }, 185 { 186 .pixfmt = V4L2_PIX_FMT_RV30, 187 .mem_planes = 1, 188 .comp_planes = 1, 189 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 190 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 191 }, 192 { 193 .pixfmt = V4L2_PIX_FMT_RV40, 194 .mem_planes = 1, 195 .comp_planes = 1, 196 .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, 197 .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED 198 }, 199 {0, 0, 0, 0}, 200 }; 201 202 static int vdec_op_s_ctrl(struct v4l2_ctrl *ctrl) 203 { 204 struct vpu_inst *inst = ctrl_to_inst(ctrl); 205 struct vdec_t *vdec = inst->priv; 206 int ret = 0; 207 208 switch (ctrl->id) { 209 case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE: 210 vdec->params.display_delay_enable = ctrl->val; 211 break; 212 case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY: 213 vdec->params.display_delay = ctrl->val; 214 break; 215 default: 216 ret = -EINVAL; 217 break; 218 } 219 220 return ret; 221 } 222 223 static const struct v4l2_ctrl_ops vdec_ctrl_ops = { 224 .s_ctrl = vdec_op_s_ctrl, 225 .g_volatile_ctrl = vpu_helper_g_volatile_ctrl, 226 }; 227 228 static int vdec_ctrl_init(struct vpu_inst *inst) 229 { 230 struct v4l2_ctrl *ctrl; 231 int ret; 232 233 ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 20); 234 if (ret) 235 return ret; 236 237 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 238 V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY, 239 0, 0, 1, 0); 240 241 v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 242 V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE, 243 0, 1, 1, 0); 244 245 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 246 V4L2_CID_MPEG_VIDEO_H264_PROFILE, 247 V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH, 248 ~((1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | 249 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | 250 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | 251 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED) | 252 (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)), 253 V4L2_MPEG_VIDEO_H264_PROFILE_MAIN); 254 255 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 256 V4L2_CID_MPEG_VIDEO_H264_LEVEL, 257 V4L2_MPEG_VIDEO_H264_LEVEL_6_2, 258 0, 259 V4L2_MPEG_VIDEO_H264_LEVEL_4_0); 260 261 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 262 V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, 263 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, 264 ~((1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | 265 (1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10)), 266 V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN); 267 268 v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL, 269 V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, 270 V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, 271 0, 272 V4L2_MPEG_VIDEO_HEVC_LEVEL_4); 273 274 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 275 V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 32, 1, 2); 276 if (ctrl) 277 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; 278 279 ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops, 280 V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 1, 32, 1, 2); 281 if (ctrl) 282 ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; 283 284 if (inst->ctrl_handler.error) { 285 ret = inst->ctrl_handler.error; 286 v4l2_ctrl_handler_free(&inst->ctrl_handler); 287 return ret; 288 } 289 290 ret = v4l2_ctrl_handler_setup(&inst->ctrl_handler); 291 if (ret) { 292 dev_err(inst->dev, "[%d] setup ctrls fail, ret = %d\n", inst->id, ret); 293 v4l2_ctrl_handler_free(&inst->ctrl_handler); 294 return ret; 295 } 296 297 return 0; 298 } 299 300 static void vdec_attach_frame_store(struct vpu_inst *inst, struct vb2_buffer *vb) 301 { 302 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 303 struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf); 304 struct vdec_t *vdec = inst->priv; 305 struct vdec_frame_store_t *new_slots = NULL; 306 dma_addr_t addr; 307 int i; 308 309 addr = vpu_get_vb_phy_addr(vb, 0); 310 for (i = 0; i < vdec->slot_count; i++) { 311 if (addr == vdec->slots[i].addr) { 312 if (vdec->slots[i].curr && vdec->slots[i].curr != vpu_buf) { 313 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_CHANGED); 314 vdec->slots[i].pend = vpu_buf; 315 } else { 316 vpu_set_buffer_state(vbuf, vdec->slots[i].state); 317 } 318 vpu_buf->fs_id = i; 319 return; 320 } 321 } 322 323 for (i = 0; i < vdec->slot_count; i++) { 324 if (!vdec->slots[i].addr) { 325 vdec->slots[i].addr = addr; 326 vpu_buf->fs_id = i; 327 return; 328 } 329 } 330 331 new_slots = krealloc_array(vdec->slots, vdec->slot_count * 2, 332 sizeof(*vdec->slots), 333 GFP_KERNEL | __GFP_ZERO); 334 if (!new_slots) { 335 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_ERROR); 336 return; 337 } 338 339 vdec->slots = new_slots; 340 vdec->slot_count *= 2; 341 342 vdec->slots[i].addr = addr; 343 vpu_buf->fs_id = i; 344 } 345 346 static void vdec_reset_frame_store(struct vpu_inst *inst) 347 { 348 struct vdec_t *vdec = inst->priv; 349 350 if (!vdec->slots || !vdec->slot_count) 351 return; 352 353 vpu_trace(inst->dev, "inst[%d] reset slots\n", inst->id); 354 memset(vdec->slots, 0, sizeof(*vdec->slots) * vdec->slot_count); 355 } 356 357 static void vdec_handle_resolution_change(struct vpu_inst *inst) 358 { 359 struct vdec_t *vdec = inst->priv; 360 struct vb2_queue *q; 361 362 if (!inst->fh.m2m_ctx) 363 return; 364 365 if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 366 return; 367 if (!vdec->source_change) 368 return; 369 370 q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx); 371 if (!list_empty(&q->done_list)) 372 return; 373 374 vdec->source_change--; 375 vpu_notify_source_change(inst); 376 vpu_set_last_buffer_dequeued(inst, false); 377 } 378 379 static int vdec_update_state(struct vpu_inst *inst, enum vpu_codec_state state, u32 force) 380 { 381 struct vdec_t *vdec = inst->priv; 382 enum vpu_codec_state pre_state = inst->state; 383 384 if (state == VPU_CODEC_STATE_SEEK) { 385 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 386 vdec->state = inst->state; 387 else 388 vdec->state = VPU_CODEC_STATE_ACTIVE; 389 } 390 if (inst->state != VPU_CODEC_STATE_SEEK || force) 391 inst->state = state; 392 else if (state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 393 vdec->state = VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE; 394 395 if (inst->state != pre_state) 396 vpu_trace(inst->dev, "[%d] %s -> %s\n", inst->id, 397 vpu_codec_state_name(pre_state), vpu_codec_state_name(inst->state)); 398 399 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 400 vdec_handle_resolution_change(inst); 401 402 return 0; 403 } 404 405 static void vdec_set_last_buffer_dequeued(struct vpu_inst *inst) 406 { 407 struct vdec_t *vdec = inst->priv; 408 409 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 410 return; 411 412 if (vdec->eos_received) { 413 if (!vpu_set_last_buffer_dequeued(inst, true)) { 414 vdec->eos_received--; 415 vdec_update_state(inst, VPU_CODEC_STATE_DRAIN, 0); 416 } 417 } 418 } 419 420 static int vdec_querycap(struct file *file, void *fh, struct v4l2_capability *cap) 421 { 422 strscpy(cap->driver, "amphion-vpu", sizeof(cap->driver)); 423 strscpy(cap->card, "amphion vpu decoder", sizeof(cap->card)); 424 strscpy(cap->bus_info, "platform: amphion-vpu", sizeof(cap->bus_info)); 425 426 return 0; 427 } 428 429 static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) 430 { 431 struct vpu_inst *inst = to_inst(file); 432 struct vdec_t *vdec = inst->priv; 433 const struct vpu_format *fmt; 434 int ret = -EINVAL; 435 436 vpu_inst_lock(inst); 437 if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) { 438 fmt = vpu_get_format(inst, f->type); 439 if (f->index == 1) 440 fmt = vpu_helper_find_sibling(inst, f->type, fmt->pixfmt); 441 if (f->index > 1) 442 fmt = NULL; 443 } else { 444 fmt = vpu_helper_enum_format(inst, f->type, f->index); 445 } 446 if (!fmt) 447 goto exit; 448 449 memset(f->reserved, 0, sizeof(f->reserved)); 450 f->pixelformat = fmt->pixfmt; 451 f->flags = fmt->flags; 452 ret = 0; 453 exit: 454 vpu_inst_unlock(inst); 455 return ret; 456 } 457 458 static int vdec_g_fmt(struct file *file, void *fh, struct v4l2_format *f) 459 { 460 struct vpu_inst *inst = to_inst(file); 461 struct vdec_t *vdec = inst->priv; 462 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 463 struct vpu_format *cur_fmt; 464 int i; 465 466 vpu_inst_lock(inst); 467 cur_fmt = vpu_get_format(inst, f->type); 468 469 pixmp->pixelformat = cur_fmt->pixfmt; 470 pixmp->num_planes = cur_fmt->mem_planes; 471 pixmp->width = cur_fmt->width; 472 pixmp->height = cur_fmt->height; 473 pixmp->field = cur_fmt->field; 474 pixmp->flags = cur_fmt->flags; 475 for (i = 0; i < pixmp->num_planes; i++) { 476 pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i]; 477 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i); 478 } 479 480 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries; 481 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars; 482 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs; 483 f->fmt.pix_mp.quantization = vdec->codec_info.full_range; 484 vpu_inst_unlock(inst); 485 486 return 0; 487 } 488 489 static int vdec_try_fmt(struct file *file, void *fh, struct v4l2_format *f) 490 { 491 struct vpu_inst *inst = to_inst(file); 492 struct vdec_t *vdec = inst->priv; 493 struct vpu_format fmt; 494 495 vpu_inst_lock(inst); 496 if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) { 497 struct vpu_format *cap_fmt = vpu_get_format(inst, f->type); 498 499 if (!vpu_helper_match_format(inst, cap_fmt->type, cap_fmt->pixfmt, 500 f->fmt.pix_mp.pixelformat)) 501 f->fmt.pix_mp.pixelformat = cap_fmt->pixfmt; 502 } 503 504 vpu_try_fmt_common(inst, f, &fmt); 505 506 if (vdec->fixed_fmt) { 507 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries; 508 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars; 509 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs; 510 f->fmt.pix_mp.quantization = vdec->codec_info.full_range; 511 } else { 512 f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT; 513 f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT; 514 f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; 515 f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT; 516 } 517 vpu_inst_unlock(inst); 518 519 return 0; 520 } 521 522 static int vdec_s_fmt_common(struct vpu_inst *inst, struct v4l2_format *f) 523 { 524 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 525 struct vpu_format fmt; 526 struct vpu_format *cur_fmt; 527 struct vb2_queue *q; 528 struct vdec_t *vdec = inst->priv; 529 int i; 530 531 if (!inst->fh.m2m_ctx) 532 return -EINVAL; 533 534 q = v4l2_m2m_get_vq(inst->fh.m2m_ctx, f->type); 535 if (vb2_is_busy(q)) 536 return -EBUSY; 537 538 if (vpu_try_fmt_common(inst, f, &fmt)) 539 return -EINVAL; 540 541 cur_fmt = vpu_get_format(inst, f->type); 542 if (V4L2_TYPE_IS_OUTPUT(f->type) && inst->state != VPU_CODEC_STATE_DEINIT) { 543 if (cur_fmt->pixfmt != fmt.pixfmt) { 544 vdec->reset_codec = true; 545 vdec->fixed_fmt = false; 546 } 547 } 548 if (V4L2_TYPE_IS_OUTPUT(f->type) || !vdec->fixed_fmt) { 549 memcpy(cur_fmt, &fmt, sizeof(*cur_fmt)); 550 } else { 551 if (vpu_helper_match_format(inst, f->type, cur_fmt->pixfmt, pixmp->pixelformat)) { 552 cur_fmt->pixfmt = fmt.pixfmt; 553 cur_fmt->mem_planes = fmt.mem_planes; 554 } 555 pixmp->pixelformat = cur_fmt->pixfmt; 556 pixmp->num_planes = cur_fmt->mem_planes; 557 pixmp->width = cur_fmt->width; 558 pixmp->height = cur_fmt->height; 559 for (i = 0; i < pixmp->num_planes; i++) { 560 pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i]; 561 pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i); 562 } 563 pixmp->field = cur_fmt->field; 564 } 565 566 if (!vdec->fixed_fmt) { 567 if (V4L2_TYPE_IS_OUTPUT(f->type)) { 568 vdec->params.codec_format = cur_fmt->pixfmt; 569 vdec->codec_info.color_primaries = f->fmt.pix_mp.colorspace; 570 vdec->codec_info.transfer_chars = f->fmt.pix_mp.xfer_func; 571 vdec->codec_info.matrix_coeffs = f->fmt.pix_mp.ycbcr_enc; 572 vdec->codec_info.full_range = f->fmt.pix_mp.quantization; 573 } else { 574 vdec->params.output_format = cur_fmt->pixfmt; 575 inst->crop.left = 0; 576 inst->crop.top = 0; 577 inst->crop.width = cur_fmt->width; 578 inst->crop.height = cur_fmt->height; 579 } 580 } 581 582 vpu_trace(inst->dev, "[%d] %c%c%c%c %dx%d\n", inst->id, 583 f->fmt.pix_mp.pixelformat, 584 f->fmt.pix_mp.pixelformat >> 8, 585 f->fmt.pix_mp.pixelformat >> 16, 586 f->fmt.pix_mp.pixelformat >> 24, 587 f->fmt.pix_mp.width, 588 f->fmt.pix_mp.height); 589 590 return 0; 591 } 592 593 static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f) 594 { 595 struct vpu_inst *inst = to_inst(file); 596 struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; 597 struct vdec_t *vdec = inst->priv; 598 int ret = 0; 599 600 vpu_inst_lock(inst); 601 ret = vdec_s_fmt_common(inst, f); 602 if (ret) 603 goto exit; 604 605 if (V4L2_TYPE_IS_OUTPUT(f->type) && !vdec->fixed_fmt) { 606 struct v4l2_format fc; 607 608 memset(&fc, 0, sizeof(fc)); 609 fc.type = inst->cap_format.type; 610 fc.fmt.pix_mp.pixelformat = inst->cap_format.pixfmt; 611 fc.fmt.pix_mp.width = pixmp->width; 612 fc.fmt.pix_mp.height = pixmp->height; 613 vdec_s_fmt_common(inst, &fc); 614 } 615 616 f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries; 617 f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars; 618 f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs; 619 f->fmt.pix_mp.quantization = vdec->codec_info.full_range; 620 621 exit: 622 vpu_inst_unlock(inst); 623 return ret; 624 } 625 626 static int vdec_g_selection(struct file *file, void *fh, struct v4l2_selection *s) 627 { 628 struct vpu_inst *inst = to_inst(file); 629 630 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) 631 return -EINVAL; 632 633 switch (s->target) { 634 case V4L2_SEL_TGT_COMPOSE: 635 case V4L2_SEL_TGT_COMPOSE_DEFAULT: 636 case V4L2_SEL_TGT_COMPOSE_PADDED: 637 s->r = inst->crop; 638 break; 639 case V4L2_SEL_TGT_COMPOSE_BOUNDS: 640 s->r.left = 0; 641 s->r.top = 0; 642 s->r.width = inst->cap_format.width; 643 s->r.height = inst->cap_format.height; 644 break; 645 default: 646 return -EINVAL; 647 } 648 649 return 0; 650 } 651 652 static int vdec_drain(struct vpu_inst *inst) 653 { 654 struct vdec_t *vdec = inst->priv; 655 656 if (!inst->fh.m2m_ctx) 657 return 0; 658 659 if (!vdec->drain) 660 return 0; 661 662 if (!vpu_is_source_empty(inst)) 663 return 0; 664 665 if (!vdec->params.frame_count) { 666 vpu_set_last_buffer_dequeued(inst, true); 667 return 0; 668 } 669 670 vpu_iface_add_scode(inst, SCODE_PADDING_EOS); 671 vdec->params.end_flag = 1; 672 vpu_iface_set_decode_params(inst, &vdec->params, 1); 673 vdec->drain = 0; 674 vpu_trace(inst->dev, "[%d] frame_count = %d\n", inst->id, vdec->params.frame_count); 675 676 return 0; 677 } 678 679 static int vdec_cmd_start(struct vpu_inst *inst) 680 { 681 struct vdec_t *vdec = inst->priv; 682 683 switch (inst->state) { 684 case VPU_CODEC_STATE_STARTED: 685 case VPU_CODEC_STATE_DRAIN: 686 case VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE: 687 vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0); 688 break; 689 default: 690 break; 691 } 692 vpu_process_capture_buffer(inst); 693 if (vdec->eos_received) 694 vdec_set_last_buffer_dequeued(inst); 695 return 0; 696 } 697 698 static int vdec_cmd_stop(struct vpu_inst *inst) 699 { 700 struct vdec_t *vdec = inst->priv; 701 702 vpu_trace(inst->dev, "[%d]\n", inst->id); 703 704 if (inst->state == VPU_CODEC_STATE_DEINIT) { 705 vpu_set_last_buffer_dequeued(inst, true); 706 } else { 707 vdec->drain = 1; 708 vdec_drain(inst); 709 } 710 711 return 0; 712 } 713 714 static int vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) 715 { 716 struct vpu_inst *inst = to_inst(file); 717 int ret; 718 719 ret = v4l2_m2m_ioctl_try_decoder_cmd(file, fh, cmd); 720 if (ret) 721 return ret; 722 723 vpu_inst_lock(inst); 724 switch (cmd->cmd) { 725 case V4L2_DEC_CMD_START: 726 vdec_cmd_start(inst); 727 break; 728 case V4L2_DEC_CMD_STOP: 729 vdec_cmd_stop(inst); 730 break; 731 default: 732 break; 733 } 734 vpu_inst_unlock(inst); 735 736 return 0; 737 } 738 739 static int vdec_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub) 740 { 741 switch (sub->type) { 742 case V4L2_EVENT_EOS: 743 return v4l2_event_subscribe(fh, sub, 0, NULL); 744 case V4L2_EVENT_SOURCE_CHANGE: 745 return v4l2_src_change_event_subscribe(fh, sub); 746 case V4L2_EVENT_CTRL: 747 return v4l2_ctrl_subscribe_event(fh, sub); 748 default: 749 return -EINVAL; 750 } 751 752 return 0; 753 } 754 755 static const struct v4l2_ioctl_ops vdec_ioctl_ops = { 756 .vidioc_querycap = vdec_querycap, 757 .vidioc_enum_fmt_vid_cap = vdec_enum_fmt, 758 .vidioc_enum_fmt_vid_out = vdec_enum_fmt, 759 .vidioc_g_fmt_vid_cap_mplane = vdec_g_fmt, 760 .vidioc_g_fmt_vid_out_mplane = vdec_g_fmt, 761 .vidioc_try_fmt_vid_cap_mplane = vdec_try_fmt, 762 .vidioc_try_fmt_vid_out_mplane = vdec_try_fmt, 763 .vidioc_s_fmt_vid_cap_mplane = vdec_s_fmt, 764 .vidioc_s_fmt_vid_out_mplane = vdec_s_fmt, 765 .vidioc_g_selection = vdec_g_selection, 766 .vidioc_try_decoder_cmd = v4l2_m2m_ioctl_try_decoder_cmd, 767 .vidioc_decoder_cmd = vdec_decoder_cmd, 768 .vidioc_subscribe_event = vdec_subscribe_event, 769 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 770 .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, 771 .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, 772 .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, 773 .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, 774 .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, 775 .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, 776 .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, 777 .vidioc_streamon = v4l2_m2m_ioctl_streamon, 778 .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, 779 }; 780 781 static bool vdec_check_ready(struct vpu_inst *inst, unsigned int type) 782 { 783 struct vdec_t *vdec = inst->priv; 784 785 if (V4L2_TYPE_IS_OUTPUT(type)) 786 return true; 787 788 if (vdec->req_frame_count) 789 return true; 790 791 return false; 792 } 793 794 static struct vb2_v4l2_buffer *vdec_get_src_buffer(struct vpu_inst *inst, u32 count) 795 { 796 if (count > 1) 797 vpu_skip_frame(inst, count - 1); 798 799 return vpu_next_src_buf(inst); 800 } 801 802 static int vdec_frame_decoded(struct vpu_inst *inst, void *arg) 803 { 804 struct vdec_t *vdec = inst->priv; 805 struct vpu_dec_pic_info *info = arg; 806 struct vpu_vb2_buffer *vpu_buf; 807 struct vb2_v4l2_buffer *vbuf; 808 struct vb2_v4l2_buffer *src_buf; 809 int ret = 0; 810 811 if (!info || info->id >= vdec->slot_count) 812 return -EINVAL; 813 814 vpu_inst_lock(inst); 815 vpu_buf = vdec->slots[info->id].curr; 816 if (!vpu_buf) { 817 dev_err(inst->dev, "[%d] decoded invalid frame[%d]\n", inst->id, info->id); 818 ret = -EINVAL; 819 goto exit; 820 } 821 vbuf = &vpu_buf->m2m_buf.vb; 822 src_buf = vdec_get_src_buffer(inst, info->consumed_count); 823 if (src_buf) { 824 v4l2_m2m_buf_copy_metadata(src_buf, vbuf); 825 if (info->consumed_count) { 826 v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx); 827 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE); 828 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); 829 } else { 830 vpu_set_buffer_state(src_buf, VPU_BUF_STATE_DECODED); 831 } 832 } 833 if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_DECODED) 834 dev_info(inst->dev, "[%d] buf[%d] has been decoded\n", inst->id, info->id); 835 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_DECODED); 836 vdec->slots[info->id].state = VPU_BUF_STATE_DECODED; 837 vdec->decoded_frame_count++; 838 if (vdec->params.display_delay_enable) { 839 struct vpu_format *cur_fmt; 840 841 cur_fmt = vpu_get_format(inst, inst->cap_format.type); 842 vdec->slots[info->id].state = VPU_BUF_STATE_READY; 843 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY); 844 for (int i = 0; i < vbuf->vb2_buf.num_planes; i++) 845 vb2_set_plane_payload(&vbuf->vb2_buf, 846 i, vpu_get_fmt_plane_size(cur_fmt, i)); 847 vbuf->field = cur_fmt->field; 848 vbuf->sequence = vdec->sequence++; 849 dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp); 850 851 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); 852 vdec->display_frame_count++; 853 } 854 exit: 855 vpu_inst_unlock(inst); 856 857 return ret; 858 } 859 860 static struct vpu_vb2_buffer *vdec_find_buffer(struct vpu_inst *inst, u32 luma) 861 { 862 struct vdec_t *vdec = inst->priv; 863 int i; 864 865 for (i = 0; i < vdec->slot_count; i++) { 866 if (!vdec->slots[i].curr) 867 continue; 868 if (luma == vdec->slots[i].addr) 869 return vdec->slots[i].curr; 870 } 871 872 return NULL; 873 } 874 875 static void vdec_buf_done(struct vpu_inst *inst, struct vpu_frame_info *frame) 876 { 877 struct vdec_t *vdec = inst->priv; 878 struct vpu_format *cur_fmt; 879 struct vpu_vb2_buffer *vpu_buf; 880 struct vb2_v4l2_buffer *vbuf; 881 int i; 882 883 if (!frame) 884 return; 885 886 vpu_inst_lock(inst); 887 if (!vdec->params.display_delay_enable) 888 vdec->sequence++; 889 vpu_buf = vdec_find_buffer(inst, frame->luma); 890 vpu_inst_unlock(inst); 891 if (!vpu_buf) { 892 dev_err(inst->dev, "[%d] can't find buffer, id = %d, addr = 0x%x\n", 893 inst->id, frame->id, frame->luma); 894 return; 895 } 896 if (frame->skipped) { 897 dev_dbg(inst->dev, "[%d] frame skip\n", inst->id); 898 return; 899 } 900 901 cur_fmt = vpu_get_format(inst, inst->cap_format.type); 902 vbuf = &vpu_buf->m2m_buf.vb; 903 if (vpu_buf->fs_id != frame->id) 904 dev_err(inst->dev, "[%d] buffer id(%d(%d), %d) mismatch\n", 905 inst->id, vpu_buf->fs_id, vbuf->vb2_buf.index, frame->id); 906 907 if (vdec->params.display_delay_enable) 908 return; 909 910 if (vpu_get_buffer_state(vbuf) != VPU_BUF_STATE_DECODED) 911 dev_err(inst->dev, "[%d] buffer(%d) ready without decoded\n", inst->id, frame->id); 912 913 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY); 914 for (i = 0; i < vbuf->vb2_buf.num_planes; i++) 915 vb2_set_plane_payload(&vbuf->vb2_buf, i, vpu_get_fmt_plane_size(cur_fmt, i)); 916 vbuf->field = cur_fmt->field; 917 vbuf->sequence = vdec->sequence; 918 dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp); 919 920 vpu_inst_lock(inst); 921 vdec->slots[vpu_buf->fs_id].state = VPU_BUF_STATE_READY; 922 vdec->display_frame_count++; 923 vpu_inst_unlock(inst); 924 v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); 925 dev_dbg(inst->dev, "[%d] decoded : %d, display : %d, sequence : %d\n", 926 inst->id, vdec->decoded_frame_count, vdec->display_frame_count, vdec->sequence); 927 } 928 929 static void vdec_stop_done(struct vpu_inst *inst) 930 { 931 struct vdec_t *vdec = inst->priv; 932 933 vpu_inst_lock(inst); 934 vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 0); 935 vdec->seq_hdr_found = 0; 936 vdec->req_frame_count = 0; 937 vdec->reset_codec = false; 938 vdec->fixed_fmt = false; 939 vdec->params.end_flag = 0; 940 vdec->drain = 0; 941 vdec->params.frame_count = 0; 942 vdec->decoded_frame_count = 0; 943 vdec->display_frame_count = 0; 944 vdec->sequence = 0; 945 vdec->eos_received = 0; 946 vdec->is_source_changed = false; 947 vdec->source_change = 0; 948 inst->total_input_count = 0; 949 vpu_inst_unlock(inst); 950 } 951 952 static bool vdec_check_source_change(struct vpu_inst *inst) 953 { 954 struct vdec_t *vdec = inst->priv; 955 const struct vpu_format *sibling; 956 957 if (!inst->fh.m2m_ctx) 958 return false; 959 960 if (vdec->reset_codec) 961 return false; 962 963 sibling = vpu_helper_find_sibling(inst, inst->cap_format.type, inst->cap_format.pixfmt); 964 if (sibling && vdec->codec_info.pixfmt == sibling->pixfmt) 965 vdec->codec_info.pixfmt = inst->cap_format.pixfmt; 966 967 if (!vb2_is_streaming(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx))) 968 return true; 969 if (inst->cap_format.pixfmt != vdec->codec_info.pixfmt) 970 return true; 971 if (inst->cap_format.width != vdec->codec_info.decoded_width) 972 return true; 973 if (inst->cap_format.height != vdec->codec_info.decoded_height) 974 return true; 975 if (vpu_get_num_buffers(inst, inst->cap_format.type) < inst->min_buffer_cap) 976 return true; 977 if (inst->crop.left != vdec->codec_info.offset_x) 978 return true; 979 if (inst->crop.top != vdec->codec_info.offset_y) 980 return true; 981 if (inst->crop.width != vdec->codec_info.width) 982 return true; 983 if (inst->crop.height != vdec->codec_info.height) 984 return true; 985 986 return false; 987 } 988 989 static void vdec_init_fmt(struct vpu_inst *inst) 990 { 991 struct vdec_t *vdec = inst->priv; 992 struct v4l2_format f; 993 994 memset(&f, 0, sizeof(f)); 995 f.type = inst->cap_format.type; 996 f.fmt.pix_mp.pixelformat = vdec->codec_info.pixfmt; 997 f.fmt.pix_mp.width = vdec->codec_info.decoded_width; 998 f.fmt.pix_mp.height = vdec->codec_info.decoded_height; 999 if (vdec->codec_info.progressive) 1000 f.fmt.pix_mp.field = V4L2_FIELD_NONE; 1001 else 1002 f.fmt.pix_mp.field = V4L2_FIELD_SEQ_TB; 1003 vpu_try_fmt_common(inst, &f, &inst->cap_format); 1004 1005 inst->out_format.width = vdec->codec_info.width; 1006 inst->out_format.height = vdec->codec_info.height; 1007 } 1008 1009 static void vdec_init_crop(struct vpu_inst *inst) 1010 { 1011 struct vdec_t *vdec = inst->priv; 1012 1013 inst->crop.left = vdec->codec_info.offset_x; 1014 inst->crop.top = vdec->codec_info.offset_y; 1015 inst->crop.width = vdec->codec_info.width; 1016 inst->crop.height = vdec->codec_info.height; 1017 } 1018 1019 static void vdec_init_mbi(struct vpu_inst *inst) 1020 { 1021 struct vdec_t *vdec = inst->priv; 1022 1023 vdec->mbi.size = vdec->codec_info.mbi_size; 1024 vdec->mbi.max_count = ARRAY_SIZE(vdec->mbi.buffer); 1025 scnprintf(vdec->mbi.name, sizeof(vdec->mbi.name), "mbi"); 1026 vdec->mbi.type = MEM_RES_MBI; 1027 vdec->mbi.tag = vdec->seq_tag; 1028 } 1029 1030 static void vdec_init_dcp(struct vpu_inst *inst) 1031 { 1032 struct vdec_t *vdec = inst->priv; 1033 1034 vdec->dcp.size = vdec->codec_info.dcp_size; 1035 vdec->dcp.max_count = ARRAY_SIZE(vdec->dcp.buffer); 1036 scnprintf(vdec->dcp.name, sizeof(vdec->dcp.name), "dcp"); 1037 vdec->dcp.type = MEM_RES_DCP; 1038 vdec->dcp.tag = vdec->seq_tag; 1039 } 1040 1041 static void vdec_request_one_fs(struct vdec_fs_info *fs) 1042 { 1043 fs->req_count++; 1044 if (fs->req_count > fs->max_count) 1045 fs->req_count = fs->max_count; 1046 } 1047 1048 static int vdec_alloc_fs_buffer(struct vpu_inst *inst, struct vdec_fs_info *fs) 1049 { 1050 struct vpu_buffer *buffer; 1051 1052 if (!fs->size) 1053 return -EINVAL; 1054 1055 if (fs->count >= fs->req_count) 1056 return -EINVAL; 1057 1058 buffer = &fs->buffer[fs->count]; 1059 if (buffer->virt && buffer->length >= fs->size) 1060 return 0; 1061 1062 vpu_free_dma(buffer); 1063 buffer->length = fs->size; 1064 return vpu_alloc_dma(inst->core, buffer); 1065 } 1066 1067 static void vdec_alloc_fs(struct vpu_inst *inst, struct vdec_fs_info *fs) 1068 { 1069 int ret; 1070 1071 while (fs->count < fs->req_count) { 1072 ret = vdec_alloc_fs_buffer(inst, fs); 1073 if (ret) 1074 break; 1075 fs->count++; 1076 } 1077 } 1078 1079 static void vdec_clear_fs(struct vdec_fs_info *fs) 1080 { 1081 u32 i; 1082 1083 if (!fs) 1084 return; 1085 1086 for (i = 0; i < ARRAY_SIZE(fs->buffer); i++) 1087 vpu_free_dma(&fs->buffer[i]); 1088 memset(fs, 0, sizeof(*fs)); 1089 } 1090 1091 static int vdec_response_fs(struct vpu_inst *inst, struct vdec_fs_info *fs) 1092 { 1093 struct vpu_fs_info info; 1094 int ret; 1095 1096 if (fs->index >= fs->count) 1097 return 0; 1098 1099 memset(&info, 0, sizeof(info)); 1100 info.id = fs->index; 1101 info.type = fs->type; 1102 info.tag = fs->tag; 1103 info.luma_addr = fs->buffer[fs->index].phys; 1104 info.luma_size = fs->buffer[fs->index].length; 1105 ret = vpu_session_alloc_fs(inst, &info); 1106 if (ret) 1107 return ret; 1108 1109 fs->index++; 1110 return 0; 1111 } 1112 1113 static int vdec_response_frame_abnormal(struct vpu_inst *inst) 1114 { 1115 struct vdec_t *vdec = inst->priv; 1116 struct vpu_fs_info info; 1117 int ret; 1118 1119 if (!vdec->req_frame_count) 1120 return 0; 1121 1122 memset(&info, 0, sizeof(info)); 1123 info.type = MEM_RES_FRAME; 1124 info.tag = vdec->seq_tag + 0xf0; 1125 ret = vpu_session_alloc_fs(inst, &info); 1126 if (ret) 1127 return ret; 1128 vdec->req_frame_count--; 1129 1130 return 0; 1131 } 1132 1133 static int vdec_response_frame(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf) 1134 { 1135 struct vdec_t *vdec = inst->priv; 1136 struct vpu_vb2_buffer *vpu_buf; 1137 struct vpu_fs_info info; 1138 int ret; 1139 1140 if (inst->state != VPU_CODEC_STATE_ACTIVE) 1141 return -EINVAL; 1142 1143 if (vdec->aborting) 1144 return -EINVAL; 1145 1146 if (!vdec->req_frame_count) 1147 return -EINVAL; 1148 1149 if (!vbuf) 1150 return -EINVAL; 1151 1152 vpu_buf = to_vpu_vb2_buffer(vbuf); 1153 if (vpu_buf->fs_id < 0 || vpu_buf->fs_id >= vdec->slot_count) { 1154 dev_err(inst->dev, "invalid fs %d for v4l2 buffer %d\n", 1155 vpu_buf->fs_id, vbuf->vb2_buf.index); 1156 return -EINVAL; 1157 } 1158 1159 if (vdec->slots[vpu_buf->fs_id].curr) { 1160 if (vdec->slots[vpu_buf->fs_id].curr != vpu_buf) { 1161 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_CHANGED); 1162 vdec->slots[vpu_buf->fs_id].pend = vpu_buf; 1163 } else { 1164 vpu_set_buffer_state(vbuf, vdec->slots[vpu_buf->fs_id].state); 1165 } 1166 dev_err(inst->dev, "[%d] repeat alloc fs %d (v4l2 index %d)\n", 1167 inst->id, vpu_buf->fs_id, vbuf->vb2_buf.index); 1168 return -EAGAIN; 1169 } 1170 1171 dev_dbg(inst->dev, "[%d] state = %s, alloc fs %d, tag = 0x%x\n", 1172 inst->id, vpu_codec_state_name(inst->state), vbuf->vb2_buf.index, vdec->seq_tag); 1173 1174 memset(&info, 0, sizeof(info)); 1175 info.id = vpu_buf->fs_id; 1176 info.type = MEM_RES_FRAME; 1177 info.tag = vdec->seq_tag; 1178 info.luma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 0); 1179 info.luma_size = inst->cap_format.sizeimage[0]; 1180 if (vbuf->vb2_buf.num_planes > 1) 1181 info.chroma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 1); 1182 else 1183 info.chroma_addr = info.luma_addr + info.luma_size; 1184 info.chromau_size = inst->cap_format.sizeimage[1]; 1185 info.bytesperline = inst->cap_format.bytesperline[0]; 1186 ret = vpu_session_alloc_fs(inst, &info); 1187 if (ret) 1188 return ret; 1189 1190 vpu_buf->luma = info.luma_addr; 1191 vpu_buf->chroma_u = info.chroma_addr; 1192 vpu_buf->chroma_v = 0; 1193 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE); 1194 vdec->slots[info.id].tag = info.tag; 1195 vdec->slots[info.id].curr = vpu_buf; 1196 vdec->slots[info.id].state = VPU_BUF_STATE_INUSE; 1197 vdec->req_frame_count--; 1198 1199 return 0; 1200 } 1201 1202 static void vdec_response_fs_request(struct vpu_inst *inst, bool force) 1203 { 1204 struct vdec_t *vdec = inst->priv; 1205 int i; 1206 int ret; 1207 1208 if (force) { 1209 for (i = vdec->req_frame_count; i > 0; i--) 1210 vdec_response_frame_abnormal(inst); 1211 return; 1212 } 1213 1214 for (i = vdec->req_frame_count; i > 0; i--) { 1215 ret = vpu_process_capture_buffer(inst); 1216 if (ret) 1217 break; 1218 if (vdec->eos_received) 1219 break; 1220 } 1221 1222 for (i = vdec->mbi.index; i < vdec->mbi.count; i++) { 1223 if (vdec_response_fs(inst, &vdec->mbi)) 1224 break; 1225 if (vdec->eos_received) 1226 break; 1227 } 1228 for (i = vdec->dcp.index; i < vdec->dcp.count; i++) { 1229 if (vdec_response_fs(inst, &vdec->dcp)) 1230 break; 1231 if (vdec->eos_received) 1232 break; 1233 } 1234 } 1235 1236 static void vdec_response_fs_release(struct vpu_inst *inst, u32 id, u32 tag) 1237 { 1238 struct vpu_fs_info info; 1239 1240 memset(&info, 0, sizeof(info)); 1241 info.id = id; 1242 info.tag = tag; 1243 vpu_session_release_fs(inst, &info); 1244 } 1245 1246 static void vdec_recycle_buffer(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf) 1247 { 1248 if (!inst->fh.m2m_ctx) 1249 return; 1250 if (vbuf->vb2_buf.state != VB2_BUF_STATE_ACTIVE) 1251 return; 1252 if (vpu_find_buf_by_idx(inst, vbuf->vb2_buf.type, vbuf->vb2_buf.index)) 1253 return; 1254 v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf); 1255 } 1256 1257 static void vdec_release_curr_frame_store(struct vpu_inst *inst, u32 id) 1258 { 1259 struct vdec_t *vdec = inst->priv; 1260 struct vpu_vb2_buffer *vpu_buf; 1261 struct vb2_v4l2_buffer *vbuf; 1262 1263 if (id >= vdec->slot_count) 1264 return; 1265 if (!vdec->slots[id].curr) 1266 return; 1267 1268 vpu_buf = vdec->slots[id].curr; 1269 vbuf = &vpu_buf->m2m_buf.vb; 1270 1271 vdec_response_fs_release(inst, id, vdec->slots[id].tag); 1272 if (vpu_buf->fs_id == id) { 1273 if (vpu_buf->state != VPU_BUF_STATE_READY) 1274 vdec_recycle_buffer(inst, vbuf); 1275 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE); 1276 } 1277 1278 vdec->slots[id].curr = NULL; 1279 vdec->slots[id].state = VPU_BUF_STATE_IDLE; 1280 1281 if (vdec->slots[id].pend) { 1282 vpu_set_buffer_state(&vdec->slots[id].pend->m2m_buf.vb, VPU_BUF_STATE_IDLE); 1283 vdec->slots[id].pend = NULL; 1284 } 1285 } 1286 1287 static void vdec_clear_slots(struct vpu_inst *inst) 1288 { 1289 struct vdec_t *vdec = inst->priv; 1290 int i; 1291 1292 for (i = 0; i < vdec->slot_count; i++) { 1293 if (!vdec->slots[i].curr) 1294 continue; 1295 1296 vpu_trace(inst->dev, "clear slot %d\n", i); 1297 vdec_release_curr_frame_store(inst, i); 1298 } 1299 } 1300 1301 static void vdec_update_v4l2_ctrl(struct vpu_inst *inst, u32 id, u32 val) 1302 { 1303 struct v4l2_ctrl *ctrl = v4l2_ctrl_find(&inst->ctrl_handler, id); 1304 1305 if (ctrl) 1306 v4l2_ctrl_s_ctrl(ctrl, val); 1307 } 1308 1309 static void vdec_update_v4l2_profile_level(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr) 1310 { 1311 switch (inst->out_format.pixfmt) { 1312 case V4L2_PIX_FMT_H264: 1313 case V4L2_PIX_FMT_H264_MVC: 1314 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_PROFILE, 1315 vpu_get_h264_v4l2_profile(hdr)); 1316 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_LEVEL, 1317 vpu_get_h264_v4l2_level(hdr)); 1318 break; 1319 case V4L2_PIX_FMT_HEVC: 1320 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, 1321 vpu_get_hevc_v4l2_profile(hdr)); 1322 vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, 1323 vpu_get_hevc_v4l2_level(hdr)); 1324 break; 1325 default: 1326 return; 1327 } 1328 } 1329 1330 static void vdec_event_seq_hdr(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr) 1331 { 1332 struct vdec_t *vdec = inst->priv; 1333 1334 vpu_inst_lock(inst); 1335 memcpy(&vdec->codec_info, hdr, sizeof(vdec->codec_info)); 1336 1337 vpu_trace(inst->dev, "[%d] %d x %d, crop : (%d, %d) %d x %d, %d, %d\n", 1338 inst->id, 1339 vdec->codec_info.decoded_width, 1340 vdec->codec_info.decoded_height, 1341 vdec->codec_info.offset_x, 1342 vdec->codec_info.offset_y, 1343 vdec->codec_info.width, 1344 vdec->codec_info.height, 1345 hdr->num_ref_frms, 1346 hdr->num_dpb_frms); 1347 inst->min_buffer_cap = hdr->num_ref_frms + hdr->num_dpb_frms; 1348 vdec->is_source_changed = vdec_check_source_change(inst); 1349 vdec_init_fmt(inst); 1350 vdec_init_crop(inst); 1351 vdec_init_mbi(inst); 1352 vdec_init_dcp(inst); 1353 vdec_update_v4l2_profile_level(inst, hdr); 1354 if (!vdec->seq_hdr_found) { 1355 vdec->seq_tag = vdec->codec_info.tag; 1356 if (vdec->is_source_changed) { 1357 vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0); 1358 vdec->source_change++; 1359 vdec_handle_resolution_change(inst); 1360 vdec->is_source_changed = false; 1361 } 1362 } 1363 if (vdec->seq_tag != vdec->codec_info.tag) { 1364 vdec_response_fs_request(inst, true); 1365 vpu_trace(inst->dev, "[%d] seq tag change: %d -> %d\n", 1366 inst->id, vdec->seq_tag, vdec->codec_info.tag); 1367 } 1368 vdec->seq_hdr_found++; 1369 vdec->fixed_fmt = true; 1370 vpu_inst_unlock(inst); 1371 } 1372 1373 static void vdec_event_resolution_change(struct vpu_inst *inst) 1374 { 1375 struct vdec_t *vdec = inst->priv; 1376 1377 vpu_trace(inst->dev, "[%d]\n", inst->id); 1378 vpu_inst_lock(inst); 1379 vdec->seq_tag = vdec->codec_info.tag; 1380 vdec_clear_fs(&vdec->mbi); 1381 vdec_clear_fs(&vdec->dcp); 1382 vdec_clear_slots(inst); 1383 vdec_init_mbi(inst); 1384 vdec_init_dcp(inst); 1385 if (vdec->is_source_changed) { 1386 vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0); 1387 vdec->source_change++; 1388 vdec_handle_resolution_change(inst); 1389 vdec->is_source_changed = false; 1390 } 1391 vpu_inst_unlock(inst); 1392 } 1393 1394 static void vdec_event_req_fs(struct vpu_inst *inst, struct vpu_fs_info *fs) 1395 { 1396 struct vdec_t *vdec = inst->priv; 1397 1398 if (!fs) 1399 return; 1400 1401 vpu_inst_lock(inst); 1402 1403 switch (fs->type) { 1404 case MEM_RES_FRAME: 1405 vdec->req_frame_count++; 1406 break; 1407 case MEM_RES_MBI: 1408 vdec_request_one_fs(&vdec->mbi); 1409 break; 1410 case MEM_RES_DCP: 1411 vdec_request_one_fs(&vdec->dcp); 1412 break; 1413 default: 1414 break; 1415 } 1416 1417 vdec_alloc_fs(inst, &vdec->mbi); 1418 vdec_alloc_fs(inst, &vdec->dcp); 1419 1420 vdec_response_fs_request(inst, false); 1421 1422 vpu_inst_unlock(inst); 1423 } 1424 1425 static void vdec_evnet_rel_fs(struct vpu_inst *inst, struct vpu_fs_info *fs) 1426 { 1427 struct vdec_t *vdec = inst->priv; 1428 1429 if (!fs || fs->id >= vdec->slot_count) 1430 return; 1431 if (fs->type != MEM_RES_FRAME) 1432 return; 1433 1434 if (fs->id >= vdec->slot_count) { 1435 dev_err(inst->dev, "[%d] invalid fs(%d) to release\n", inst->id, fs->id); 1436 return; 1437 } 1438 1439 vpu_inst_lock(inst); 1440 if (!vdec->slots[fs->id].curr) { 1441 dev_dbg(inst->dev, "[%d] fs[%d] has bee released\n", inst->id, fs->id); 1442 goto exit; 1443 } 1444 1445 if (vdec->slots[fs->id].state == VPU_BUF_STATE_DECODED) { 1446 dev_dbg(inst->dev, "[%d] frame skip\n", inst->id); 1447 vdec->sequence++; 1448 } 1449 1450 vdec_release_curr_frame_store(inst, fs->id); 1451 vpu_process_capture_buffer(inst); 1452 1453 exit: 1454 vpu_inst_unlock(inst); 1455 } 1456 1457 static void vdec_event_eos(struct vpu_inst *inst) 1458 { 1459 struct vdec_t *vdec = inst->priv; 1460 1461 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n", 1462 inst->id, 1463 vdec->params.frame_count, 1464 vdec->decoded_frame_count, 1465 vdec->display_frame_count, 1466 vdec->sequence); 1467 vpu_inst_lock(inst); 1468 vdec->eos_received++; 1469 vdec->fixed_fmt = false; 1470 inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP; 1471 vdec_set_last_buffer_dequeued(inst); 1472 vpu_inst_unlock(inst); 1473 } 1474 1475 static void vdec_event_notify(struct vpu_inst *inst, u32 event, void *data) 1476 { 1477 switch (event) { 1478 case VPU_MSG_ID_SEQ_HDR_FOUND: 1479 vdec_event_seq_hdr(inst, data); 1480 break; 1481 case VPU_MSG_ID_RES_CHANGE: 1482 vdec_event_resolution_change(inst); 1483 break; 1484 case VPU_MSG_ID_FRAME_REQ: 1485 vdec_event_req_fs(inst, data); 1486 break; 1487 case VPU_MSG_ID_FRAME_RELEASE: 1488 vdec_evnet_rel_fs(inst, data); 1489 break; 1490 case VPU_MSG_ID_PIC_EOS: 1491 vdec_event_eos(inst); 1492 break; 1493 default: 1494 break; 1495 } 1496 } 1497 1498 static int vdec_process_output(struct vpu_inst *inst, struct vb2_buffer *vb) 1499 { 1500 struct vdec_t *vdec = inst->priv; 1501 struct vb2_v4l2_buffer *vbuf; 1502 struct vpu_rpc_buffer_desc desc; 1503 u32 free_space; 1504 int ret; 1505 1506 vbuf = to_vb2_v4l2_buffer(vb); 1507 dev_dbg(inst->dev, "[%d] dec output [%d] %d : %ld\n", 1508 inst->id, vbuf->sequence, vb->index, vb2_get_plane_payload(vb, 0)); 1509 1510 if (inst->state == VPU_CODEC_STATE_DEINIT) 1511 return -EINVAL; 1512 if (vdec->reset_codec) 1513 return -EINVAL; 1514 1515 if (inst->state == VPU_CODEC_STATE_STARTED) 1516 vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0); 1517 1518 ret = vpu_iface_get_stream_buffer_desc(inst, &desc); 1519 if (ret) 1520 return ret; 1521 1522 free_space = vpu_helper_get_free_space(inst); 1523 if (free_space < vb2_get_plane_payload(vb, 0) + 0x40000) 1524 return -ENOMEM; 1525 1526 vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE); 1527 ret = vpu_iface_input_frame(inst, vb); 1528 if (ret < 0) 1529 return -ENOMEM; 1530 1531 dev_dbg(inst->dev, "[%d][INPUT TS]%32lld\n", inst->id, vb->timestamp); 1532 vdec->params.frame_count++; 1533 1534 if (vdec->drain) 1535 vdec_drain(inst); 1536 1537 return 0; 1538 } 1539 1540 static int vdec_process_capture(struct vpu_inst *inst, struct vb2_buffer *vb) 1541 { 1542 struct vdec_t *vdec = inst->priv; 1543 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 1544 int ret; 1545 1546 if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) 1547 return -EINVAL; 1548 if (vdec->reset_codec) 1549 return -EINVAL; 1550 1551 ret = vdec_response_frame(inst, vbuf); 1552 if (ret) 1553 return ret; 1554 v4l2_m2m_dst_buf_remove_by_buf(inst->fh.m2m_ctx, vbuf); 1555 return 0; 1556 } 1557 1558 static void vdec_on_queue_empty(struct vpu_inst *inst, u32 type) 1559 { 1560 struct vdec_t *vdec = inst->priv; 1561 1562 if (V4L2_TYPE_IS_OUTPUT(type)) 1563 return; 1564 1565 vdec_handle_resolution_change(inst); 1566 if (vdec->eos_received) 1567 vdec_set_last_buffer_dequeued(inst); 1568 } 1569 1570 static void vdec_abort(struct vpu_inst *inst) 1571 { 1572 struct vdec_t *vdec = inst->priv; 1573 struct vpu_rpc_buffer_desc desc; 1574 int ret; 1575 1576 vpu_trace(inst->dev, "[%d] state = %s\n", inst->id, vpu_codec_state_name(inst->state)); 1577 1578 vdec->aborting = true; 1579 vpu_iface_add_scode(inst, SCODE_PADDING_ABORT); 1580 vdec->params.end_flag = 1; 1581 vpu_iface_set_decode_params(inst, &vdec->params, 1); 1582 1583 vpu_session_abort(inst); 1584 1585 ret = vpu_iface_get_stream_buffer_desc(inst, &desc); 1586 if (!ret) 1587 vpu_iface_update_stream_buffer(inst, desc.rptr, 1); 1588 1589 vpu_session_rst_buf(inst); 1590 vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n", 1591 inst->id, 1592 vdec->params.frame_count, 1593 vdec->decoded_frame_count, 1594 vdec->display_frame_count, 1595 vdec->sequence); 1596 if (!vdec->seq_hdr_found) 1597 vdec->reset_codec = true; 1598 vdec->params.end_flag = 0; 1599 vdec->drain = 0; 1600 vdec->params.frame_count = 0; 1601 vdec->decoded_frame_count = 0; 1602 vdec->display_frame_count = 0; 1603 vdec->sequence = 0; 1604 vdec->aborting = false; 1605 inst->extra_size = 0; 1606 } 1607 1608 static void vdec_stop(struct vpu_inst *inst, bool free) 1609 { 1610 struct vdec_t *vdec = inst->priv; 1611 1612 vdec_clear_slots(inst); 1613 if (inst->state != VPU_CODEC_STATE_DEINIT) 1614 vpu_session_stop(inst); 1615 vdec_clear_fs(&vdec->mbi); 1616 vdec_clear_fs(&vdec->dcp); 1617 if (free) { 1618 vpu_free_dma(&vdec->udata); 1619 vpu_free_dma(&inst->stream_buffer); 1620 } 1621 vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 1); 1622 vdec->reset_codec = false; 1623 } 1624 1625 static void vdec_release(struct vpu_inst *inst) 1626 { 1627 if (inst->id != VPU_INST_NULL_ID) 1628 vpu_trace(inst->dev, "[%d]\n", inst->id); 1629 vdec_stop(inst, true); 1630 } 1631 1632 static void vdec_cleanup(struct vpu_inst *inst) 1633 { 1634 struct vdec_t *vdec; 1635 1636 if (!inst) 1637 return; 1638 1639 vdec = inst->priv; 1640 if (vdec) { 1641 kfree(vdec->slots); 1642 vdec->slots = NULL; 1643 vdec->slot_count = 0; 1644 } 1645 vfree(vdec); 1646 inst->priv = NULL; 1647 vfree(inst); 1648 } 1649 1650 static void vdec_init_params(struct vdec_t *vdec) 1651 { 1652 vdec->params.frame_count = 0; 1653 vdec->params.end_flag = 0; 1654 } 1655 1656 static int vdec_start(struct vpu_inst *inst) 1657 { 1658 struct vdec_t *vdec = inst->priv; 1659 int stream_buffer_size; 1660 int ret; 1661 1662 if (inst->state != VPU_CODEC_STATE_DEINIT) 1663 return 0; 1664 1665 vpu_trace(inst->dev, "[%d]\n", inst->id); 1666 if (!vdec->udata.virt) { 1667 vdec->udata.length = 0x1000; 1668 ret = vpu_alloc_dma(inst->core, &vdec->udata); 1669 if (ret) { 1670 dev_err(inst->dev, "[%d] alloc udata fail\n", inst->id); 1671 goto error; 1672 } 1673 } 1674 1675 if (!inst->stream_buffer.virt) { 1676 stream_buffer_size = vpu_iface_get_stream_buffer_size(inst->core); 1677 if (stream_buffer_size > 0) { 1678 inst->stream_buffer.length = stream_buffer_size; 1679 ret = vpu_alloc_dma(inst->core, &inst->stream_buffer); 1680 if (ret) { 1681 dev_err(inst->dev, "[%d] alloc stream buffer fail\n", inst->id); 1682 goto error; 1683 } 1684 inst->use_stream_buffer = true; 1685 } 1686 } 1687 1688 if (inst->use_stream_buffer) 1689 vpu_iface_config_stream_buffer(inst, &inst->stream_buffer); 1690 vpu_iface_init_instance(inst); 1691 vdec->params.udata.base = vdec->udata.phys; 1692 vdec->params.udata.size = vdec->udata.length; 1693 ret = vpu_iface_set_decode_params(inst, &vdec->params, 0); 1694 if (ret) { 1695 dev_err(inst->dev, "[%d] set decode params fail\n", inst->id); 1696 goto error; 1697 } 1698 1699 vdec_init_params(vdec); 1700 ret = vpu_session_start(inst); 1701 if (ret) { 1702 dev_err(inst->dev, "[%d] start fail\n", inst->id); 1703 goto error; 1704 } 1705 1706 vdec_update_state(inst, VPU_CODEC_STATE_STARTED, 0); 1707 1708 return 0; 1709 error: 1710 vpu_free_dma(&vdec->udata); 1711 vpu_free_dma(&inst->stream_buffer); 1712 return ret; 1713 } 1714 1715 static int vdec_start_session(struct vpu_inst *inst, u32 type) 1716 { 1717 struct vdec_t *vdec = inst->priv; 1718 int ret = 0; 1719 1720 if (V4L2_TYPE_IS_OUTPUT(type)) { 1721 if (vdec->reset_codec) 1722 vdec_stop(inst, false); 1723 if (inst->state == VPU_CODEC_STATE_DEINIT) { 1724 ret = vdec_start(inst); 1725 if (ret) 1726 return ret; 1727 } 1728 } 1729 1730 if (V4L2_TYPE_IS_OUTPUT(type)) { 1731 vdec_update_state(inst, vdec->state, 1); 1732 vdec->eos_received = 0; 1733 vpu_process_output_buffer(inst); 1734 } else { 1735 vdec_cmd_start(inst); 1736 } 1737 if (inst->state == VPU_CODEC_STATE_ACTIVE) 1738 vdec_response_fs_request(inst, false); 1739 1740 return ret; 1741 } 1742 1743 static int vdec_stop_session(struct vpu_inst *inst, u32 type) 1744 { 1745 struct vdec_t *vdec = inst->priv; 1746 1747 if (inst->state == VPU_CODEC_STATE_DEINIT) 1748 return 0; 1749 1750 if (V4L2_TYPE_IS_OUTPUT(type)) { 1751 vdec_update_state(inst, VPU_CODEC_STATE_SEEK, 0); 1752 vdec->drain = 0; 1753 vdec_abort(inst); 1754 } else { 1755 if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) { 1756 if (vb2_is_streaming(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx))) 1757 vdec_abort(inst); 1758 vdec->eos_received = 0; 1759 } 1760 vdec_clear_slots(inst); 1761 } 1762 1763 return 0; 1764 } 1765 1766 static int vdec_get_slot_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i) 1767 { 1768 struct vdec_t *vdec = inst->priv; 1769 struct vpu_vb2_buffer *vpu_buf; 1770 int num = -1; 1771 1772 vpu_inst_lock(inst); 1773 if (i >= vdec->slot_count || !vdec->slots[i].addr) 1774 goto exit; 1775 1776 vpu_buf = vdec->slots[i].curr; 1777 1778 num = scnprintf(str, size, "slot[%2d] :", i); 1779 if (vpu_buf) { 1780 num += scnprintf(str + num, size - num, " %2d", 1781 vpu_buf->m2m_buf.vb.vb2_buf.index); 1782 num += scnprintf(str + num, size - num, "; state = %d", vdec->slots[i].state); 1783 } else { 1784 num += scnprintf(str + num, size - num, " -1"); 1785 } 1786 1787 if (vdec->slots[i].pend) 1788 num += scnprintf(str + num, size - num, "; %d", 1789 vdec->slots[i].pend->m2m_buf.vb.vb2_buf.index); 1790 1791 num += scnprintf(str + num, size - num, "\n"); 1792 exit: 1793 vpu_inst_unlock(inst); 1794 1795 return num; 1796 } 1797 1798 static int vdec_get_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i) 1799 { 1800 struct vdec_t *vdec = inst->priv; 1801 int num; 1802 1803 switch (i) { 1804 case 0: 1805 num = scnprintf(str, size, 1806 "req_frame_count = %d\ninterlaced = %d\n", 1807 vdec->req_frame_count, 1808 vdec->codec_info.progressive ? 0 : 1); 1809 break; 1810 case 1: 1811 num = scnprintf(str, size, 1812 "mbi: size = 0x%x request = %d, alloc = %d, response = %d\n", 1813 vdec->mbi.size, 1814 vdec->mbi.req_count, 1815 vdec->mbi.count, 1816 vdec->mbi.index); 1817 break; 1818 case 2: 1819 num = scnprintf(str, size, 1820 "dcp: size = 0x%x request = %d, alloc = %d, response = %d\n", 1821 vdec->dcp.size, 1822 vdec->dcp.req_count, 1823 vdec->dcp.count, 1824 vdec->dcp.index); 1825 break; 1826 case 3: 1827 num = scnprintf(str, size, "input_frame_count = %d\n", vdec->params.frame_count); 1828 break; 1829 case 4: 1830 num = scnprintf(str, size, "decoded_frame_count = %d\n", vdec->decoded_frame_count); 1831 break; 1832 case 5: 1833 num = scnprintf(str, size, "display_frame_count = %d\n", vdec->display_frame_count); 1834 break; 1835 case 6: 1836 num = scnprintf(str, size, "sequence = %d\n", vdec->sequence); 1837 break; 1838 case 7: 1839 num = scnprintf(str, size, "drain = %d, eos = %d, source_change = %d\n", 1840 vdec->drain, vdec->eos_received, vdec->source_change); 1841 break; 1842 case 8: 1843 num = scnprintf(str, size, "fps = %d/%d\n", 1844 vdec->codec_info.frame_rate.numerator, 1845 vdec->codec_info.frame_rate.denominator); 1846 break; 1847 case 9: 1848 num = scnprintf(str, size, "colorspace: %d, %d, %d, %d (%d)\n", 1849 vdec->codec_info.color_primaries, 1850 vdec->codec_info.transfer_chars, 1851 vdec->codec_info.matrix_coeffs, 1852 vdec->codec_info.full_range, 1853 vdec->codec_info.vui_present); 1854 break; 1855 default: 1856 num = vdec_get_slot_debug_info(inst, str, size, i - 10); 1857 break; 1858 } 1859 1860 return num; 1861 } 1862 1863 static struct vpu_inst_ops vdec_inst_ops = { 1864 .ctrl_init = vdec_ctrl_init, 1865 .check_ready = vdec_check_ready, 1866 .buf_done = vdec_buf_done, 1867 .get_one_frame = vdec_frame_decoded, 1868 .stop_done = vdec_stop_done, 1869 .event_notify = vdec_event_notify, 1870 .release = vdec_release, 1871 .cleanup = vdec_cleanup, 1872 .start = vdec_start_session, 1873 .stop = vdec_stop_session, 1874 .process_output = vdec_process_output, 1875 .process_capture = vdec_process_capture, 1876 .on_queue_empty = vdec_on_queue_empty, 1877 .get_debug_info = vdec_get_debug_info, 1878 .wait_prepare = vpu_inst_unlock, 1879 .wait_finish = vpu_inst_lock, 1880 .attach_frame_store = vdec_attach_frame_store, 1881 .reset_frame_store = vdec_reset_frame_store, 1882 }; 1883 1884 static void vdec_init(struct file *file) 1885 { 1886 struct vpu_inst *inst = to_inst(file); 1887 struct v4l2_format f; 1888 1889 memset(&f, 0, sizeof(f)); 1890 f.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; 1891 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264; 1892 f.fmt.pix_mp.width = 1280; 1893 f.fmt.pix_mp.height = 720; 1894 f.fmt.pix_mp.field = V4L2_FIELD_NONE; 1895 vdec_s_fmt(file, &inst->fh, &f); 1896 1897 memset(&f, 0, sizeof(f)); 1898 f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; 1899 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M_8L128; 1900 f.fmt.pix_mp.width = 1280; 1901 f.fmt.pix_mp.height = 720; 1902 f.fmt.pix_mp.field = V4L2_FIELD_NONE; 1903 vdec_s_fmt(file, &inst->fh, &f); 1904 } 1905 1906 static int vdec_open(struct file *file) 1907 { 1908 struct vpu_inst *inst; 1909 struct vdec_t *vdec; 1910 int ret; 1911 1912 inst = vzalloc(sizeof(*inst)); 1913 if (!inst) 1914 return -ENOMEM; 1915 1916 vdec = vzalloc(sizeof(*vdec)); 1917 if (!vdec) { 1918 vfree(inst); 1919 return -ENOMEM; 1920 } 1921 1922 vdec->slots = kmalloc_array(VDEC_SLOT_CNT_DFT, 1923 sizeof(*vdec->slots), 1924 GFP_KERNEL | __GFP_ZERO); 1925 if (!vdec->slots) { 1926 vfree(vdec); 1927 vfree(inst); 1928 return -ENOMEM; 1929 } 1930 vdec->slot_count = VDEC_SLOT_CNT_DFT; 1931 1932 inst->ops = &vdec_inst_ops; 1933 inst->formats = vdec_formats; 1934 inst->type = VPU_CORE_TYPE_DEC; 1935 inst->priv = vdec; 1936 1937 ret = vpu_v4l2_open(file, inst); 1938 if (ret) 1939 return ret; 1940 1941 vdec->fixed_fmt = false; 1942 vdec->state = VPU_CODEC_STATE_ACTIVE; 1943 inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP; 1944 inst->min_buffer_out = VDEC_MIN_BUFFER_OUT; 1945 vdec_init(file); 1946 1947 return 0; 1948 } 1949 1950 static const struct v4l2_file_operations vdec_fops = { 1951 .owner = THIS_MODULE, 1952 .open = vdec_open, 1953 .release = vpu_v4l2_close, 1954 .unlocked_ioctl = video_ioctl2, 1955 .poll = v4l2_m2m_fop_poll, 1956 .mmap = v4l2_m2m_fop_mmap, 1957 }; 1958 1959 const struct v4l2_ioctl_ops *vdec_get_ioctl_ops(void) 1960 { 1961 return &vdec_ioctl_ops; 1962 } 1963 1964 const struct v4l2_file_operations *vdec_get_fops(void) 1965 { 1966 return &vdec_fops; 1967 } 1968