1*c1f3caffSMauro Carvalho Chehab /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*c1f3caffSMauro Carvalho Chehab /* 3*c1f3caffSMauro Carvalho Chehab * Copyright (C) 2020 BayLibre, SAS 4*c1f3caffSMauro Carvalho Chehab * Author: Neil Armstrong <narmstrong@baylibre.com> 5*c1f3caffSMauro Carvalho Chehab * Copyright (C) 2017 Amlogic, Inc. All rights reserved. 6*c1f3caffSMauro Carvalho Chehab */ 7*c1f3caffSMauro Carvalho Chehab 8*c1f3caffSMauro Carvalho Chehab #ifndef __GE2D_REGS__ 9*c1f3caffSMauro Carvalho Chehab #define __GE2D_REGS__ 10*c1f3caffSMauro Carvalho Chehab 11*c1f3caffSMauro Carvalho Chehab /* Registers starts at (GE2D_REG(0x8a0 * 4) */ 12*c1f3caffSMauro Carvalho Chehab #define GE2D_REG(x) ((0x8a0 + (x)) * 4) 13*c1f3caffSMauro Carvalho Chehab 14*c1f3caffSMauro Carvalho Chehab #define GE2D_GEN_CTRL0 GE2D_REG(0x00) 15*c1f3caffSMauro Carvalho Chehab 16*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_BYTEMASK_ONLY BIT(31) 17*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_BITMASK_EN BIT(30) 18*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_KEY_EN BIT(29) 19*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_KEY_MODE BIT(28) 20*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_KEY_EN BIT(27) 21*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_KEY_MODE BIT(26) 22*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_8B_MODE_SEL GENMASK(25, 24) 23*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_CLIP_MODE BIT(23) 24*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_8B_MODE_SEL GENMASK(16, 15) 25*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_FILL_MODE BIT(14) 26*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_PIC_STRUCT GENMASK(13, 12) 27*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_X_YC_RATIO BIT(11) 28*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_8B_MODE_SEL GENMASK(6, 5) 29*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_FILL_MODE BIT(4) 30*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_LUT_EN BIT(3) 31*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_PIC_STRUCT GENMASK(2, 1) 32*c1f3caffSMauro Carvalho Chehab 33*c1f3caffSMauro Carvalho Chehab #define GE2D_GEN_CTRL1 GE2D_REG(0x01) 34*c1f3caffSMauro Carvalho Chehab 35*c1f3caffSMauro Carvalho Chehab #define GE2D_SOFT_RST BIT(31) 36*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_WRITE_RESP_CNT_RST BIT(30) 37*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_WRITE_RESP_CNT_ADD_DIS BIT(29) 38*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_CONVERSION_MODE1 BIT(26) 39*c1f3caffSMauro Carvalho Chehab #define GE2D_INTERRUPT_CTRL GENMASK(25, 24) 40*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_BURST_SIZE_CTRL GENMASK(23, 22) 41*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_BURST_SIZE_CTRL GENMASK(21, 16) 42*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_PIC_STRUCT GENMASK(15, 14) 43*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC_RD_CTRL GENMASK(13, 12) 44*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_URGENT_EN BIT(11) 45*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_URGENT_EN BIT(10) 46*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_URGENT_EN BIT(9) 47*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_URGENT_EN BIT(8) 48*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_GB_ALPHA GENMASK(7, 0) 49*c1f3caffSMauro Carvalho Chehab 50*c1f3caffSMauro Carvalho Chehab #define GE2D_GEN_CTRL2 GE2D_REG(0x02) 51*c1f3caffSMauro Carvalho Chehab 52*c1f3caffSMauro Carvalho Chehab #define GE2D_ALPHA_CONVERSION_MODE0 BIT(31) 53*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_CONVERSION_MODE0 BIT(30) 54*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_GB_ALPHA_EN BIT(29) 55*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_COLOR_ROUND_MODE BIT(28) 56*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_COLOR_EXPAND_MODE BIT(27) 57*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_ALPHA_EXPAND_MODE BIT(26) 58*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_COLOR_EXPAND_MODE BIT(25) 59*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_ALPHA_EXPAND_MODE BIT(24) 60*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_LITTLE_ENDIAN BIT(23) 61*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_COLOR_MAP GENMASK(22, 19) 62*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_MULT_MODE BIT(18) 63*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_FORMAT GENMASK(17, 16) 64*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_LITTLE_ENDIAN BIT(15) 65*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_COLOR_MAP GENMASK(14, 11) 66*c1f3caffSMauro Carvalho Chehab #define GE2D_ALPHA_CONVERSION_MODE1 BIT(10) 67*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_FORMAT GENMASK(9, 8) 68*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_LITTLE_ENDIAN BIT(7) 69*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_COLOR_MAP GENMASK(6, 3) 70*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_DEEPCOLOR BIT(2) 71*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_FORMAT GENMASK(1, 0) 72*c1f3caffSMauro Carvalho Chehab 73*c1f3caffSMauro Carvalho Chehab #define GE2D_FORMAT_8BIT 0 74*c1f3caffSMauro Carvalho Chehab #define GE2D_FORMAT_16BIT 1 75*c1f3caffSMauro Carvalho Chehab #define GE2D_FORMAT_24BIT 2 76*c1f3caffSMauro Carvalho Chehab #define GE2D_FORMAT_32BIT 3 77*c1f3caffSMauro Carvalho Chehab 78*c1f3caffSMauro Carvalho Chehab /* 16 bit */ 79*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUV422 0 80*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGB655 1 81*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUV655 1 82*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGB844 2 83*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUV844 2 84*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGBA6442 3 85*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUVA6442 3 86*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGBA4444 4 87*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUVA4444 4 88*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGB565 5 89*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUV565 5 90*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_ARGB4444 6 91*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_AYUV4444 6 92*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_ARGB1555 7 93*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_AYUV1555 7 94*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGBA4642 8 95*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUVA4642 8 96*c1f3caffSMauro Carvalho Chehab 97*c1f3caffSMauro Carvalho Chehab /* 24 bit */ 98*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGB888 0 99*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUV444 0 100*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGBA5658 1 101*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUVA5658 1 102*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_ARGB8565 2 103*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_AYUV8565 2 104*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGBA6666 3 105*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUVA6666 3 106*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_ARGB6666 4 107*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_AYUV6666 4 108*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_BGR888 5 109*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_VUY888 5 110*c1f3caffSMauro Carvalho Chehab 111*c1f3caffSMauro Carvalho Chehab /* 32 bit */ 112*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_RGBA8888 0 113*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_YUVA8888 0 114*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_ARGB8888 1 115*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_AYUV8888 1 116*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_ABGR8888 2 117*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_AVUY8888 2 118*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_BGRA8888 3 119*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_MAP_VUYA8888 3 120*c1f3caffSMauro Carvalho Chehab 121*c1f3caffSMauro Carvalho Chehab #define GE2D_CMD_CTRL GE2D_REG(0x03) 122*c1f3caffSMauro Carvalho Chehab 123*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_FILL_COLOR_EN BIT(9) 124*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_FILL_COLOR_EN BIT(8) 125*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_XY_SWAP BIT(7) 126*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_X_REV BIT(6) 127*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_Y_REV BIT(5) 128*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_X_REV BIT(4) 129*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_Y_REV BIT(3) 130*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_X_REV BIT(2) 131*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_Y_REV BIT(1) 132*c1f3caffSMauro Carvalho Chehab #define GE2D_CBUS_CMD_WR BIT(0) 133*c1f3caffSMauro Carvalho Chehab 134*c1f3caffSMauro Carvalho Chehab #define GE2D_STATUS0 GE2D_REG(0x04) 135*c1f3caffSMauro Carvalho Chehab 136*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_WRITE_RSP_CNT GENMASK(28, 17) 137*c1f3caffSMauro Carvalho Chehab #define GE2D_DP_STATUS GENMASK(16, 7) 138*c1f3caffSMauro Carvalho Chehab #define GE2D_R1CMD_RDY BIT(6) 139*c1f3caffSMauro Carvalho Chehab #define GE2D_R2CMD_RDY BIT(5) 140*c1f3caffSMauro Carvalho Chehab #define GE2D_PDPCMD_VALID BIT(4) 141*c1f3caffSMauro Carvalho Chehab #define GE2D_DPCMD_RDY BIT(3) 142*c1f3caffSMauro Carvalho Chehab #define GE2D_BUF_CMD_VALID BIT(2) 143*c1f3caffSMauro Carvalho Chehab #define GE2D_CURR_CMD_VALID BIT(1) 144*c1f3caffSMauro Carvalho Chehab #define GE2D_GE2D_BUSY BIT(0) 145*c1f3caffSMauro Carvalho Chehab 146*c1f3caffSMauro Carvalho Chehab #define GE2D_STATUS1 GE2D_REG(0x05) 147*c1f3caffSMauro Carvalho Chehab 148*c1f3caffSMauro Carvalho Chehab #define GE2D_WR_DST1_STATUS GENMASK(29, 16) 149*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC2_FIFO_EMPTY BIT(15) 150*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC2_FIFO_OVERFLOW BIT(14) 151*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC2_STATE_Y GENMASK(13, 12) 152*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC2_WIN_ERR BIT(11) 153*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC2_CMD_BUSY BIT(10) 154*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_FIFO_EMPTY BIT(9) 155*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_FIFO_OVERFLOW BIT(8) 156*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_STATE_CR GENMASK(7, 6) 157*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_STATE_CB GENMASK(5, 4) 158*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_STATE_Y GENMASK(3, 2) 159*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_WIN_ERR BIT(1) 160*c1f3caffSMauro Carvalho Chehab #define GE2D_RD_SRC1_CMD_BUSY BIT(0) 161*c1f3caffSMauro Carvalho Chehab 162*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_DEF_COLOR GE2D_REG(0x06) 163*c1f3caffSMauro Carvalho Chehab 164*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_R_Y GENMASK(31, 24) 165*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_B_CB GENMASK(23, 16) 166*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_B_CR GENMASK(15, 8) 167*c1f3caffSMauro Carvalho Chehab #define GE2D_COLOR_ALPHA GENMASK(7, 0) 168*c1f3caffSMauro Carvalho Chehab 169*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_CLIPX_START_END GE2D_REG(0x07) 170*c1f3caffSMauro Carvalho Chehab 171*c1f3caffSMauro Carvalho Chehab #define GE2D_START_EXTRA BIT(31) /* For GE2D_SRC1_CLIPX/Y_START_END */ 172*c1f3caffSMauro Carvalho Chehab #define GE2D_START_EXTRA0 BIT(30) /* For GE2D_SRC1_X/Y_START_END */ 173*c1f3caffSMauro Carvalho Chehab #define GE2D_START GENMASK(28, 16) 174*c1f3caffSMauro Carvalho Chehab #define GE2D_END_EXTRA BIT(15) /* For GE2D_SRC1_CLIPX/Y_START_END */ 175*c1f3caffSMauro Carvalho Chehab #define GE2D_END_EXTRA0 BIT(14) /* For GE2D_SRC1_X/Y_START_END */ 176*c1f3caffSMauro Carvalho Chehab #define GE2D_END GENMASK(12, 0) 177*c1f3caffSMauro Carvalho Chehab 178*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_CLIPY_START_END GE2D_REG(0x08) 179*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_CANVAS GE2D_REG(0x09) 180*c1f3caffSMauro Carvalho Chehab 181*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_CANVAS_ADDR GENMASK(31, 24) 182*c1f3caffSMauro Carvalho Chehab 183*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_X_START_END GE2D_REG(0x0a) 184*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_Y_START_END GE2D_REG(0x0b) 185*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_LUT_ADDR GE2D_REG(0x0c) 186*c1f3caffSMauro Carvalho Chehab 187*c1f3caffSMauro Carvalho Chehab #define GE2D_LUT_READ BIT(8) 188*c1f3caffSMauro Carvalho Chehab #define GE2D_LUT_ADDR GENMASK(7, 0) 189*c1f3caffSMauro Carvalho Chehab 190*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_LUT_DAT GE2D_REG(0x0d) 191*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_FMT_CTRL GE2D_REG(0x0e) 192*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_DEF_COLOR GE2D_REG(0x0f) 193*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_CLIPX_START_END GE2D_REG(0x10) 194*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_CLIPY_START_END GE2D_REG(0x11) 195*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_X_START_END GE2D_REG(0x12) 196*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_Y_START_END GE2D_REG(0x13) 197*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_CLIPX_START_END GE2D_REG(0x14) 198*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_CLIPY_START_END GE2D_REG(0x15) 199*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_X_START_END GE2D_REG(0x16) 200*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_Y_START_END GE2D_REG(0x17) 201*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_DST_CANVAS GE2D_REG(0x18) 202*c1f3caffSMauro Carvalho Chehab 203*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_CANVAS_ADDR GENMASK(23, 16) 204*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_CANVAS_ADDR GENMASK(15, 8) 205*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_CANVAS_ADDR GENMASK(7, 0) 206*c1f3caffSMauro Carvalho Chehab 207*c1f3caffSMauro Carvalho Chehab #define GE2D_VSC_START_PHASE_STEP GE2D_REG(0x19) 208*c1f3caffSMauro Carvalho Chehab #define GE2D_VSC_PHASE_SLOPE GE2D_REG(0x1a) 209*c1f3caffSMauro Carvalho Chehab #define GE2D_VSC_INI_CTRL GE2D_REG(0x1b) 210*c1f3caffSMauro Carvalho Chehab #define GE2D_HSC_START_PHASE_STEP GE2D_REG(0x1c) 211*c1f3caffSMauro Carvalho Chehab #define GE2D_HSC_PHASE_SLOPE GE2D_REG(0x1d) 212*c1f3caffSMauro Carvalho Chehab #define GE2D_HSC_INI_CTRL GE2D_REG(0x1e) 213*c1f3caffSMauro Carvalho Chehab #define GE2D_HSC_ADV_CTRL GE2D_REG(0x1f) 214*c1f3caffSMauro Carvalho Chehab #define GE2D_SC_MISC_CTRL GE2D_REG(0x20) 215*c1f3caffSMauro Carvalho Chehab #define GE2D_VSC_NRND_POINT GE2D_REG(0x21) 216*c1f3caffSMauro Carvalho Chehab #define GE2D_VSC_NRND_PHASE GE2D_REG(0x22) 217*c1f3caffSMauro Carvalho Chehab #define GE2D_HSC_NRND_POINT GE2D_REG(0x23) 218*c1f3caffSMauro Carvalho Chehab #define GE2D_HSC_NRND_PHASE GE2D_REG(0x24) 219*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_PRE_OFFSET GE2D_REG(0x25) 220*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_COEF00_01 GE2D_REG(0x26) 221*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_COEF02_10 GE2D_REG(0x27) 222*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_COEF11_12 GE2D_REG(0x28) 223*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_COEF20_21 GE2D_REG(0x29) 224*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_COEF22_CTRL GE2D_REG(0x2a) 225*c1f3caffSMauro Carvalho Chehab #define GE2D_MATRIX_OFFSET GE2D_REG(0x2b) 226*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_OP_CTRL GE2D_REG(0x2c) 227*c1f3caffSMauro Carvalho Chehab 228*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_COLOR_MULT_ALPHA_SEL GENMASK(26, 25) 229*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_COLOR_MULT_ALPHA_SEL BIT(24) 230*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_BLEND_MODE GENMASK(22, 20) 231*c1f3caffSMauro Carvalho Chehab 232*c1f3caffSMauro Carvalho Chehab #define OPERATION_ADD 0 /* Cd = Cs*Fs+Cd*Fd */ 233*c1f3caffSMauro Carvalho Chehab #define OPERATION_SUB 1 /* Cd = Cs*Fs-Cd*Fd */ 234*c1f3caffSMauro Carvalho Chehab #define OPERATION_REVERSE_SUB 2 /* Cd = Cd*Fd-Cs*Fs */ 235*c1f3caffSMauro Carvalho Chehab #define OPERATION_MIN 3 /* Cd = Min(Cd*Fd,Cs*Fs) */ 236*c1f3caffSMauro Carvalho Chehab #define OPERATION_MAX 4 /* Cd = Max(Cd*Fd,Cs*Fs) */ 237*c1f3caffSMauro Carvalho Chehab #define OPERATION_LOGIC 5 238*c1f3caffSMauro Carvalho Chehab 239*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_SRC_COLOR_BLEND_FACTOR GENMASK(19, 16) 240*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_DST_COLOR_BLEND_FACTOR GENMASK(15, 12) 241*c1f3caffSMauro Carvalho Chehab 242*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ZERO 0 243*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE 1 244*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_SRC_COLOR 2 245*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE_MINUS_SRC_COLOR 3 246*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_DST_COLOR 4 247*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE_MINUS_DST_COLOR 5 248*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_SRC_ALPHA 6 249*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE_MINUS_SRC_ALPHA 7 250*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_DST_ALPHA 8 251*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE_MINUS_DST_ALPHA 9 252*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_CONST_COLOR 10 253*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE_MINUS_CONST_COLOR 11 254*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_CONST_ALPHA 12 255*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_ONE_MINUS_CONST_ALPHA 13 256*c1f3caffSMauro Carvalho Chehab #define COLOR_FACTOR_SRC_ALPHA_SATURATE 14 257*c1f3caffSMauro Carvalho Chehab 258*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_OPERATION_LOGIC GENMASK(15, 12) 259*c1f3caffSMauro Carvalho Chehab 260*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_CLEAR 0 261*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_COPY 1 262*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_NOOP 2 263*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_SET 3 264*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_COPY_INVERT 4 265*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_INVERT 5 266*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_AND_REVERSE 6 267*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_OR_REVERSE 7 268*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_AND 8 269*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_OR 9 270*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_NAND 10 271*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_NOR 11 272*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_XOR 12 273*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_EQUIV 13 274*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_AND_INVERT 14 275*c1f3caffSMauro Carvalho Chehab #define LOGIC_OPERATION_OR_INVERT 15 276*c1f3caffSMauro Carvalho Chehab 277*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_ALPHA_BLEND_MODE GENMASK(10, 8) 278*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_SRC_ALPHA_BLEND_FACTOR GENMASK(7, 4) 279*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_DST_ALPHA_BLEND_FACTOR GENMASK(3, 0) 280*c1f3caffSMauro Carvalho Chehab 281*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_ZERO 0 282*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_ONE 1 283*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_SRC_ALPHA 2 284*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_ONE_MINUS_SRC_ALPHA 3 285*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_DST_ALPHA 4 286*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_ONE_MINUS_DST_ALPHA 5 287*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_CONST_ALPHA 6 288*c1f3caffSMauro Carvalho Chehab #define ALPHA_FACTOR_ONE_MINUS_CONST_ALPHA 7 289*c1f3caffSMauro Carvalho Chehab 290*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_ALPHA_OPERATION_LOGIC GENMASK(3, 0) 291*c1f3caffSMauro Carvalho Chehab 292*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_COLOR_OP(__op, __src_factor, __dst_factor) \ 293*c1f3caffSMauro Carvalho Chehab (FIELD_PREP(GE2D_ALU_BLEND_MODE, __op) | \ 294*c1f3caffSMauro Carvalho Chehab FIELD_PREP(GE2D_ALU_SRC_COLOR_BLEND_FACTOR, __src_factor) | \ 295*c1f3caffSMauro Carvalho Chehab FIELD_PREP(GE2D_ALU_DST_COLOR_BLEND_FACTOR, __dst_factor)) 296*c1f3caffSMauro Carvalho Chehab 297*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_DO_COLOR_OPERATION_LOGIC(__op, __src_factor) \ 298*c1f3caffSMauro Carvalho Chehab GE2D_ALU_COLOR_OP(OPERATION_LOGIC, __src_factor, __op) 299*c1f3caffSMauro Carvalho Chehab 300*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_ALPHA_OP(__op, __src_factor, __dst_factor) \ 301*c1f3caffSMauro Carvalho Chehab (FIELD_PREP(GE2D_ALU_ALPHA_BLEND_MODE, __op) | \ 302*c1f3caffSMauro Carvalho Chehab FIELD_PREP(GE2D_ALU_SRC_ALPHA_BLEND_FACTOR, __src_factor) | \ 303*c1f3caffSMauro Carvalho Chehab FIELD_PREP(GE2D_ALU_DST_ALPHA_BLEND_FACTOR, __dst_factor)) 304*c1f3caffSMauro Carvalho Chehab 305*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_DO_ALPHA_OPERATION_LOGIC(__op, __src_factor) \ 306*c1f3caffSMauro Carvalho Chehab GE2D_ALU_ALPHA_OP(OPERATION_LOGIC, __src_factor, __op) 307*c1f3caffSMauro Carvalho Chehab 308*c1f3caffSMauro Carvalho Chehab #define GE2D_ALU_CONST_COLOR GE2D_REG(0x2d) 309*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_KEY GE2D_REG(0x2e) 310*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_KEY_MASK GE2D_REG(0x2f) 311*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_KEY GE2D_REG(0x30) 312*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_KEY_MASK GE2D_REG(0x31) 313*c1f3caffSMauro Carvalho Chehab #define GE2D_DST_BITMASK GE2D_REG(0x32) 314*c1f3caffSMauro Carvalho Chehab #define GE2D_DP_ONOFF_CTRL GE2D_REG(0x33) 315*c1f3caffSMauro Carvalho Chehab #define GE2D_SCALE_COEF_IDX GE2D_REG(0x34) 316*c1f3caffSMauro Carvalho Chehab #define GE2D_SCALE_COEF GE2D_REG(0x35) 317*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC_OUTSIDE_ALPHA GE2D_REG(0x36) 318*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_CTRL0 GE2D_REG(0x38) 319*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_CTRL1 GE2D_REG(0x39) 320*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_COLOR_FILT0 GE2D_REG(0x3a) 321*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_COLOR_FILT1 GE2D_REG(0x3b) 322*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_COLOR_FILT2 GE2D_REG(0x3c) 323*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_COLOR_FILT3 GE2D_REG(0x3d) 324*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_ALPHA_FILT0 GE2D_REG(0x3e) 325*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_ALPHA_FILT1 GE2D_REG(0x3f) 326*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_ALPHA_FILT2 GE2D_REG(0x40) 327*c1f3caffSMauro Carvalho Chehab #define GE2D_ANTIFLICK_ALPHA_FILT3 GE2D_REG(0x41) 328*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_RANGE_MAP_Y_CTRL GE2D_REG(0x43) 329*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_RANGE_MAP_CB_CTRL GE2D_REG(0x44) 330*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_RANGE_MAP_CR_CTRL GE2D_REG(0x45) 331*c1f3caffSMauro Carvalho Chehab #define GE2D_ARB_BURST_NUM GE2D_REG(0x46) 332*c1f3caffSMauro Carvalho Chehab #define GE2D_TID_TOKEN GE2D_REG(0x47) 333*c1f3caffSMauro Carvalho Chehab #define GE2D_GEN_CTRL3 GE2D_REG(0x48) 334*c1f3caffSMauro Carvalho Chehab 335*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_BYTEMASK_VAL GENMASK(31, 28) 336*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_PIC_STRUCT GENMASK(27, 26) 337*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_8B_MODE_SEL GENMASK(25, 24) 338*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_COLOR_MAP GENMASK(22, 19) 339*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_FORMAT GENMASK(17, 16) 340*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_COLOR_ROUND_MODE BIT(14) 341*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_X_DISCARD_MODE GENMASK(13, 12) 342*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_Y_DISCARD_MODE GENMASK(11, 10) 343*c1f3caffSMauro Carvalho Chehab #define GE2D_DST2_ENABLE BIT(8) 344*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_X_DISCARD_MODE GENMASK(5, 4) 345*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_Y_DISCARD_MODE GENMASK(3, 2) 346*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_ENABLE BIT(0) 347*c1f3caffSMauro Carvalho Chehab 348*c1f3caffSMauro Carvalho Chehab #define GE2D_STATUS2 GE2D_REG(0x49) 349*c1f3caffSMauro Carvalho Chehab #define GE2D_GEN_CTRL4 GE2D_REG(0x4a) 350*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_BADDR_CTRL GE2D_REG(0x51) 351*c1f3caffSMauro Carvalho Chehab #define GE2D_DST1_STRIDE_CTRL GE2D_REG(0x52) 352*c1f3caffSMauro Carvalho Chehab 353*c1f3caffSMauro Carvalho Chehab #define GE2D_STRIDE_SIZE GENMASK(19, 0) 354*c1f3caffSMauro Carvalho Chehab 355*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_BADDR_CTRL GE2D_REG(0x53) 356*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC1_STRIDE_CTRL GE2D_REG(0x54) 357*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_BADDR_CTRL GE2D_REG(0x55) 358*c1f3caffSMauro Carvalho Chehab #define GE2D_SRC2_STRIDE_CTRL GE2D_REG(0x56) 359*c1f3caffSMauro Carvalho Chehab 360*c1f3caffSMauro Carvalho Chehab #endif /* __GE2D_REGS__ */ 361