1# SPDX-License-Identifier: GPL-2.0-only 2config VIDEO_ALLEGRO_DVT 3 tristate "Allegro DVT Video IP Core" 4 depends on V4L_MEM2MEM_DRIVERS 5 depends on VIDEO_DEV && VIDEO_V4L2 6 depends on ARCH_ZYNQMP || COMPILE_TEST 7 select V4L2_MEM2MEM_DEV 8 select VIDEOBUF2_DMA_CONTIG 9 select REGMAP_MMIO 10 help 11 Support for the encoder video IP core by Allegro DVT. This core is 12 found for example on the Xilinx ZynqMP SoC in the EV family and is 13 called VCU in the reference manual. 14 15 To compile this driver as a module, choose M here: the module 16 will be called allegro. 17