xref: /linux/drivers/media/pci/zoran/zr36016.h (revision b889fcf63cb62e7fdb7816565e28f44dbe4a76a5)
1 /*
2  * Zoran ZR36016 basic configuration functions - header file
3  *
4  * Copyright (C) 2001 Wolfgang Scherr <scherr@net4you.at>
5  *
6  * $Id: zr36016.h,v 1.1.2.3 2003/01/14 21:18:07 rbultje Exp $
7  *
8  * ------------------------------------------------------------------------
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23  *
24  * ------------------------------------------------------------------------
25  */
26 
27 #ifndef ZR36016_H
28 #define ZR36016_H
29 
30 /* data stored for each zoran jpeg codec chip */
31 struct zr36016 {
32 	char name[32];
33 	int num;
34 	/* io datastructure */
35 	struct videocodec *codec;
36 	// coder status
37 	__u8 version;
38 	// actual coder setup
39 	int mode;
40 
41 	__u16 xoff;
42 	__u16 yoff;
43 	__u16 width;
44 	__u16 height;
45 	__u16 xdec;
46 	__u16 ydec;
47 };
48 
49 /* direct  register addresses */
50 #define ZR016_GOSTOP      0x00
51 #define ZR016_MODE        0x01
52 #define ZR016_IADDR       0x02
53 #define ZR016_IDATA       0x03
54 
55 /* indirect  register addresses */
56 #define ZR016I_SETUP1     0x00
57 #define ZR016I_SETUP2     0x01
58 #define ZR016I_NAX_LO     0x02
59 #define ZR016I_NAX_HI     0x03
60 #define ZR016I_PAX_LO     0x04
61 #define ZR016I_PAX_HI     0x05
62 #define ZR016I_NAY_LO     0x06
63 #define ZR016I_NAY_HI     0x07
64 #define ZR016I_PAY_LO     0x08
65 #define ZR016I_PAY_HI     0x09
66 #define ZR016I_NOL_LO     0x0a
67 #define ZR016I_NOL_HI     0x0b
68 
69 /* possible values for mode register */
70 #define ZR016_RGB444_YUV444  0x00
71 #define ZR016_RGB444_YUV422  0x01
72 #define ZR016_RGB444_YUV411  0x02
73 #define ZR016_RGB444_Y400    0x03
74 #define ZR016_RGB444_RGB444  0x04
75 #define ZR016_YUV444_YUV444  0x08
76 #define ZR016_YUV444_YUV422  0x09
77 #define ZR016_YUV444_YUV411  0x0a
78 #define ZR016_YUV444_Y400    0x0b
79 #define ZR016_YUV444_RGB444  0x0c
80 #define ZR016_YUV422_YUV422  0x11
81 #define ZR016_YUV422_YUV411  0x12
82 #define ZR016_YUV422_Y400    0x13
83 #define ZR016_YUV411_YUV411  0x16
84 #define ZR016_YUV411_Y400    0x17
85 #define ZR016_4444_4444      0x19
86 #define ZR016_100_100        0x1b
87 
88 #define ZR016_RGB444         0x00
89 #define ZR016_YUV444         0x20
90 #define ZR016_YUV422         0x40
91 
92 #define ZR016_COMPRESSION    0x80
93 #define ZR016_EXPANSION      0x80
94 
95 /* possible values for setup 1 register */
96 #define ZR016_CKRT           0x80
97 #define ZR016_VERT           0x40
98 #define ZR016_HORZ           0x20
99 #define ZR016_HRFL           0x10
100 #define ZR016_DSFL           0x08
101 #define ZR016_SBFL           0x04
102 #define ZR016_RSTR           0x02
103 #define ZR016_CNTI           0x01
104 
105 /* possible values for setup 2 register */
106 #define ZR016_SYEN           0x40
107 #define ZR016_CCIR           0x04
108 #define ZR016_SIGN           0x02
109 #define ZR016_YMCS           0x01
110 
111 #endif				/*fndef ZR36016_H */
112