1*b285192aSMauro Carvalho Chehab /* 2*b285192aSMauro Carvalho Chehab * Driver for the NXP SAA7164 PCIe bridge 3*b285192aSMauro Carvalho Chehab * 4*b285192aSMauro Carvalho Chehab * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com> 5*b285192aSMauro Carvalho Chehab * 6*b285192aSMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify 7*b285192aSMauro Carvalho Chehab * it under the terms of the GNU General Public License as published by 8*b285192aSMauro Carvalho Chehab * the Free Software Foundation; either version 2 of the License, or 9*b285192aSMauro Carvalho Chehab * (at your option) any later version. 10*b285192aSMauro Carvalho Chehab * 11*b285192aSMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 12*b285192aSMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*b285192aSMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*b285192aSMauro Carvalho Chehab * 15*b285192aSMauro Carvalho Chehab * GNU General Public License for more details. 16*b285192aSMauro Carvalho Chehab * 17*b285192aSMauro Carvalho Chehab * You should have received a copy of the GNU General Public License 18*b285192aSMauro Carvalho Chehab * along with this program; if not, write to the Free Software 19*b285192aSMauro Carvalho Chehab * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20*b285192aSMauro Carvalho Chehab */ 21*b285192aSMauro Carvalho Chehab 22*b285192aSMauro Carvalho Chehab /* TODO: Retest the driver with errors expressed as negatives */ 23*b285192aSMauro Carvalho Chehab 24*b285192aSMauro Carvalho Chehab /* Result codes */ 25*b285192aSMauro Carvalho Chehab #define SAA_OK 0 26*b285192aSMauro Carvalho Chehab #define SAA_ERR_BAD_PARAMETER 0x09 27*b285192aSMauro Carvalho Chehab #define SAA_ERR_NO_RESOURCES 0x0c 28*b285192aSMauro Carvalho Chehab #define SAA_ERR_NOT_SUPPORTED 0x13 29*b285192aSMauro Carvalho Chehab #define SAA_ERR_BUSY 0x15 30*b285192aSMauro Carvalho Chehab #define SAA_ERR_READ 0x17 31*b285192aSMauro Carvalho Chehab #define SAA_ERR_TIMEOUT 0x1f 32*b285192aSMauro Carvalho Chehab #define SAA_ERR_OVERFLOW 0x20 33*b285192aSMauro Carvalho Chehab #define SAA_ERR_EMPTY 0x22 34*b285192aSMauro Carvalho Chehab #define SAA_ERR_NOT_STARTED 0x23 35*b285192aSMauro Carvalho Chehab #define SAA_ERR_ALREADY_STARTED 0x24 36*b285192aSMauro Carvalho Chehab #define SAA_ERR_NOT_STOPPED 0x25 37*b285192aSMauro Carvalho Chehab #define SAA_ERR_ALREADY_STOPPED 0x26 38*b285192aSMauro Carvalho Chehab #define SAA_ERR_INVALID_COMMAND 0x3e 39*b285192aSMauro Carvalho Chehab #define SAA_ERR_NULL_PACKET 0x59 40*b285192aSMauro Carvalho Chehab 41*b285192aSMauro Carvalho Chehab /* Errors and flags from the silicon */ 42*b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_UNKNOWN 0x00 43*b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_INVALID_COMMAND 0x01 44*b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_INVALID_CONTROL 0x02 45*b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_INVALID_DATA 0x03 46*b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_TIMEOUT 0x04 47*b285192aSMauro Carvalho Chehab #define PVC_ERRORCODE_NAK 0x05 48*b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_ERROR 0x01 49*b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_OVERFLOW 0x02 50*b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_RESET 0x04 51*b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_INTERFACE 0x08 52*b285192aSMauro Carvalho Chehab #define PVC_RESPONSEFLAG_CONTINUED 0x10 53*b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_INTERRUPT 0x02 54*b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_INTERFACE 0x04 55*b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_SERIALIZE 0x08 56*b285192aSMauro Carvalho Chehab #define PVC_CMDFLAG_CONTINUE 0x10 57*b285192aSMauro Carvalho Chehab 58*b285192aSMauro Carvalho Chehab /* Silicon Commands */ 59*b285192aSMauro Carvalho Chehab #define GET_DESCRIPTORS_CONTROL 0x01 60*b285192aSMauro Carvalho Chehab #define GET_STRING_CONTROL 0x03 61*b285192aSMauro Carvalho Chehab #define GET_LANGUAGE_CONTROL 0x05 62*b285192aSMauro Carvalho Chehab #define SET_POWER_CONTROL 0x07 63*b285192aSMauro Carvalho Chehab #define GET_FW_STATUS_CONTROL 0x08 64*b285192aSMauro Carvalho Chehab #define GET_FW_VERSION_CONTROL 0x09 65*b285192aSMauro Carvalho Chehab #define SET_DEBUG_LEVEL_CONTROL 0x0B 66*b285192aSMauro Carvalho Chehab #define GET_DEBUG_DATA_CONTROL 0x0C 67*b285192aSMauro Carvalho Chehab #define GET_PRODUCTION_INFO_CONTROL 0x0D 68*b285192aSMauro Carvalho Chehab 69*b285192aSMauro Carvalho Chehab /* cmd defines */ 70*b285192aSMauro Carvalho Chehab #define SAA_CMDFLAG_CONTINUE 0x10 71*b285192aSMauro Carvalho Chehab #define SAA_CMD_MAX_MSG_UNITS 256 72*b285192aSMauro Carvalho Chehab 73*b285192aSMauro Carvalho Chehab /* Some defines */ 74*b285192aSMauro Carvalho Chehab #define SAA_BUS_TIMEOUT 50 75*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_TIMEOUT 5000 76*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_MAXREQUESTSIZE 256 77*b285192aSMauro Carvalho Chehab 78*b285192aSMauro Carvalho Chehab /* Register addresses */ 79*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_VERSION 0x30 80*b285192aSMauro Carvalho Chehab #define SAA_DOWNLOAD_FLAGS 0x34 81*b285192aSMauro Carvalho Chehab #define SAA_DOWNLOAD_FLAG 0x34 82*b285192aSMauro Carvalho Chehab #define SAA_DOWNLOAD_FLAG_ACK 0x38 83*b285192aSMauro Carvalho Chehab #define SAA_DATAREADY_FLAG 0x3C 84*b285192aSMauro Carvalho Chehab #define SAA_DATAREADY_FLAG_ACK 0x40 85*b285192aSMauro Carvalho Chehab 86*b285192aSMauro Carvalho Chehab /* Boot loader register and bit definitions */ 87*b285192aSMauro Carvalho Chehab #define SAA_BOOTLOADERERROR_FLAGS 0x44 88*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_SEARCHING 0x01 89*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_LOADING 0x02 90*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_BOOTING 0x03 91*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_IMAGE_CORRUPT 0x04 92*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_MEMORY_CORRUPT 0x08 93*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_NO_IMAGE 0x10 94*b285192aSMauro Carvalho Chehab 95*b285192aSMauro Carvalho Chehab /* Register addresses */ 96*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_VERSION 0x50 97*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_DOWNLOADFLAG_OFFSET 0x54 98*b285192aSMauro Carvalho Chehab 99*b285192aSMauro Carvalho Chehab /* Register addresses */ 100*b285192aSMauro Carvalho Chehab #define SAA_SECONDSTAGEERROR_FLAGS 0x64 101*b285192aSMauro Carvalho Chehab 102*b285192aSMauro Carvalho Chehab /* Bootloader regs and flags */ 103*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_DEADLOCK_DETECTED_OFFSET 0x6C 104*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_DEADLOCK_DETECTED 0xDEADDEAD 105*b285192aSMauro Carvalho Chehab 106*b285192aSMauro Carvalho Chehab /* Basic firmware status registers */ 107*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_STATUS_OFFSET 0x70 108*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_STATUS 0x70 109*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_MODE 0x74 110*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_SPEC 0x78 111*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_INST 0x7C 112*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_CPULOAD 0x80 113*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_SYSINIT_REMAINHEAP 0x84 114*b285192aSMauro Carvalho Chehab 115*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_DOWNLOAD_OFFSET 0x1000 116*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_BUFFERBLOCKSIZE 0x1000 117*b285192aSMauro Carvalho Chehab 118*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_BUFFERBLOCKSIZE 0x100000 119*b285192aSMauro Carvalho Chehab #define SAA_DEVICE_2ND_DOWNLOAD_OFFSET 0x200000 120*b285192aSMauro Carvalho Chehab 121*b285192aSMauro Carvalho Chehab /* Descriptors */ 122*b285192aSMauro Carvalho Chehab #define CS_INTERFACE 0x24 123*b285192aSMauro Carvalho Chehab 124*b285192aSMauro Carvalho Chehab /* Descriptor subtypes */ 125*b285192aSMauro Carvalho Chehab #define VC_INPUT_TERMINAL 0x02 126*b285192aSMauro Carvalho Chehab #define VC_OUTPUT_TERMINAL 0x03 127*b285192aSMauro Carvalho Chehab #define VC_SELECTOR_UNIT 0x04 128*b285192aSMauro Carvalho Chehab #define VC_PROCESSING_UNIT 0x05 129*b285192aSMauro Carvalho Chehab #define FEATURE_UNIT 0x06 130*b285192aSMauro Carvalho Chehab #define TUNER_UNIT 0x09 131*b285192aSMauro Carvalho Chehab #define ENCODER_UNIT 0x0A 132*b285192aSMauro Carvalho Chehab #define EXTENSION_UNIT 0x0B 133*b285192aSMauro Carvalho Chehab #define VC_TUNER_PATH 0xF0 134*b285192aSMauro Carvalho Chehab #define PVC_HARDWARE_DESCRIPTOR 0xF1 135*b285192aSMauro Carvalho Chehab #define PVC_INTERFACE_DESCRIPTOR 0xF2 136*b285192aSMauro Carvalho Chehab #define PVC_INFRARED_UNIT 0xF3 137*b285192aSMauro Carvalho Chehab #define DRM_UNIT 0xF4 138*b285192aSMauro Carvalho Chehab #define GENERAL_REQUEST 0xF5 139*b285192aSMauro Carvalho Chehab 140*b285192aSMauro Carvalho Chehab /* Format Types */ 141*b285192aSMauro Carvalho Chehab #define VS_FORMAT_TYPE 0x02 142*b285192aSMauro Carvalho Chehab #define VS_FORMAT_TYPE_I 0x01 143*b285192aSMauro Carvalho Chehab #define VS_FORMAT_UNCOMPRESSED 0x04 144*b285192aSMauro Carvalho Chehab #define VS_FRAME_UNCOMPRESSED 0x05 145*b285192aSMauro Carvalho Chehab #define VS_FORMAT_MPEG2PS 0x09 146*b285192aSMauro Carvalho Chehab #define VS_FORMAT_MPEG2TS 0x0A 147*b285192aSMauro Carvalho Chehab #define VS_FORMAT_MPEG4SL 0x0B 148*b285192aSMauro Carvalho Chehab #define VS_FORMAT_WM9 0x0C 149*b285192aSMauro Carvalho Chehab #define VS_FORMAT_DIVX 0x0D 150*b285192aSMauro Carvalho Chehab #define VS_FORMAT_VBI 0x0E 151*b285192aSMauro Carvalho Chehab #define VS_FORMAT_RDS 0x0F 152*b285192aSMauro Carvalho Chehab 153*b285192aSMauro Carvalho Chehab /* Device extension commands */ 154*b285192aSMauro Carvalho Chehab #define EXU_REGISTER_ACCESS_CONTROL 0x00 155*b285192aSMauro Carvalho Chehab #define EXU_GPIO_CONTROL 0x01 156*b285192aSMauro Carvalho Chehab #define EXU_GPIO_GROUP_CONTROL 0x02 157*b285192aSMauro Carvalho Chehab #define EXU_INTERRUPT_CONTROL 0x03 158*b285192aSMauro Carvalho Chehab 159*b285192aSMauro Carvalho Chehab /* State Transition and args */ 160*b285192aSMauro Carvalho Chehab #define SAA_PROBE_CONTROL 0x01 161*b285192aSMauro Carvalho Chehab #define SAA_COMMIT_CONTROL 0x02 162*b285192aSMauro Carvalho Chehab #define SAA_STATE_CONTROL 0x03 163*b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_STOP 0x00 164*b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_ACQUIRE 0x01 165*b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_PAUSE 0x02 166*b285192aSMauro Carvalho Chehab #define SAA_DMASTATE_RUN 0x03 167*b285192aSMauro Carvalho Chehab 168*b285192aSMauro Carvalho Chehab /* A/V Mux Input Selector */ 169*b285192aSMauro Carvalho Chehab #define SU_INPUT_SELECT_CONTROL 0x01 170*b285192aSMauro Carvalho Chehab 171*b285192aSMauro Carvalho Chehab /* Encoder Profiles */ 172*b285192aSMauro Carvalho Chehab #define EU_PROFILE_PS_DVD 0x06 173*b285192aSMauro Carvalho Chehab #define EU_PROFILE_TS_HQ 0x09 174*b285192aSMauro Carvalho Chehab #define EU_VIDEO_FORMAT_MPEG_2 0x02 175*b285192aSMauro Carvalho Chehab 176*b285192aSMauro Carvalho Chehab /* Tuner */ 177*b285192aSMauro Carvalho Chehab #define TU_AUDIO_MODE_CONTROL 0x17 178*b285192aSMauro Carvalho Chehab 179*b285192aSMauro Carvalho Chehab /* Video Formats */ 180*b285192aSMauro Carvalho Chehab #define TU_STANDARD_CONTROL 0x00 181*b285192aSMauro Carvalho Chehab #define TU_STANDARD_AUTO_CONTROL 0x01 182*b285192aSMauro Carvalho Chehab #define TU_STANDARD_NONE 0x00 183*b285192aSMauro Carvalho Chehab #define TU_STANDARD_NTSC_M 0x01 184*b285192aSMauro Carvalho Chehab #define TU_STANDARD_PAL_I 0x08 185*b285192aSMauro Carvalho Chehab #define TU_STANDARD_MANUAL 0x00 186*b285192aSMauro Carvalho Chehab #define TU_STANDARD_AUTO 0x01 187*b285192aSMauro Carvalho Chehab 188*b285192aSMauro Carvalho Chehab /* Video Controls */ 189*b285192aSMauro Carvalho Chehab #define PU_BRIGHTNESS_CONTROL 0x02 190*b285192aSMauro Carvalho Chehab #define PU_CONTRAST_CONTROL 0x03 191*b285192aSMauro Carvalho Chehab #define PU_HUE_CONTROL 0x06 192*b285192aSMauro Carvalho Chehab #define PU_SATURATION_CONTROL 0x07 193*b285192aSMauro Carvalho Chehab #define PU_SHARPNESS_CONTROL 0x08 194*b285192aSMauro Carvalho Chehab 195*b285192aSMauro Carvalho Chehab /* Audio Controls */ 196*b285192aSMauro Carvalho Chehab #define MUTE_CONTROL 0x01 197*b285192aSMauro Carvalho Chehab #define VOLUME_CONTROL 0x02 198*b285192aSMauro Carvalho Chehab #define AUDIO_DEFAULT_CONTROL 0x0D 199*b285192aSMauro Carvalho Chehab 200*b285192aSMauro Carvalho Chehab /* Default Volume Levels */ 201*b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_DECLEV_DEFAULT 0x00 202*b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_MONOLEV_DEFAULT 0x00 203*b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_NICLEV_DEFAULT 0x00 204*b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_SAPLEV_DEFAULT 0x00 205*b285192aSMauro Carvalho Chehab #define TMHW_LEV_ADJ_ADCLEV_DEFAULT 0x00 206*b285192aSMauro Carvalho Chehab 207*b285192aSMauro Carvalho Chehab /* Encoder Related Commands */ 208*b285192aSMauro Carvalho Chehab #define EU_PROFILE_CONTROL 0x00 209*b285192aSMauro Carvalho Chehab #define EU_VIDEO_FORMAT_CONTROL 0x01 210*b285192aSMauro Carvalho Chehab #define EU_VIDEO_BIT_RATE_CONTROL 0x02 211*b285192aSMauro Carvalho Chehab #define EU_VIDEO_RESOLUTION_CONTROL 0x03 212*b285192aSMauro Carvalho Chehab #define EU_VIDEO_GOP_STRUCTURE_CONTROL 0x04 213*b285192aSMauro Carvalho Chehab #define EU_VIDEO_INPUT_ASPECT_CONTROL 0x0A 214*b285192aSMauro Carvalho Chehab #define EU_AUDIO_FORMAT_CONTROL 0x0C 215*b285192aSMauro Carvalho Chehab #define EU_AUDIO_BIT_RATE_CONTROL 0x0D 216*b285192aSMauro Carvalho Chehab 217*b285192aSMauro Carvalho Chehab /* Firmware Debugging */ 218*b285192aSMauro Carvalho Chehab #define SET_DEBUG_LEVEL_CONTROL 0x0B 219*b285192aSMauro Carvalho Chehab #define GET_DEBUG_DATA_CONTROL 0x0C 220