1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T] 4 * 5 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org> 6 * 7 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/ 8 * by Dany Salman <salmandany@yahoo.fr> 9 * Copyright (c) 2004 TDF 10 */ 11 12 #include <linux/i2c.h> 13 #include <linux/i2c-algo-bit.h> 14 #include <linux/init.h> 15 #include <linux/interrupt.h> 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/pci.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/slab.h> 21 22 #include <media/demux.h> 23 #include <media/dmxdev.h> 24 #include <media/dvb_demux.h> 25 #include <media/dvb_frontend.h> 26 #include <media/dvb_net.h> 27 #include <media/dvbdev.h> 28 #include "tda1004x.h" 29 30 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 31 32 #define DRIVER_NAME "pluto2" 33 34 #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */ 35 #define REG_PCAR 0x0020 /* PC address register */ 36 #define REG_TSCR 0x0024 /* TS ctrl & status */ 37 #define REG_MISC 0x0028 /* miscellaneous */ 38 #define REG_MMAC 0x002c /* MSB MAC address */ 39 #define REG_IMAC 0x0030 /* ISB MAC address */ 40 #define REG_LMAC 0x0034 /* LSB MAC address */ 41 #define REG_SPID 0x0038 /* SPI data */ 42 #define REG_SLCS 0x003c /* serial links ctrl/status */ 43 44 #define PID0_NOFIL (0x0001 << 16) 45 #define PIDn_ENP (0x0001 << 15) 46 #define PID0_END (0x0001 << 14) 47 #define PID0_AFIL (0x0001 << 13) 48 #define PIDn_PID (0x1fff << 0) 49 50 #define TSCR_NBPACKETS (0x00ff << 24) 51 #define TSCR_DEM (0x0001 << 17) 52 #define TSCR_DE (0x0001 << 16) 53 #define TSCR_RSTN (0x0001 << 15) 54 #define TSCR_MSKO (0x0001 << 14) 55 #define TSCR_MSKA (0x0001 << 13) 56 #define TSCR_MSKL (0x0001 << 12) 57 #define TSCR_OVR (0x0001 << 11) 58 #define TSCR_AFUL (0x0001 << 10) 59 #define TSCR_LOCK (0x0001 << 9) 60 #define TSCR_IACK (0x0001 << 8) 61 #define TSCR_ADEF (0x007f << 0) 62 63 #define MISC_DVR (0x0fff << 4) 64 #define MISC_ALED (0x0001 << 3) 65 #define MISC_FRST (0x0001 << 2) 66 #define MISC_LED1 (0x0001 << 1) 67 #define MISC_LED0 (0x0001 << 0) 68 69 #define SPID_SPIDR (0x00ff << 0) 70 71 #define SLCS_SCL (0x0001 << 7) 72 #define SLCS_SDA (0x0001 << 6) 73 #define SLCS_CSN (0x0001 << 2) 74 #define SLCS_OVR (0x0001 << 1) 75 #define SLCS_SWC (0x0001 << 0) 76 77 #define TS_DMA_PACKETS (8) 78 #define TS_DMA_BYTES (188 * TS_DMA_PACKETS) 79 80 #define I2C_ADDR_TDA10046 0x10 81 #define I2C_ADDR_TUA6034 0xc2 82 #define NHWFILTERS 8 83 84 struct pluto { 85 /* pci */ 86 struct pci_dev *pdev; 87 u8 __iomem *io_mem; 88 89 /* dvb */ 90 struct dmx_frontend hw_frontend; 91 struct dmx_frontend mem_frontend; 92 struct dmxdev dmxdev; 93 struct dvb_adapter dvb_adapter; 94 struct dvb_demux demux; 95 struct dvb_frontend *fe; 96 struct dvb_net dvbnet; 97 unsigned int full_ts_users; 98 unsigned int users; 99 100 /* i2c */ 101 struct i2c_algo_bit_data i2c_bit; 102 struct i2c_adapter i2c_adap; 103 unsigned int i2cbug; 104 105 /* irq */ 106 unsigned int overflow; 107 unsigned int dead; 108 109 /* dma */ 110 dma_addr_t dma_addr; 111 u8 dma_buf[TS_DMA_BYTES]; 112 u8 dummy[4096]; 113 }; 114 115 static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed) 116 { 117 return container_of(feed->demux, struct pluto, demux); 118 } 119 120 static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe) 121 { 122 return container_of(fe->dvb, struct pluto, dvb_adapter); 123 } 124 125 static inline u32 pluto_readreg(struct pluto *pluto, u32 reg) 126 { 127 return readl(&pluto->io_mem[reg]); 128 } 129 130 static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val) 131 { 132 writel(val, &pluto->io_mem[reg]); 133 } 134 135 static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits) 136 { 137 u32 val = readl(&pluto->io_mem[reg]); 138 val &= ~mask; 139 val |= bits; 140 writel(val, &pluto->io_mem[reg]); 141 } 142 143 static void pluto_write_tscr(struct pluto *pluto, u32 val) 144 { 145 /* set the number of packets */ 146 val &= ~TSCR_ADEF; 147 val |= TS_DMA_PACKETS / 2; 148 149 pluto_writereg(pluto, REG_TSCR, val); 150 } 151 152 static void pluto_setsda(void *data, int state) 153 { 154 struct pluto *pluto = data; 155 156 if (state) 157 pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA); 158 else 159 pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0); 160 } 161 162 static void pluto_setscl(void *data, int state) 163 { 164 struct pluto *pluto = data; 165 166 if (state) 167 pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL); 168 else 169 pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0); 170 171 /* try to detect i2c_inb() to workaround hardware bug: 172 * reset SDA to high after SCL has been set to low */ 173 if ((state) && (pluto->i2cbug == 0)) { 174 pluto->i2cbug = 1; 175 } else { 176 if ((!state) && (pluto->i2cbug == 1)) 177 pluto_setsda(pluto, 1); 178 pluto->i2cbug = 0; 179 } 180 } 181 182 static int pluto_getsda(void *data) 183 { 184 struct pluto *pluto = data; 185 186 return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA; 187 } 188 189 static int pluto_getscl(void *data) 190 { 191 struct pluto *pluto = data; 192 193 return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL; 194 } 195 196 static void pluto_reset_frontend(struct pluto *pluto, int reenable) 197 { 198 u32 val = pluto_readreg(pluto, REG_MISC); 199 200 if (val & MISC_FRST) { 201 val &= ~MISC_FRST; 202 pluto_writereg(pluto, REG_MISC, val); 203 } 204 if (reenable) { 205 val |= MISC_FRST; 206 pluto_writereg(pluto, REG_MISC, val); 207 } 208 } 209 210 static void pluto_reset_ts(struct pluto *pluto, int reenable) 211 { 212 u32 val = pluto_readreg(pluto, REG_TSCR); 213 214 if (val & TSCR_RSTN) { 215 val &= ~TSCR_RSTN; 216 pluto_write_tscr(pluto, val); 217 } 218 if (reenable) { 219 val |= TSCR_RSTN; 220 pluto_write_tscr(pluto, val); 221 } 222 } 223 224 static void pluto_set_dma_addr(struct pluto *pluto) 225 { 226 pluto_writereg(pluto, REG_PCAR, pluto->dma_addr); 227 } 228 229 static int pluto_dma_map(struct pluto *pluto) 230 { 231 pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf, 232 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 233 234 return pci_dma_mapping_error(pluto->pdev, pluto->dma_addr); 235 } 236 237 static void pluto_dma_unmap(struct pluto *pluto) 238 { 239 pci_unmap_single(pluto->pdev, pluto->dma_addr, 240 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 241 } 242 243 static int pluto_start_feed(struct dvb_demux_feed *f) 244 { 245 struct pluto *pluto = feed_to_pluto(f); 246 247 /* enable PID filtering */ 248 if (pluto->users++ == 0) 249 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0); 250 251 if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) 252 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid); 253 else if (pluto->full_ts_users++ == 0) 254 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL); 255 256 return 0; 257 } 258 259 static int pluto_stop_feed(struct dvb_demux_feed *f) 260 { 261 struct pluto *pluto = feed_to_pluto(f); 262 263 /* disable PID filtering */ 264 if (--pluto->users == 0) 265 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL); 266 267 if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) 268 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff); 269 else if (--pluto->full_ts_users == 0) 270 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0); 271 272 return 0; 273 } 274 275 static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets) 276 { 277 /* synchronize the DMA transfer with the CPU 278 * first so that we see updated contents. */ 279 pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr, 280 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 281 282 /* Workaround for broken hardware: 283 * [1] On startup NBPACKETS seems to contain an uninitialized value, 284 * but no packets have been transferred. 285 * [2] Sometimes (actually very often) NBPACKETS stays at zero 286 * although one packet has been transferred. 287 * [3] Sometimes (actually rarely), the card gets into an erroneous 288 * mode where it continuously generates interrupts, claiming it 289 * has received nbpackets>TS_DMA_PACKETS packets, but no packet 290 * has been transferred. Only a reset seems to solve this 291 */ 292 if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) { 293 unsigned int i = 0; 294 while (pluto->dma_buf[i] == 0x47) 295 i += 188; 296 nbpackets = i / 188; 297 if (i == 0) { 298 pluto_reset_ts(pluto, 1); 299 dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n"); 300 } 301 } 302 303 dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets); 304 305 /* clear the dma buffer. this is needed to be able to identify 306 * new valid ts packets above */ 307 memset(pluto->dma_buf, 0, nbpackets * 188); 308 309 /* reset the dma address */ 310 pluto_set_dma_addr(pluto); 311 312 /* sync the buffer and give it back to the card */ 313 pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr, 314 TS_DMA_BYTES, PCI_DMA_FROMDEVICE); 315 } 316 317 static irqreturn_t pluto_irq(int irq, void *dev_id) 318 { 319 struct pluto *pluto = dev_id; 320 u32 tscr; 321 322 /* check whether an interrupt occurred on this device */ 323 tscr = pluto_readreg(pluto, REG_TSCR); 324 if (!(tscr & (TSCR_DE | TSCR_OVR))) 325 return IRQ_NONE; 326 327 if (tscr == 0xffffffff) { 328 if (pluto->dead == 0) 329 dev_err(&pluto->pdev->dev, "card has hung or been ejected.\n"); 330 /* It's dead Jim */ 331 pluto->dead = 1; 332 return IRQ_HANDLED; 333 } 334 335 /* dma end interrupt */ 336 if (tscr & TSCR_DE) { 337 pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24); 338 /* overflow interrupt */ 339 if (tscr & TSCR_OVR) 340 pluto->overflow++; 341 if (pluto->overflow) { 342 dev_err(&pluto->pdev->dev, "overflow irq (%d)\n", 343 pluto->overflow); 344 pluto_reset_ts(pluto, 1); 345 pluto->overflow = 0; 346 } 347 } else if (tscr & TSCR_OVR) { 348 pluto->overflow++; 349 } 350 351 /* ACK the interrupt */ 352 pluto_write_tscr(pluto, tscr | TSCR_IACK); 353 354 return IRQ_HANDLED; 355 } 356 357 static void pluto_enable_irqs(struct pluto *pluto) 358 { 359 u32 val = pluto_readreg(pluto, REG_TSCR); 360 361 /* disable AFUL and LOCK interrupts */ 362 val |= (TSCR_MSKA | TSCR_MSKL); 363 /* enable DMA and OVERFLOW interrupts */ 364 val &= ~(TSCR_DEM | TSCR_MSKO); 365 /* clear pending interrupts */ 366 val |= TSCR_IACK; 367 368 pluto_write_tscr(pluto, val); 369 } 370 371 static void pluto_disable_irqs(struct pluto *pluto) 372 { 373 u32 val = pluto_readreg(pluto, REG_TSCR); 374 375 /* disable all interrupts */ 376 val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL); 377 /* clear pending interrupts */ 378 val |= TSCR_IACK; 379 380 pluto_write_tscr(pluto, val); 381 } 382 383 static int pluto_hw_init(struct pluto *pluto) 384 { 385 pluto_reset_frontend(pluto, 1); 386 387 /* set automatic LED control by FPGA */ 388 pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED); 389 390 /* set data endianness */ 391 #ifdef __LITTLE_ENDIAN 392 pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END); 393 #else 394 pluto_rw(pluto, REG_PIDn(0), PID0_END, 0); 395 #endif 396 /* map DMA and set address */ 397 pluto_dma_map(pluto); 398 pluto_set_dma_addr(pluto); 399 400 /* enable interrupts */ 401 pluto_enable_irqs(pluto); 402 403 /* reset TS logic */ 404 pluto_reset_ts(pluto, 1); 405 406 return 0; 407 } 408 409 static void pluto_hw_exit(struct pluto *pluto) 410 { 411 /* disable interrupts */ 412 pluto_disable_irqs(pluto); 413 414 pluto_reset_ts(pluto, 0); 415 416 /* LED: disable automatic control, enable yellow, disable green */ 417 pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1); 418 419 /* unmap DMA */ 420 pluto_dma_unmap(pluto); 421 422 pluto_reset_frontend(pluto, 0); 423 } 424 425 static inline u32 divide(u32 numerator, u32 denominator) 426 { 427 if (denominator == 0) 428 return ~0; 429 430 return DIV_ROUND_CLOSEST(numerator, denominator); 431 } 432 433 /* LG Innotek TDTE-E001P (Infineon TUA6034) */ 434 static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe) 435 { 436 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 437 struct pluto *pluto = frontend_to_pluto(fe); 438 struct i2c_msg msg; 439 int ret; 440 u8 buf[4]; 441 u32 div; 442 443 // Fref = 166.667 Hz 444 // Fref * 3 = 500.000 Hz 445 // IF = 36166667 446 // IF / Fref = 217 447 //div = divide(p->frequency + 36166667, 166667); 448 div = divide(p->frequency * 3, 500000) + 217; 449 buf[0] = (div >> 8) & 0x7f; 450 buf[1] = (div >> 0) & 0xff; 451 452 if (p->frequency < 611000000) 453 buf[2] = 0xb4; 454 else if (p->frequency < 811000000) 455 buf[2] = 0xbc; 456 else 457 buf[2] = 0xf4; 458 459 // VHF: 174-230 MHz 460 // center: 350 MHz 461 // UHF: 470-862 MHz 462 if (p->frequency < 350000000) 463 buf[3] = 0x02; 464 else 465 buf[3] = 0x04; 466 467 if (p->bandwidth_hz == 8000000) 468 buf[3] |= 0x08; 469 470 msg.addr = I2C_ADDR_TUA6034 >> 1; 471 msg.flags = 0; 472 msg.buf = buf; 473 msg.len = sizeof(buf); 474 475 if (fe->ops.i2c_gate_ctrl) 476 fe->ops.i2c_gate_ctrl(fe, 1); 477 ret = i2c_transfer(&pluto->i2c_adap, &msg, 1); 478 if (ret < 0) 479 return ret; 480 else if (ret == 0) 481 return -EREMOTEIO; 482 483 return 0; 484 } 485 486 static int pluto2_request_firmware(struct dvb_frontend *fe, 487 const struct firmware **fw, char *name) 488 { 489 struct pluto *pluto = frontend_to_pluto(fe); 490 491 return request_firmware(fw, name, &pluto->pdev->dev); 492 } 493 494 static struct tda1004x_config pluto2_fe_config = { 495 .demod_address = I2C_ADDR_TDA10046 >> 1, 496 .invert = 1, 497 .invert_oclk = 0, 498 .xtal_freq = TDA10046_XTAL_16M, 499 .agc_config = TDA10046_AGC_DEFAULT, 500 .if_freq = TDA10046_FREQ_3617, 501 .request_firmware = pluto2_request_firmware, 502 }; 503 504 static int frontend_init(struct pluto *pluto) 505 { 506 int ret; 507 508 pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap); 509 if (!pluto->fe) { 510 dev_err(&pluto->pdev->dev, "could not attach frontend\n"); 511 return -ENODEV; 512 } 513 pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params; 514 515 ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe); 516 if (ret < 0) { 517 if (pluto->fe->ops.release) 518 pluto->fe->ops.release(pluto->fe); 519 return ret; 520 } 521 522 return 0; 523 } 524 525 static void pluto_read_rev(struct pluto *pluto) 526 { 527 u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR; 528 dev_info(&pluto->pdev->dev, "board revision %d.%d\n", 529 (val >> 12) & 0x0f, (val >> 4) & 0xff); 530 } 531 532 static void pluto_read_mac(struct pluto *pluto, u8 *mac) 533 { 534 u32 val = pluto_readreg(pluto, REG_MMAC); 535 mac[0] = (val >> 8) & 0xff; 536 mac[1] = (val >> 0) & 0xff; 537 538 val = pluto_readreg(pluto, REG_IMAC); 539 mac[2] = (val >> 8) & 0xff; 540 mac[3] = (val >> 0) & 0xff; 541 542 val = pluto_readreg(pluto, REG_LMAC); 543 mac[4] = (val >> 8) & 0xff; 544 mac[5] = (val >> 0) & 0xff; 545 546 dev_info(&pluto->pdev->dev, "MAC %pM\n", mac); 547 } 548 549 static int pluto_read_serial(struct pluto *pluto) 550 { 551 struct pci_dev *pdev = pluto->pdev; 552 unsigned int i, j; 553 u8 __iomem *cis; 554 555 cis = pci_iomap(pdev, 1, 0); 556 if (!cis) 557 return -EIO; 558 559 dev_info(&pdev->dev, "S/N "); 560 561 for (i = 0xe0; i < 0x100; i += 4) { 562 u32 val = readl(&cis[i]); 563 for (j = 0; j < 32; j += 8) { 564 if ((val & 0xff) == 0xff) 565 goto out; 566 printk(KERN_CONT "%c", val & 0xff); 567 val >>= 8; 568 } 569 } 570 out: 571 printk(KERN_CONT "\n"); 572 pci_iounmap(pdev, cis); 573 574 return 0; 575 } 576 577 static int pluto2_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 578 { 579 struct pluto *pluto; 580 struct dvb_adapter *dvb_adapter; 581 struct dvb_demux *dvbdemux; 582 struct dmx_demux *dmx; 583 int ret = -ENOMEM; 584 585 pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL); 586 if (!pluto) 587 goto out; 588 589 pluto->pdev = pdev; 590 591 ret = pci_enable_device(pdev); 592 if (ret < 0) 593 goto err_kfree; 594 595 /* enable interrupts */ 596 pci_write_config_dword(pdev, 0x6c, 0x8000); 597 598 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 599 if (ret < 0) 600 goto err_pci_disable_device; 601 602 pci_set_master(pdev); 603 604 ret = pci_request_regions(pdev, DRIVER_NAME); 605 if (ret < 0) 606 goto err_pci_disable_device; 607 608 pluto->io_mem = pci_iomap(pdev, 0, 0x40); 609 if (!pluto->io_mem) { 610 ret = -EIO; 611 goto err_pci_release_regions; 612 } 613 614 pci_set_drvdata(pdev, pluto); 615 616 ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto); 617 if (ret < 0) 618 goto err_pci_iounmap; 619 620 ret = pluto_hw_init(pluto); 621 if (ret < 0) 622 goto err_free_irq; 623 624 /* i2c */ 625 i2c_set_adapdata(&pluto->i2c_adap, pluto); 626 strscpy(pluto->i2c_adap.name, DRIVER_NAME, sizeof(pluto->i2c_adap.name)); 627 pluto->i2c_adap.owner = THIS_MODULE; 628 pluto->i2c_adap.dev.parent = &pdev->dev; 629 pluto->i2c_adap.algo_data = &pluto->i2c_bit; 630 pluto->i2c_bit.data = pluto; 631 pluto->i2c_bit.setsda = pluto_setsda; 632 pluto->i2c_bit.setscl = pluto_setscl; 633 pluto->i2c_bit.getsda = pluto_getsda; 634 pluto->i2c_bit.getscl = pluto_getscl; 635 pluto->i2c_bit.udelay = 10; 636 pluto->i2c_bit.timeout = 10; 637 638 /* Raise SCL and SDA */ 639 pluto_setsda(pluto, 1); 640 pluto_setscl(pluto, 1); 641 642 ret = i2c_bit_add_bus(&pluto->i2c_adap); 643 if (ret < 0) 644 goto err_pluto_hw_exit; 645 646 /* dvb */ 647 ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, 648 THIS_MODULE, &pdev->dev, adapter_nr); 649 if (ret < 0) 650 goto err_i2c_del_adapter; 651 652 dvb_adapter = &pluto->dvb_adapter; 653 654 pluto_read_rev(pluto); 655 pluto_read_serial(pluto); 656 pluto_read_mac(pluto, dvb_adapter->proposed_mac); 657 658 dvbdemux = &pluto->demux; 659 dvbdemux->filternum = 256; 660 dvbdemux->feednum = 256; 661 dvbdemux->start_feed = pluto_start_feed; 662 dvbdemux->stop_feed = pluto_stop_feed; 663 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 664 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 665 ret = dvb_dmx_init(dvbdemux); 666 if (ret < 0) 667 goto err_dvb_unregister_adapter; 668 669 dmx = &dvbdemux->dmx; 670 671 pluto->hw_frontend.source = DMX_FRONTEND_0; 672 pluto->mem_frontend.source = DMX_MEMORY_FE; 673 pluto->dmxdev.filternum = NHWFILTERS; 674 pluto->dmxdev.demux = dmx; 675 676 ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter); 677 if (ret < 0) 678 goto err_dvb_dmx_release; 679 680 ret = dmx->add_frontend(dmx, &pluto->hw_frontend); 681 if (ret < 0) 682 goto err_dvb_dmxdev_release; 683 684 ret = dmx->add_frontend(dmx, &pluto->mem_frontend); 685 if (ret < 0) 686 goto err_remove_hw_frontend; 687 688 ret = dmx->connect_frontend(dmx, &pluto->hw_frontend); 689 if (ret < 0) 690 goto err_remove_mem_frontend; 691 692 ret = frontend_init(pluto); 693 if (ret < 0) 694 goto err_disconnect_frontend; 695 696 dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx); 697 out: 698 return ret; 699 700 err_disconnect_frontend: 701 dmx->disconnect_frontend(dmx); 702 err_remove_mem_frontend: 703 dmx->remove_frontend(dmx, &pluto->mem_frontend); 704 err_remove_hw_frontend: 705 dmx->remove_frontend(dmx, &pluto->hw_frontend); 706 err_dvb_dmxdev_release: 707 dvb_dmxdev_release(&pluto->dmxdev); 708 err_dvb_dmx_release: 709 dvb_dmx_release(dvbdemux); 710 err_dvb_unregister_adapter: 711 dvb_unregister_adapter(dvb_adapter); 712 err_i2c_del_adapter: 713 i2c_del_adapter(&pluto->i2c_adap); 714 err_pluto_hw_exit: 715 pluto_hw_exit(pluto); 716 err_free_irq: 717 free_irq(pdev->irq, pluto); 718 err_pci_iounmap: 719 pci_iounmap(pdev, pluto->io_mem); 720 err_pci_release_regions: 721 pci_release_regions(pdev); 722 err_pci_disable_device: 723 pci_disable_device(pdev); 724 err_kfree: 725 kfree(pluto); 726 goto out; 727 } 728 729 static void pluto2_remove(struct pci_dev *pdev) 730 { 731 struct pluto *pluto = pci_get_drvdata(pdev); 732 struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter; 733 struct dvb_demux *dvbdemux = &pluto->demux; 734 struct dmx_demux *dmx = &dvbdemux->dmx; 735 736 dmx->close(dmx); 737 dvb_net_release(&pluto->dvbnet); 738 if (pluto->fe) 739 dvb_unregister_frontend(pluto->fe); 740 741 dmx->disconnect_frontend(dmx); 742 dmx->remove_frontend(dmx, &pluto->mem_frontend); 743 dmx->remove_frontend(dmx, &pluto->hw_frontend); 744 dvb_dmxdev_release(&pluto->dmxdev); 745 dvb_dmx_release(dvbdemux); 746 dvb_unregister_adapter(dvb_adapter); 747 i2c_del_adapter(&pluto->i2c_adap); 748 pluto_hw_exit(pluto); 749 free_irq(pdev->irq, pluto); 750 pci_iounmap(pdev, pluto->io_mem); 751 pci_release_regions(pdev); 752 pci_disable_device(pdev); 753 kfree(pluto); 754 } 755 756 #ifndef PCI_VENDOR_ID_SCM 757 #define PCI_VENDOR_ID_SCM 0x0432 758 #endif 759 #ifndef PCI_DEVICE_ID_PLUTO2 760 #define PCI_DEVICE_ID_PLUTO2 0x0001 761 #endif 762 763 static const struct pci_device_id pluto2_id_table[] = { 764 { 765 .vendor = PCI_VENDOR_ID_SCM, 766 .device = PCI_DEVICE_ID_PLUTO2, 767 .subvendor = PCI_ANY_ID, 768 .subdevice = PCI_ANY_ID, 769 }, { 770 /* empty */ 771 }, 772 }; 773 774 MODULE_DEVICE_TABLE(pci, pluto2_id_table); 775 776 static struct pci_driver pluto2_driver = { 777 .name = DRIVER_NAME, 778 .id_table = pluto2_id_table, 779 .probe = pluto2_probe, 780 .remove = pluto2_remove, 781 }; 782 783 module_pci_driver(pluto2_driver); 784 785 MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>"); 786 MODULE_DESCRIPTION("Pluto2 driver"); 787 MODULE_LICENSE("GPL"); 788