1*a11a5570SBingbu Cao /* SPDX-License-Identifier: GPL-2.0-only */ 2*a11a5570SBingbu Cao /* Copyright (C) 2013--2024 Intel Corporation */ 3*a11a5570SBingbu Cao 4*a11a5570SBingbu Cao #ifndef IPU6_ISYS_CSI2_H 5*a11a5570SBingbu Cao #define IPU6_ISYS_CSI2_H 6*a11a5570SBingbu Cao 7*a11a5570SBingbu Cao #include <linux/container_of.h> 8*a11a5570SBingbu Cao 9*a11a5570SBingbu Cao #include "ipu6-isys-subdev.h" 10*a11a5570SBingbu Cao #include "ipu6-isys-video.h" 11*a11a5570SBingbu Cao 12*a11a5570SBingbu Cao struct media_entity; 13*a11a5570SBingbu Cao struct v4l2_mbus_frame_desc_entry; 14*a11a5570SBingbu Cao 15*a11a5570SBingbu Cao struct ipu6_isys_video; 16*a11a5570SBingbu Cao struct ipu6_isys; 17*a11a5570SBingbu Cao struct ipu6_isys_csi2_pdata; 18*a11a5570SBingbu Cao struct ipu6_isys_stream; 19*a11a5570SBingbu Cao 20*a11a5570SBingbu Cao #define NR_OF_CSI2_VC 16 21*a11a5570SBingbu Cao #define INVALID_VC_ID -1 22*a11a5570SBingbu Cao #define NR_OF_CSI2_SINK_PADS 1 23*a11a5570SBingbu Cao #define CSI2_PAD_SINK 0 24*a11a5570SBingbu Cao #define NR_OF_CSI2_SRC_PADS 8 25*a11a5570SBingbu Cao #define CSI2_PAD_SRC 1 26*a11a5570SBingbu Cao #define NR_OF_CSI2_PADS (NR_OF_CSI2_SINK_PADS + NR_OF_CSI2_SRC_PADS) 27*a11a5570SBingbu Cao 28*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_TERMEN_CLANE_A 0 29*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_TERMEN_CLANE_B 0 30*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_SETTLE_CLANE_A 95 31*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_SETTLE_CLANE_B -8 32*a11a5570SBingbu Cao 33*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_TERMEN_DLANE_A 0 34*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_TERMEN_DLANE_B 0 35*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_SETTLE_DLANE_A 85 36*a11a5570SBingbu Cao #define CSI2_CSI_RX_DLY_CNT_SETTLE_DLANE_B -2 37*a11a5570SBingbu Cao 38*a11a5570SBingbu Cao struct ipu6_isys_csi2 { 39*a11a5570SBingbu Cao struct ipu6_isys_subdev asd; 40*a11a5570SBingbu Cao struct ipu6_isys_csi2_pdata *pdata; 41*a11a5570SBingbu Cao struct ipu6_isys *isys; 42*a11a5570SBingbu Cao struct ipu6_isys_video av[NR_OF_CSI2_SRC_PADS]; 43*a11a5570SBingbu Cao 44*a11a5570SBingbu Cao void __iomem *base; 45*a11a5570SBingbu Cao u32 receiver_errors; 46*a11a5570SBingbu Cao unsigned int nlanes; 47*a11a5570SBingbu Cao unsigned int port; 48*a11a5570SBingbu Cao }; 49*a11a5570SBingbu Cao 50*a11a5570SBingbu Cao struct ipu6_isys_csi2_timing { 51*a11a5570SBingbu Cao u32 ctermen; 52*a11a5570SBingbu Cao u32 csettle; 53*a11a5570SBingbu Cao u32 dtermen; 54*a11a5570SBingbu Cao u32 dsettle; 55*a11a5570SBingbu Cao }; 56*a11a5570SBingbu Cao 57*a11a5570SBingbu Cao struct ipu6_csi2_error { 58*a11a5570SBingbu Cao const char *error_string; 59*a11a5570SBingbu Cao bool is_info_only; 60*a11a5570SBingbu Cao }; 61*a11a5570SBingbu Cao 62*a11a5570SBingbu Cao #define ipu6_isys_subdev_to_csi2(__sd) \ 63*a11a5570SBingbu Cao container_of(__sd, struct ipu6_isys_csi2, asd) 64*a11a5570SBingbu Cao 65*a11a5570SBingbu Cao #define to_ipu6_isys_csi2(__asd) container_of(__asd, struct ipu6_isys_csi2, asd) 66*a11a5570SBingbu Cao 67*a11a5570SBingbu Cao s64 ipu6_isys_csi2_get_link_freq(struct ipu6_isys_csi2 *csi2); 68*a11a5570SBingbu Cao int ipu6_isys_csi2_init(struct ipu6_isys_csi2 *csi2, struct ipu6_isys *isys, 69*a11a5570SBingbu Cao void __iomem *base, unsigned int index); 70*a11a5570SBingbu Cao void ipu6_isys_csi2_cleanup(struct ipu6_isys_csi2 *csi2); 71*a11a5570SBingbu Cao void ipu6_isys_csi2_sof_event_by_stream(struct ipu6_isys_stream *stream); 72*a11a5570SBingbu Cao void ipu6_isys_csi2_eof_event_by_stream(struct ipu6_isys_stream *stream); 73*a11a5570SBingbu Cao void ipu6_isys_register_errors(struct ipu6_isys_csi2 *csi2); 74*a11a5570SBingbu Cao void ipu6_isys_csi2_error(struct ipu6_isys_csi2 *csi2); 75*a11a5570SBingbu Cao int ipu6_isys_csi2_get_remote_desc(u32 source_stream, 76*a11a5570SBingbu Cao struct ipu6_isys_csi2 *csi2, 77*a11a5570SBingbu Cao struct media_entity *source_entity, 78*a11a5570SBingbu Cao struct v4l2_mbus_frame_desc_entry *entry); 79*a11a5570SBingbu Cao 80*a11a5570SBingbu Cao #endif /* IPU6_ISYS_CSI2_H */ 81