xref: /linux/drivers/media/pci/ddbridge/ddbridge.h (revision dc3e0896003ee9b3bcc34c53965dc4bbc8671c44)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * ddbridge.h: Digital Devices PCIe bridge driver
4  *
5  * Copyright (C) 2010-2017 Digital Devices GmbH
6  *                         Ralph Metzler <rmetzler@digitaldevices.de>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 only, as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 
18 #ifndef _DDBRIDGE_H_
19 #define _DDBRIDGE_H_
20 
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/delay.h>
25 #include <linux/slab.h>
26 #include <linux/poll.h>
27 #include <linux/io.h>
28 #include <linux/pci.h>
29 #include <linux/timer.h>
30 #include <linux/i2c.h>
31 #include <linux/swab.h>
32 #include <linux/vmalloc.h>
33 #include <linux/workqueue.h>
34 #include <linux/kthread.h>
35 #include <linux/platform_device.h>
36 #include <linux/clk.h>
37 #include <linux/spi/spi.h>
38 #include <linux/gpio.h>
39 #include <linux/completion.h>
40 
41 #include <linux/types.h>
42 #include <linux/sched.h>
43 #include <linux/interrupt.h>
44 #include <linux/mutex.h>
45 #include <asm/dma.h>
46 #include <asm/irq.h>
47 #include <linux/io.h>
48 #include <linux/uaccess.h>
49 
50 #include <linux/dvb/ca.h>
51 #include <linux/socket.h>
52 #include <linux/device.h>
53 #include <linux/io.h>
54 
55 #include <media/dmxdev.h>
56 #include <media/dvbdev.h>
57 #include <media/dvb_demux.h>
58 #include <media/dvb_frontend.h>
59 #include <media/dvb_ringbuffer.h>
60 #include <media/dvb_ca_en50221.h>
61 #include <media/dvb_net.h>
62 
63 #define DDBRIDGE_VERSION "0.9.33-integrated"
64 
65 #define DDB_MAX_I2C    32
66 #define DDB_MAX_PORT   32
67 #define DDB_MAX_INPUT  64
68 #define DDB_MAX_OUTPUT 32
69 #define DDB_MAX_LINK    4
70 #define DDB_LINK_SHIFT 28
71 
72 #define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
73 
74 struct ddb_regset {
75 	u32 base;
76 	u32 num;
77 	u32 size;
78 };
79 
80 struct ddb_regmap {
81 	u32 irq_base_i2c;
82 	u32 irq_base_idma;
83 	u32 irq_base_odma;
84 
85 	const struct ddb_regset *i2c;
86 	const struct ddb_regset *i2c_buf;
87 	const struct ddb_regset *idma;
88 	const struct ddb_regset *idma_buf;
89 	const struct ddb_regset *odma;
90 	const struct ddb_regset *odma_buf;
91 
92 	const struct ddb_regset *input;
93 	const struct ddb_regset *output;
94 
95 	const struct ddb_regset *channel;
96 };
97 
98 struct ddb_ids {
99 	u16 vendor;
100 	u16 device;
101 	u16 subvendor;
102 	u16 subdevice;
103 
104 	u32 hwid;
105 	u32 regmapid;
106 	u32 devid;
107 	u32 mac;
108 };
109 
110 struct ddb_info {
111 	int   type;
112 #define DDB_NONE            0
113 #define DDB_OCTOPUS         1
114 #define DDB_OCTOPUS_CI      2
115 #define DDB_OCTOPUS_MAX     5
116 #define DDB_OCTOPUS_MAX_CT  6
117 #define DDB_OCTOPUS_MCI     9
118 	char *name;
119 	u32   i2c_mask;
120 	u32   board_control;
121 	u32   board_control_2;
122 
123 	u8    port_num;
124 	u8    led_num;
125 	u8    fan_num;
126 	u8    temp_num;
127 	u8    temp_bus;
128 	u8    con_clock; /* use a continuous clock */
129 	u8    ts_quirks;
130 #define TS_QUIRK_SERIAL   1
131 #define TS_QUIRK_REVERSED 2
132 #define TS_QUIRK_ALT_OSC  8
133 	u8    mci_ports;
134 	u8    mci_type;
135 
136 	u32   tempmon_irq;
137 	const struct ddb_regmap *regmap;
138 };
139 
140 #define DMA_MAX_BUFS 32      /* hardware table limit */
141 
142 struct ddb;
143 struct ddb_port;
144 
145 struct ddb_dma {
146 	void                  *io;
147 	u32                    regs;
148 	u32                    bufregs;
149 
150 	dma_addr_t             pbuf[DMA_MAX_BUFS];
151 	u8                    *vbuf[DMA_MAX_BUFS];
152 	u32                    num;
153 	u32                    size;
154 	u32                    div;
155 	u32                    bufval;
156 
157 	struct work_struct     work;
158 	spinlock_t             lock; /* DMA lock */
159 	wait_queue_head_t      wq;
160 	int                    running;
161 	u32                    stat;
162 	u32                    ctrl;
163 	u32                    cbuf;
164 	u32                    coff;
165 };
166 
167 struct ddb_dvb {
168 	struct dvb_adapter    *adap;
169 	int                    adap_registered;
170 	struct dvb_device     *dev;
171 	struct i2c_client     *i2c_client[1];
172 	struct dvb_frontend   *fe;
173 	struct dvb_frontend   *fe2;
174 	struct dmxdev          dmxdev;
175 	struct dvb_demux       demux;
176 	struct dvb_net         dvbnet;
177 	struct dmx_frontend    hw_frontend;
178 	struct dmx_frontend    mem_frontend;
179 	int                    users;
180 	u32                    attached;
181 	u8                     input;
182 
183 	enum fe_sec_tone_mode  tone;
184 	enum fe_sec_voltage    voltage;
185 
186 	int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
187 	int (*set_voltage)(struct dvb_frontend *fe,
188 			   enum fe_sec_voltage voltage);
189 	int (*set_input)(struct dvb_frontend *fe, int input);
190 	int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
191 				      struct dvb_diseqc_master_cmd *cmd);
192 };
193 
194 struct ddb_ci {
195 	struct dvb_ca_en50221  en;
196 	struct ddb_port       *port;
197 	u32                    nr;
198 };
199 
200 struct ddb_io {
201 	struct ddb_port       *port;
202 	u32                    nr;
203 	u32                    regs;
204 	struct ddb_dma        *dma;
205 	struct ddb_io         *redo;
206 	struct ddb_io         *redi;
207 };
208 
209 #define ddb_output ddb_io
210 #define ddb_input ddb_io
211 
212 struct ddb_i2c {
213 	struct ddb            *dev;
214 	u32                    nr;
215 	u32                    regs;
216 	u32                    link;
217 	struct i2c_adapter     adap;
218 	u32                    rbuf;
219 	u32                    wbuf;
220 	u32                    bsize;
221 	struct completion      completion;
222 };
223 
224 struct ddb_port {
225 	struct ddb            *dev;
226 	u32                    nr;
227 	u32                    pnr;
228 	u32                    regs;
229 	u32                    lnr;
230 	struct ddb_i2c        *i2c;
231 	struct mutex           i2c_gate_lock; /* I2C access lock */
232 	u32                    class;
233 #define DDB_PORT_NONE           0
234 #define DDB_PORT_CI             1
235 #define DDB_PORT_TUNER          2
236 #define DDB_PORT_LOOP           3
237 	char                   *name;
238 	char                   *type_name;
239 	u32                     type;
240 #define DDB_TUNER_DUMMY          0xffffffff
241 #define DDB_TUNER_NONE           0
242 #define DDB_TUNER_DVBS_ST        1
243 #define DDB_TUNER_DVBS_ST_AA     2
244 #define DDB_TUNER_DVBCT_TR       3
245 #define DDB_TUNER_DVBCT_ST       4
246 #define DDB_CI_INTERNAL          5
247 #define DDB_CI_EXTERNAL_SONY     6
248 #define DDB_TUNER_DVBCT2_SONY_P  7
249 #define DDB_TUNER_DVBC2T2_SONY_P 8
250 #define DDB_TUNER_ISDBT_SONY_P   9
251 #define DDB_TUNER_DVBS_STV0910_P 10
252 #define DDB_TUNER_MXL5XX         11
253 #define DDB_CI_EXTERNAL_XO2      12
254 #define DDB_CI_EXTERNAL_XO2_B    13
255 #define DDB_TUNER_DVBS_STV0910_PR 14
256 #define DDB_TUNER_DVBC2T2I_SONY_P 15
257 
258 #define DDB_TUNER_XO2            32
259 #define DDB_TUNER_DVBS_STV0910   (DDB_TUNER_XO2 + 0)
260 #define DDB_TUNER_DVBCT2_SONY    (DDB_TUNER_XO2 + 1)
261 #define DDB_TUNER_ISDBT_SONY     (DDB_TUNER_XO2 + 2)
262 #define DDB_TUNER_DVBC2T2_SONY   (DDB_TUNER_XO2 + 3)
263 #define DDB_TUNER_ATSC_ST        (DDB_TUNER_XO2 + 4)
264 #define DDB_TUNER_DVBC2T2I_SONY  (DDB_TUNER_XO2 + 5)
265 
266 #define DDB_TUNER_MCI            48
267 #define DDB_TUNER_MCI_SX8        (DDB_TUNER_MCI + 0)
268 
269 	struct ddb_input      *input[2];
270 	struct ddb_output     *output;
271 	struct dvb_ca_en50221 *en;
272 	u8                     en_freedata;
273 	struct ddb_dvb         dvb[2];
274 	u32                    gap;
275 	u32                    obr;
276 	u8                     creg;
277 };
278 
279 #define CM_STARTUP_DELAY 2
280 #define CM_AVERAGE  20
281 #define CM_GAIN     10
282 
283 #define HW_LSB_SHIFT    12
284 #define HW_LSB_MASK     0x1000
285 
286 #define CM_IDLE    0
287 #define CM_STARTUP 1
288 #define CM_ADJUST  2
289 
290 #define TS_CAPTURE_LEN  (4096)
291 
292 struct ddb_lnb {
293 	struct mutex           lock; /* lock lnb access */
294 	u32                    tone;
295 	enum fe_sec_voltage    oldvoltage[4];
296 	u32                    voltage[4];
297 	u32                    voltages;
298 	u32                    fmode;
299 };
300 
301 struct ddb_irq {
302 	void                   (*handler)(void *);
303 	void                  *data;
304 };
305 
306 struct ddb_link {
307 	struct ddb            *dev;
308 	const struct ddb_info *info;
309 	u32                    nr;
310 	u32                    regs;
311 	spinlock_t             lock; /* lock link access */
312 	struct mutex           flash_mutex; /* lock flash access */
313 	struct ddb_lnb         lnb;
314 	struct tasklet_struct  tasklet;
315 	struct ddb_ids         ids;
316 
317 	spinlock_t             temp_lock; /* lock temp chip access */
318 	int                    overtemperature_error;
319 	u8                     temp_tab[11];
320 	struct ddb_irq         irq[256];
321 };
322 
323 struct ddb {
324 	struct pci_dev          *pdev;
325 	struct platform_device  *pfdev;
326 	struct device           *dev;
327 
328 	int                      msi;
329 	struct workqueue_struct *wq;
330 	u32                      has_dma;
331 
332 	struct ddb_link          link[DDB_MAX_LINK];
333 	unsigned char __iomem   *regs;
334 	u32                      regs_len;
335 	u32                      port_num;
336 	struct ddb_port          port[DDB_MAX_PORT];
337 	u32                      i2c_num;
338 	struct ddb_i2c           i2c[DDB_MAX_I2C];
339 	struct ddb_input         input[DDB_MAX_INPUT];
340 	struct ddb_output        output[DDB_MAX_OUTPUT];
341 	struct dvb_adapter       adap[DDB_MAX_INPUT];
342 	struct ddb_dma           idma[DDB_MAX_INPUT];
343 	struct ddb_dma           odma[DDB_MAX_OUTPUT];
344 
345 	struct device           *ddb_dev;
346 	u32                      ddb_dev_users;
347 	u32                      nr;
348 	u8                       iobuf[1028];
349 
350 	u8                       leds;
351 	u32                      ts_irq;
352 	u32                      i2c_irq;
353 
354 	struct mutex             mutex; /* lock access to global ddb array */
355 
356 	u8                       tsbuf[TS_CAPTURE_LEN];
357 };
358 
359 /****************************************************************************/
360 /****************************************************************************/
361 /****************************************************************************/
362 
363 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
364 
365 /****************************************************************************/
366 
367 /* ddbridge-core.c */
368 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
369 			    void (*handler)(void *), void *data);
370 void ddb_ports_detach(struct ddb *dev);
371 void ddb_ports_release(struct ddb *dev);
372 void ddb_buffers_free(struct ddb *dev);
373 void ddb_device_destroy(struct ddb *dev);
374 irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
375 irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
376 irqreturn_t ddb_irq_handler(int irq, void *dev_id);
377 void ddb_ports_init(struct ddb *dev);
378 int ddb_buffers_alloc(struct ddb *dev);
379 int ddb_ports_attach(struct ddb *dev);
380 int ddb_device_create(struct ddb *dev);
381 int ddb_init(struct ddb *dev);
382 void ddb_unmap(struct ddb *dev);
383 int ddb_exit_ddbridge(int stage, int error);
384 int ddb_init_ddbridge(void);
385 
386 #endif /* DDBRIDGE_H */
387