1 /* 2 * ddbridge-ci.c: Digital Devices bridge CI (DuoFlex, CI Bridge) support 3 * 4 * Copyright (C) 2010-2017 Digital Devices GmbH 5 * Marcus Metzler <mocm@metzlerbros.de> 6 * Ralph Metzler <rjkm@metzlerbros.de> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 only, as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * To obtain the license, point your browser to 18 * http://www.gnu.org/copyleft/gpl.html 19 */ 20 21 #include "ddbridge.h" 22 #include "ddbridge-regs.h" 23 #include "ddbridge-ci.h" 24 #include "ddbridge-io.h" 25 #include "ddbridge-i2c.h" 26 27 #include "cxd2099.h" 28 29 /* Octopus CI internal CI interface */ 30 31 static int wait_ci_ready(struct ddb_ci *ci) 32 { 33 u32 count = 10; 34 35 ndelay(500); 36 do { 37 if (ddbreadl(ci->port->dev, 38 CI_CONTROL(ci->nr)) & CI_READY) 39 break; 40 usleep_range(1, 2); 41 if ((--count) == 0) 42 return -1; 43 } while (1); 44 return 0; 45 } 46 47 static int read_attribute_mem(struct dvb_ca_en50221 *ca, 48 int slot, int address) 49 { 50 struct ddb_ci *ci = ca->data; 51 u32 val, off = (address >> 1) & (CI_BUFFER_SIZE - 1); 52 53 if (address > CI_BUFFER_SIZE) 54 return -1; 55 ddbwritel(ci->port->dev, CI_READ_CMD | (1 << 16) | address, 56 CI_DO_READ_ATTRIBUTES(ci->nr)); 57 wait_ci_ready(ci); 58 val = 0xff & ddbreadl(ci->port->dev, CI_BUFFER(ci->nr) + off); 59 return val; 60 } 61 62 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, 63 int address, u8 value) 64 { 65 struct ddb_ci *ci = ca->data; 66 67 ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address, 68 CI_DO_ATTRIBUTE_RW(ci->nr)); 69 wait_ci_ready(ci); 70 return 0; 71 } 72 73 static int read_cam_control(struct dvb_ca_en50221 *ca, 74 int slot, u8 address) 75 { 76 u32 count = 100; 77 struct ddb_ci *ci = ca->data; 78 u32 res; 79 80 ddbwritel(ci->port->dev, CI_READ_CMD | address, 81 CI_DO_IO_RW(ci->nr)); 82 ndelay(500); 83 do { 84 res = ddbreadl(ci->port->dev, CI_READDATA(ci->nr)); 85 if (res & CI_READY) 86 break; 87 usleep_range(1, 2); 88 if ((--count) == 0) 89 return -1; 90 } while (1); 91 return 0xff & res; 92 } 93 94 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot, 95 u8 address, u8 value) 96 { 97 struct ddb_ci *ci = ca->data; 98 99 ddbwritel(ci->port->dev, CI_WRITE_CMD | (value << 16) | address, 100 CI_DO_IO_RW(ci->nr)); 101 wait_ci_ready(ci); 102 return 0; 103 } 104 105 static int slot_reset(struct dvb_ca_en50221 *ca, int slot) 106 { 107 struct ddb_ci *ci = ca->data; 108 109 ddbwritel(ci->port->dev, CI_POWER_ON, 110 CI_CONTROL(ci->nr)); 111 msleep(100); 112 ddbwritel(ci->port->dev, CI_POWER_ON | CI_RESET_CAM, 113 CI_CONTROL(ci->nr)); 114 ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON | CI_RESET_CAM, 115 CI_CONTROL(ci->nr)); 116 usleep_range(20, 25); 117 ddbwritel(ci->port->dev, CI_ENABLE | CI_POWER_ON, 118 CI_CONTROL(ci->nr)); 119 return 0; 120 } 121 122 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot) 123 { 124 struct ddb_ci *ci = ca->data; 125 126 ddbwritel(ci->port->dev, 0, CI_CONTROL(ci->nr)); 127 msleep(300); 128 return 0; 129 } 130 131 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot) 132 { 133 struct ddb_ci *ci = ca->data; 134 u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr)); 135 136 ddbwritel(ci->port->dev, val | CI_BYPASS_DISABLE, 137 CI_CONTROL(ci->nr)); 138 return 0; 139 } 140 141 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open) 142 { 143 struct ddb_ci *ci = ca->data; 144 u32 val = ddbreadl(ci->port->dev, CI_CONTROL(ci->nr)); 145 int stat = 0; 146 147 if (val & CI_CAM_DETECT) 148 stat |= DVB_CA_EN50221_POLL_CAM_PRESENT; 149 if (val & CI_CAM_READY) 150 stat |= DVB_CA_EN50221_POLL_CAM_READY; 151 return stat; 152 } 153 154 static struct dvb_ca_en50221 en_templ = { 155 .read_attribute_mem = read_attribute_mem, 156 .write_attribute_mem = write_attribute_mem, 157 .read_cam_control = read_cam_control, 158 .write_cam_control = write_cam_control, 159 .slot_reset = slot_reset, 160 .slot_shutdown = slot_shutdown, 161 .slot_ts_enable = slot_ts_enable, 162 .poll_slot_status = poll_slot_status, 163 }; 164 165 static void ci_attach(struct ddb_port *port) 166 { 167 struct ddb_ci *ci = NULL; 168 169 ci = kzalloc(sizeof(*ci), GFP_KERNEL); 170 if (!ci) 171 return; 172 memcpy(&ci->en, &en_templ, sizeof(en_templ)); 173 ci->en.data = ci; 174 port->en = &ci->en; 175 ci->port = port; 176 ci->nr = port->nr - 2; 177 } 178 179 /* DuoFlex Dual CI support */ 180 181 static int write_creg(struct ddb_ci *ci, u8 data, u8 mask) 182 { 183 struct i2c_adapter *i2c = &ci->port->i2c->adap; 184 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13; 185 186 ci->port->creg = (ci->port->creg & ~mask) | data; 187 return i2c_write_reg(i2c, adr, 0x02, ci->port->creg); 188 } 189 190 static int read_attribute_mem_xo2(struct dvb_ca_en50221 *ca, 191 int slot, int address) 192 { 193 struct ddb_ci *ci = ca->data; 194 struct i2c_adapter *i2c = &ci->port->i2c->adap; 195 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13; 196 int res; 197 u8 val; 198 199 res = i2c_read_reg16(i2c, adr, 0x8000 | address, &val); 200 return res ? res : val; 201 } 202 203 static int write_attribute_mem_xo2(struct dvb_ca_en50221 *ca, int slot, 204 int address, u8 value) 205 { 206 struct ddb_ci *ci = ca->data; 207 struct i2c_adapter *i2c = &ci->port->i2c->adap; 208 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13; 209 210 return i2c_write_reg16(i2c, adr, 0x8000 | address, value); 211 } 212 213 static int read_cam_control_xo2(struct dvb_ca_en50221 *ca, 214 int slot, u8 address) 215 { 216 struct ddb_ci *ci = ca->data; 217 struct i2c_adapter *i2c = &ci->port->i2c->adap; 218 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13; 219 u8 val; 220 int res; 221 222 res = i2c_read_reg(i2c, adr, 0x20 | (address & 3), &val); 223 return res ? res : val; 224 } 225 226 static int write_cam_control_xo2(struct dvb_ca_en50221 *ca, int slot, 227 u8 address, u8 value) 228 { 229 struct ddb_ci *ci = ca->data; 230 struct i2c_adapter *i2c = &ci->port->i2c->adap; 231 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13; 232 233 return i2c_write_reg(i2c, adr, 0x20 | (address & 3), value); 234 } 235 236 static int slot_reset_xo2(struct dvb_ca_en50221 *ca, int slot) 237 { 238 struct ddb_ci *ci = ca->data; 239 240 dev_dbg(ci->port->dev->dev, "%s\n", __func__); 241 write_creg(ci, 0x01, 0x01); 242 write_creg(ci, 0x04, 0x04); 243 msleep(20); 244 write_creg(ci, 0x02, 0x02); 245 write_creg(ci, 0x00, 0x04); 246 write_creg(ci, 0x18, 0x18); 247 return 0; 248 } 249 250 static int slot_shutdown_xo2(struct dvb_ca_en50221 *ca, int slot) 251 { 252 struct ddb_ci *ci = ca->data; 253 254 dev_dbg(ci->port->dev->dev, "%s\n", __func__); 255 write_creg(ci, 0x10, 0xff); 256 write_creg(ci, 0x08, 0x08); 257 return 0; 258 } 259 260 static int slot_ts_enable_xo2(struct dvb_ca_en50221 *ca, int slot) 261 { 262 struct ddb_ci *ci = ca->data; 263 264 dev_dbg(ci->port->dev->dev, "%s\n", __func__); 265 write_creg(ci, 0x00, 0x10); 266 return 0; 267 } 268 269 static int poll_slot_status_xo2(struct dvb_ca_en50221 *ca, int slot, int open) 270 { 271 struct ddb_ci *ci = ca->data; 272 struct i2c_adapter *i2c = &ci->port->i2c->adap; 273 u8 adr = (ci->port->type == DDB_CI_EXTERNAL_XO2) ? 0x12 : 0x13; 274 u8 val = 0; 275 int stat = 0; 276 277 i2c_read_reg(i2c, adr, 0x01, &val); 278 279 if (val & 2) 280 stat |= DVB_CA_EN50221_POLL_CAM_PRESENT; 281 if (val & 1) 282 stat |= DVB_CA_EN50221_POLL_CAM_READY; 283 return stat; 284 } 285 286 static struct dvb_ca_en50221 en_xo2_templ = { 287 .read_attribute_mem = read_attribute_mem_xo2, 288 .write_attribute_mem = write_attribute_mem_xo2, 289 .read_cam_control = read_cam_control_xo2, 290 .write_cam_control = write_cam_control_xo2, 291 .slot_reset = slot_reset_xo2, 292 .slot_shutdown = slot_shutdown_xo2, 293 .slot_ts_enable = slot_ts_enable_xo2, 294 .poll_slot_status = poll_slot_status_xo2, 295 }; 296 297 static void ci_xo2_attach(struct ddb_port *port) 298 { 299 struct ddb_ci *ci; 300 301 ci = kzalloc(sizeof(*ci), GFP_KERNEL); 302 if (!ci) 303 return; 304 memcpy(&ci->en, &en_xo2_templ, sizeof(en_xo2_templ)); 305 ci->en.data = ci; 306 port->en = &ci->en; 307 ci->port = port; 308 ci->nr = port->nr - 2; 309 ci->port->creg = 0; 310 write_creg(ci, 0x10, 0xff); 311 write_creg(ci, 0x08, 0x08); 312 } 313 314 static struct cxd2099_cfg cxd_cfg = { 315 .bitrate = 72000, 316 .adr = 0x40, 317 .polarity = 1, 318 .clock_mode = 1, 319 .max_i2c = 512, 320 }; 321 322 int ddb_ci_attach(struct ddb_port *port, u32 bitrate) 323 { 324 switch (port->type) { 325 case DDB_CI_EXTERNAL_SONY: 326 cxd_cfg.bitrate = bitrate; 327 port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap); 328 if (!port->en) 329 return -ENODEV; 330 break; 331 332 case DDB_CI_EXTERNAL_XO2: 333 case DDB_CI_EXTERNAL_XO2_B: 334 ci_xo2_attach(port); 335 if (!port->en) 336 return -ENODEV; 337 break; 338 339 case DDB_CI_INTERNAL: 340 ci_attach(port); 341 if (!port->en) 342 return -ENODEV; 343 break; 344 } 345 346 dvb_ca_en50221_init(port->dvb[0].adap, port->en, 0, 1); 347 return 0; 348 } 349 350 void ddb_ci_detach(struct ddb_port *port) 351 { 352 if (port->dvb[0].dev) 353 dvb_unregister_device(port->dvb[0].dev); 354 if (port->en) { 355 dvb_ca_en50221_release(port->en); 356 kfree(port->en->data); 357 port->en = NULL; 358 } 359 } 360