xref: /linux/drivers/media/pci/cx88/cx88.h (revision 48a8a03b5806179f12dd6994a6957f797c13675f)
1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *
3b285192aSMauro Carvalho Chehab  * v4l2 device driver for cx2388x based TV cards
4b285192aSMauro Carvalho Chehab  *
5b285192aSMauro Carvalho Chehab  * (c) 2003,04 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
6b285192aSMauro Carvalho Chehab  *
7b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
8b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
9b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
10b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
11b285192aSMauro Carvalho Chehab  *
12b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
13b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
14b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  *
17b285192aSMauro Carvalho Chehab  *  You should have received a copy of the GNU General Public License
18b285192aSMauro Carvalho Chehab  *  along with this program; if not, write to the Free Software
19b285192aSMauro Carvalho Chehab  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20b285192aSMauro Carvalho Chehab  */
21b285192aSMauro Carvalho Chehab 
22b285192aSMauro Carvalho Chehab #include <linux/pci.h>
23b285192aSMauro Carvalho Chehab #include <linux/i2c.h>
24b285192aSMauro Carvalho Chehab #include <linux/i2c-algo-bit.h>
25b285192aSMauro Carvalho Chehab #include <linux/videodev2.h>
26b285192aSMauro Carvalho Chehab #include <linux/kdev_t.h>
27b285192aSMauro Carvalho Chehab 
28b285192aSMauro Carvalho Chehab #include <media/v4l2-device.h>
29b285192aSMauro Carvalho Chehab #include <media/v4l2-fh.h>
30b285192aSMauro Carvalho Chehab #include <media/tuner.h>
31b285192aSMauro Carvalho Chehab #include <media/tveeprom.h>
32b285192aSMauro Carvalho Chehab #include <media/videobuf-dma-sg.h>
33b285192aSMauro Carvalho Chehab #include <media/v4l2-chip-ident.h>
34b285192aSMauro Carvalho Chehab #include <media/cx2341x.h>
35b285192aSMauro Carvalho Chehab #include <media/videobuf-dvb.h>
36b285192aSMauro Carvalho Chehab #include <media/ir-kbd-i2c.h>
37b285192aSMauro Carvalho Chehab #include <media/wm8775.h>
38b285192aSMauro Carvalho Chehab 
39b285192aSMauro Carvalho Chehab #include "btcx-risc.h"
40b285192aSMauro Carvalho Chehab #include "cx88-reg.h"
41b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
42b285192aSMauro Carvalho Chehab 
43b285192aSMauro Carvalho Chehab #include <linux/mutex.h>
44b285192aSMauro Carvalho Chehab 
45b285192aSMauro Carvalho Chehab #define CX88_VERSION "0.0.9"
46b285192aSMauro Carvalho Chehab 
47b285192aSMauro Carvalho Chehab #define UNSET (-1U)
48b285192aSMauro Carvalho Chehab 
49b285192aSMauro Carvalho Chehab #define CX88_MAXBOARDS 8
50b285192aSMauro Carvalho Chehab 
51b285192aSMauro Carvalho Chehab /* Max number of inputs by card */
52b285192aSMauro Carvalho Chehab #define MAX_CX88_INPUT 8
53b285192aSMauro Carvalho Chehab 
54b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
55b285192aSMauro Carvalho Chehab /* defines and enums                                           */
56b285192aSMauro Carvalho Chehab 
57b285192aSMauro Carvalho Chehab /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM/LC */
58b285192aSMauro Carvalho Chehab #define CX88_NORMS (V4L2_STD_ALL 		\
59b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_PAL_H		\
60b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_NTSC_M_KR	\
61b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_SECAM_LC)
62b285192aSMauro Carvalho Chehab 
63b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PACKED       0x01
64b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PLANAR       0x02
65b285192aSMauro Carvalho Chehab 
66b285192aSMauro Carvalho Chehab #define VBI_LINE_COUNT              17
67b285192aSMauro Carvalho Chehab #define VBI_LINE_LENGTH           2048
68b285192aSMauro Carvalho Chehab 
69b285192aSMauro Carvalho Chehab #define AUD_RDS_LINES		     4
70b285192aSMauro Carvalho Chehab 
71b285192aSMauro Carvalho Chehab /* need "shadow" registers for some write-only ones ... */
72b285192aSMauro Carvalho Chehab #define SHADOW_AUD_VOL_CTL           1
73b285192aSMauro Carvalho Chehab #define SHADOW_AUD_BAL_CTL           2
74b285192aSMauro Carvalho Chehab #define SHADOW_MAX                   3
75b285192aSMauro Carvalho Chehab 
76b285192aSMauro Carvalho Chehab /* FM Radio deemphasis type */
77b285192aSMauro Carvalho Chehab enum cx88_deemph_type {
78b285192aSMauro Carvalho Chehab 	FM_NO_DEEMPH = 0,
79b285192aSMauro Carvalho Chehab 	FM_DEEMPH_50,
80b285192aSMauro Carvalho Chehab 	FM_DEEMPH_75
81b285192aSMauro Carvalho Chehab };
82b285192aSMauro Carvalho Chehab 
83b285192aSMauro Carvalho Chehab enum cx88_board_type {
84b285192aSMauro Carvalho Chehab 	CX88_BOARD_NONE = 0,
85b285192aSMauro Carvalho Chehab 	CX88_MPEG_DVB,
86b285192aSMauro Carvalho Chehab 	CX88_MPEG_BLACKBIRD
87b285192aSMauro Carvalho Chehab };
88b285192aSMauro Carvalho Chehab 
89b285192aSMauro Carvalho Chehab enum cx8802_board_access {
90b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_SHARED    = 1,
91b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_EXCLUSIVE = 2,
92b285192aSMauro Carvalho Chehab };
93b285192aSMauro Carvalho Chehab 
94b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
95b285192aSMauro Carvalho Chehab /* tv norms                                                    */
96b285192aSMauro Carvalho Chehab 
9734206439SMauro Carvalho Chehab static inline unsigned int norm_maxw(v4l2_std_id norm)
98b285192aSMauro Carvalho Chehab {
99b285192aSMauro Carvalho Chehab 	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
100b285192aSMauro Carvalho Chehab }
101b285192aSMauro Carvalho Chehab 
102b285192aSMauro Carvalho Chehab 
10334206439SMauro Carvalho Chehab static inline unsigned int norm_maxh(v4l2_std_id norm)
104b285192aSMauro Carvalho Chehab {
105b285192aSMauro Carvalho Chehab 	return (norm & V4L2_STD_625_50) ? 576 : 480;
106b285192aSMauro Carvalho Chehab }
107b285192aSMauro Carvalho Chehab 
108b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
109b285192aSMauro Carvalho Chehab /* static data                                                 */
110b285192aSMauro Carvalho Chehab 
111b285192aSMauro Carvalho Chehab struct cx8800_fmt {
112b285192aSMauro Carvalho Chehab 	const char  *name;
113b285192aSMauro Carvalho Chehab 	u32   fourcc;          /* v4l2 format id */
114b285192aSMauro Carvalho Chehab 	int   depth;
115b285192aSMauro Carvalho Chehab 	int   flags;
116b285192aSMauro Carvalho Chehab 	u32   cxformat;
117b285192aSMauro Carvalho Chehab };
118b285192aSMauro Carvalho Chehab 
119b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
120b285192aSMauro Carvalho Chehab /* SRAM memory management data (see cx88-core.c)               */
121b285192aSMauro Carvalho Chehab 
122b285192aSMauro Carvalho Chehab #define SRAM_CH21 0   /* video */
123b285192aSMauro Carvalho Chehab #define SRAM_CH22 1
124b285192aSMauro Carvalho Chehab #define SRAM_CH23 2
125b285192aSMauro Carvalho Chehab #define SRAM_CH24 3   /* vbi   */
126b285192aSMauro Carvalho Chehab #define SRAM_CH25 4   /* audio */
127b285192aSMauro Carvalho Chehab #define SRAM_CH26 5
128b285192aSMauro Carvalho Chehab #define SRAM_CH28 6   /* mpeg */
129b285192aSMauro Carvalho Chehab #define SRAM_CH27 7   /* audio rds */
130b285192aSMauro Carvalho Chehab /* more */
131b285192aSMauro Carvalho Chehab 
132b285192aSMauro Carvalho Chehab struct sram_channel {
133b285192aSMauro Carvalho Chehab 	const char *name;
134b285192aSMauro Carvalho Chehab 	u32  cmds_start;
135b285192aSMauro Carvalho Chehab 	u32  ctrl_start;
136b285192aSMauro Carvalho Chehab 	u32  cdt;
137b285192aSMauro Carvalho Chehab 	u32  fifo_start;
138b285192aSMauro Carvalho Chehab 	u32  fifo_size;
139b285192aSMauro Carvalho Chehab 	u32  ptr1_reg;
140b285192aSMauro Carvalho Chehab 	u32  ptr2_reg;
141b285192aSMauro Carvalho Chehab 	u32  cnt1_reg;
142b285192aSMauro Carvalho Chehab 	u32  cnt2_reg;
143b285192aSMauro Carvalho Chehab };
144b285192aSMauro Carvalho Chehab extern const struct sram_channel cx88_sram_channels[];
145b285192aSMauro Carvalho Chehab 
146b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
147b285192aSMauro Carvalho Chehab /* card configuration                                          */
148b285192aSMauro Carvalho Chehab 
149b285192aSMauro Carvalho Chehab #define CX88_BOARD_NOAUTO               UNSET
150b285192aSMauro Carvalho Chehab #define CX88_BOARD_UNKNOWN                  0
151b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE                1
152b285192aSMauro Carvalho Chehab #define CX88_BOARD_GDI                      2
153b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW                3
154b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_WONDER_PRO           4
155b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST2000XP_EXPERT     5
156b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_STUDIO_303        6
157b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE_MASTER    7
158b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DV2000           8
159b285192aSMauro Carvalho Chehab #define CX88_BOARD_LEADTEK_PVR2000          9
160b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVVCP3PCI        10
161b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PLAYTVPVR       11
162b285192aSMauro Carvalho Chehab #define CX88_BOARD_ASUS_PVR_416            12
163b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE          13
164b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T            14
165b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
166b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_LTV883           16
167b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q  17
168b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_DVB_T1        18
169b285192aSMauro Carvalho Chehab #define CX88_BOARD_CONEXANT_DVB_T1         19
170b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROVIDEO_PV259          20
171b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
172b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD3000           22
173b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T         23
174b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_ROSLYN        24
175b285192aSMauro Carvalho Chehab #define CX88_BOARD_DIGITALLOGIC_MEC        25
176b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVBCTV7E         26
177b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
178b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T  28
179b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_DVB_T_PCI          29
180b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1  30
181b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
182b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
183b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
184b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_HDTVWONDER          34
185b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1000         35
186b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_303              36
187b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1  37
188b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASE2_S1    38
189b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVBS_100         39
190b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100       40
191b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100LP     41
192b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO     42
193b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T_CX22702    43
194b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
195b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
196b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
197b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD5500           47
198b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_MCE200_DELUXE    48
199b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_P7000  49
200b285192aSMauro Carvalho Chehab #define CX88_BOARD_NPGTECH_REALTV_TOP10FM  50
201b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H        51
202b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_DVBS          52
203b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR3000       53
204b285192aSMauro Carvalho Chehab #define CX88_BOARD_NORWOOD_MICRO           54
205b285192aSMauro Carvalho Chehab #define CX88_BOARD_TE_DTV_250_OEM_SWANN    55
206b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1300       56
207b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_PTV_390         57
208b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_PCTV_HD_800i   58
209b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
210b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_HYBRID_PCTV    60
211b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
212b285192aSMauro Carvalho Chehab #define CX88_BOARD_POWERCOLOR_REAL_ANGEL   62
213b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_X8000_MT      63
214b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
215b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
216b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_8000GT       66
217b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_ATSC_120         67
218b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000       68
219b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000LITE   69
220b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S460              70
221b285192aSMauro Carvalho Chehab #define CX88_BOARD_OMICOM_SS4_PCI          71
222b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8920                72
223b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S420              73
224b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
225b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7300               75
226b285192aSMauro Carvalho Chehab #define CX88_BOARD_SATTRADE_ST4200         76
227b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8910                77
228b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_6200               78
229b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
230b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_IRONLY        80
231b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H        81
232b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_J      82
233b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7301               83
234b285192aSMauro Carvalho Chehab #define CX88_BOARD_SAMSUNG_SMT_7020        84
235b285192aSMauro Carvalho Chehab #define CX88_BOARD_TWINHAN_VP1027_DVBS     85
236b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S464              86
237b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_PLUS   87
238b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
239b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
240b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
241b285192aSMauro Carvalho Chehab 
242b285192aSMauro Carvalho Chehab enum cx88_itype {
243b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE1 = 1,
244b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE2,
245b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE3,
246b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE4,
247b285192aSMauro Carvalho Chehab 	CX88_VMUX_SVIDEO,
248b285192aSMauro Carvalho Chehab 	CX88_VMUX_TELEVISION,
249b285192aSMauro Carvalho Chehab 	CX88_VMUX_CABLE,
250b285192aSMauro Carvalho Chehab 	CX88_VMUX_DVB,
251b285192aSMauro Carvalho Chehab 	CX88_VMUX_DEBUG,
252b285192aSMauro Carvalho Chehab 	CX88_RADIO,
253b285192aSMauro Carvalho Chehab };
254b285192aSMauro Carvalho Chehab 
255b285192aSMauro Carvalho Chehab struct cx88_input {
256b285192aSMauro Carvalho Chehab 	enum cx88_itype type;
257b285192aSMauro Carvalho Chehab 	u32             gpio0, gpio1, gpio2, gpio3;
258b285192aSMauro Carvalho Chehab 	unsigned int    vmux:2;
259b285192aSMauro Carvalho Chehab 	unsigned int    audioroute:4;
260b285192aSMauro Carvalho Chehab };
261b285192aSMauro Carvalho Chehab 
262b285192aSMauro Carvalho Chehab struct cx88_board {
263b285192aSMauro Carvalho Chehab 	const char              *name;
264b285192aSMauro Carvalho Chehab 	unsigned int            tuner_type;
265b285192aSMauro Carvalho Chehab 	unsigned int		radio_type;
266b285192aSMauro Carvalho Chehab 	unsigned char		tuner_addr;
267b285192aSMauro Carvalho Chehab 	unsigned char		radio_addr;
268b285192aSMauro Carvalho Chehab 	int                     tda9887_conf;
269b285192aSMauro Carvalho Chehab 	struct cx88_input       input[MAX_CX88_INPUT];
270b285192aSMauro Carvalho Chehab 	struct cx88_input       radio;
271b285192aSMauro Carvalho Chehab 	enum cx88_board_type    mpeg;
272b285192aSMauro Carvalho Chehab 	unsigned int            audio_chip;
273b285192aSMauro Carvalho Chehab 	int			num_frontends;
274b285192aSMauro Carvalho Chehab 
275b285192aSMauro Carvalho Chehab 	/* Used for I2S devices */
276b285192aSMauro Carvalho Chehab 	int			i2sinputcntl;
277b285192aSMauro Carvalho Chehab };
278b285192aSMauro Carvalho Chehab 
279b285192aSMauro Carvalho Chehab struct cx88_subid {
280b285192aSMauro Carvalho Chehab 	u16     subvendor;
281b285192aSMauro Carvalho Chehab 	u16     subdevice;
282b285192aSMauro Carvalho Chehab 	u32     card;
283b285192aSMauro Carvalho Chehab };
284b285192aSMauro Carvalho Chehab 
285b285192aSMauro Carvalho Chehab enum cx88_tvaudio {
286b285192aSMauro Carvalho Chehab 	WW_NONE = 1,
287b285192aSMauro Carvalho Chehab 	WW_BTSC,
288b285192aSMauro Carvalho Chehab 	WW_BG,
289b285192aSMauro Carvalho Chehab 	WW_DK,
290b285192aSMauro Carvalho Chehab 	WW_I,
291b285192aSMauro Carvalho Chehab 	WW_L,
292b285192aSMauro Carvalho Chehab 	WW_EIAJ,
293b285192aSMauro Carvalho Chehab 	WW_I2SPT,
294b285192aSMauro Carvalho Chehab 	WW_FM,
295b285192aSMauro Carvalho Chehab 	WW_I2SADC,
296b285192aSMauro Carvalho Chehab 	WW_M
297b285192aSMauro Carvalho Chehab };
298b285192aSMauro Carvalho Chehab 
299b285192aSMauro Carvalho Chehab #define INPUT(nr) (core->board.input[nr])
300b285192aSMauro Carvalho Chehab 
301b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
302b285192aSMauro Carvalho Chehab /* device / file handle status                                 */
303b285192aSMauro Carvalho Chehab 
304b285192aSMauro Carvalho Chehab #define RESOURCE_OVERLAY       1
305b285192aSMauro Carvalho Chehab #define RESOURCE_VIDEO         2
306b285192aSMauro Carvalho Chehab #define RESOURCE_VBI           4
307b285192aSMauro Carvalho Chehab 
308b285192aSMauro Carvalho Chehab #define BUFFER_TIMEOUT     msecs_to_jiffies(2000)
309b285192aSMauro Carvalho Chehab 
310b285192aSMauro Carvalho Chehab /* buffer for one video frame */
311b285192aSMauro Carvalho Chehab struct cx88_buffer {
312b285192aSMauro Carvalho Chehab 	/* common v4l buffer stuff -- must be first */
313b285192aSMauro Carvalho Chehab 	struct videobuf_buffer vb;
314b285192aSMauro Carvalho Chehab 
315b285192aSMauro Carvalho Chehab 	/* cx88 specific */
316b285192aSMauro Carvalho Chehab 	unsigned int           bpl;
317b285192aSMauro Carvalho Chehab 	struct btcx_riscmem    risc;
318b285192aSMauro Carvalho Chehab 	const struct cx8800_fmt *fmt;
319b285192aSMauro Carvalho Chehab 	u32                    count;
320b285192aSMauro Carvalho Chehab };
321b285192aSMauro Carvalho Chehab 
322b285192aSMauro Carvalho Chehab struct cx88_dmaqueue {
323b285192aSMauro Carvalho Chehab 	struct list_head       active;
324b285192aSMauro Carvalho Chehab 	struct list_head       queued;
325b285192aSMauro Carvalho Chehab 	struct timer_list      timeout;
326b285192aSMauro Carvalho Chehab 	struct btcx_riscmem    stopper;
327b285192aSMauro Carvalho Chehab 	u32                    count;
328b285192aSMauro Carvalho Chehab };
329b285192aSMauro Carvalho Chehab 
330b285192aSMauro Carvalho Chehab struct cx88_core {
331b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
332b285192aSMauro Carvalho Chehab 	atomic_t                   refcount;
333b285192aSMauro Carvalho Chehab 
334b285192aSMauro Carvalho Chehab 	/* board name */
335b285192aSMauro Carvalho Chehab 	int                        nr;
336b285192aSMauro Carvalho Chehab 	char                       name[32];
337*48a8a03bSMauro Carvalho Chehab 	u32			   model;
338b285192aSMauro Carvalho Chehab 
339b285192aSMauro Carvalho Chehab 	/* pci stuff */
340b285192aSMauro Carvalho Chehab 	int                        pci_bus;
341b285192aSMauro Carvalho Chehab 	int                        pci_slot;
342b285192aSMauro Carvalho Chehab 	u32                        __iomem *lmmio;
343b285192aSMauro Carvalho Chehab 	u8                         __iomem *bmmio;
344b285192aSMauro Carvalho Chehab 	u32                        shadow[SHADOW_MAX];
345b285192aSMauro Carvalho Chehab 	int                        pci_irqmask;
346b285192aSMauro Carvalho Chehab 
347b285192aSMauro Carvalho Chehab 	/* i2c i/o */
348b285192aSMauro Carvalho Chehab 	struct i2c_adapter         i2c_adap;
349b285192aSMauro Carvalho Chehab 	struct i2c_algo_bit_data   i2c_algo;
350b285192aSMauro Carvalho Chehab 	struct i2c_client          i2c_client;
351b285192aSMauro Carvalho Chehab 	u32                        i2c_state, i2c_rc;
352b285192aSMauro Carvalho Chehab 
353b285192aSMauro Carvalho Chehab 	/* config info -- analog */
354b285192aSMauro Carvalho Chehab 	struct v4l2_device 	   v4l2_dev;
355b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   video_hdl;
356b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl	   *chroma_agc;
357b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   audio_hdl;
358b285192aSMauro Carvalho Chehab 	struct v4l2_subdev	   *sd_wm8775;
359b285192aSMauro Carvalho Chehab 	struct i2c_client 	   *i2c_rtc;
360b285192aSMauro Carvalho Chehab 	unsigned int               boardnr;
361b285192aSMauro Carvalho Chehab 	struct cx88_board	   board;
362b285192aSMauro Carvalho Chehab 
363b285192aSMauro Carvalho Chehab 	/* Supported V4L _STD_ tuner formats */
364b285192aSMauro Carvalho Chehab 	unsigned int               tuner_formats;
365b285192aSMauro Carvalho Chehab 
366b285192aSMauro Carvalho Chehab 	/* config info -- dvb */
3678268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
368b285192aSMauro Carvalho Chehab 	int 			   (*prev_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
369b285192aSMauro Carvalho Chehab #endif
370b285192aSMauro Carvalho Chehab 	void			   (*gate_ctrl)(struct cx88_core  *core, int open);
371b285192aSMauro Carvalho Chehab 
372b285192aSMauro Carvalho Chehab 	/* state info */
373b285192aSMauro Carvalho Chehab 	struct task_struct         *kthread;
374b285192aSMauro Carvalho Chehab 	v4l2_std_id                tvnorm;
375b285192aSMauro Carvalho Chehab 	enum cx88_tvaudio          tvaudio;
376b285192aSMauro Carvalho Chehab 	u32                        audiomode_manual;
377b285192aSMauro Carvalho Chehab 	u32                        audiomode_current;
378b285192aSMauro Carvalho Chehab 	u32                        input;
379b285192aSMauro Carvalho Chehab 	u32                        last_analog_input;
380b285192aSMauro Carvalho Chehab 	u32                        astat;
381b285192aSMauro Carvalho Chehab 	u32			   use_nicam;
382b285192aSMauro Carvalho Chehab 	unsigned long		   last_change;
383b285192aSMauro Carvalho Chehab 
384b285192aSMauro Carvalho Chehab 	/* IR remote control state */
385b285192aSMauro Carvalho Chehab 	struct cx88_IR             *ir;
386b285192aSMauro Carvalho Chehab 
387b285192aSMauro Carvalho Chehab 	/* I2C remote data */
388b285192aSMauro Carvalho Chehab 	struct IR_i2c_init_data    init_data;
389b285192aSMauro Carvalho Chehab 	struct wm8775_platform_data wm8775_data;
390b285192aSMauro Carvalho Chehab 
391b285192aSMauro Carvalho Chehab 	struct mutex               lock;
392b285192aSMauro Carvalho Chehab 	/* various v4l controls */
393b285192aSMauro Carvalho Chehab 	u32                        freq;
394b285192aSMauro Carvalho Chehab 	int                        users;
395b285192aSMauro Carvalho Chehab 	int                        mpeg_users;
396b285192aSMauro Carvalho Chehab 
397b285192aSMauro Carvalho Chehab 	/* cx88-video needs to access cx8802 for hybrid tuner pll access. */
398b285192aSMauro Carvalho Chehab 	struct cx8802_dev          *dvbdev;
399b285192aSMauro Carvalho Chehab 	enum cx88_board_type       active_type_id;
400b285192aSMauro Carvalho Chehab 	int			   active_ref;
401b285192aSMauro Carvalho Chehab 	int			   active_fe_id;
402b285192aSMauro Carvalho Chehab };
403b285192aSMauro Carvalho Chehab 
404b285192aSMauro Carvalho Chehab static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
405b285192aSMauro Carvalho Chehab {
406b285192aSMauro Carvalho Chehab 	return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
407b285192aSMauro Carvalho Chehab }
408b285192aSMauro Carvalho Chehab 
409b285192aSMauro Carvalho Chehab #define call_hw(core, grpid, o, f, args...) \
410b285192aSMauro Carvalho Chehab 	do {							\
411b285192aSMauro Carvalho Chehab 		if (!core->i2c_rc) {				\
412b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
413b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);	\
414b285192aSMauro Carvalho Chehab 			v4l2_device_call_all(&core->v4l2_dev, grpid, o, f, ##args); \
415b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
416b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);	\
417b285192aSMauro Carvalho Chehab 		}						\
418b285192aSMauro Carvalho Chehab 	} while (0)
419b285192aSMauro Carvalho Chehab 
420b285192aSMauro Carvalho Chehab #define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args)
421b285192aSMauro Carvalho Chehab 
422b285192aSMauro Carvalho Chehab #define WM8775_GID      (1 << 0)
423b285192aSMauro Carvalho Chehab 
424b285192aSMauro Carvalho Chehab #define wm8775_s_ctrl(core, id, val) \
425b285192aSMauro Carvalho Chehab 	do {									\
426b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =					\
427b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);	\
428b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {					\
429b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
430b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);			\
431b285192aSMauro Carvalho Chehab 			v4l2_ctrl_s_ctrl(ctrl_, val);				\
432b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
433b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);			\
434b285192aSMauro Carvalho Chehab 		}								\
435b285192aSMauro Carvalho Chehab 	} while (0)
436b285192aSMauro Carvalho Chehab 
437b285192aSMauro Carvalho Chehab #define wm8775_g_ctrl(core, id) \
438b285192aSMauro Carvalho Chehab 	({									\
439b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =					\
440b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);	\
441b285192aSMauro Carvalho Chehab 		s32 val = 0;							\
442b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {					\
443b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
444b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);			\
445b285192aSMauro Carvalho Chehab 			val = v4l2_ctrl_g_ctrl(ctrl_);				\
446b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
447b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);			\
448b285192aSMauro Carvalho Chehab 		}								\
449b285192aSMauro Carvalho Chehab 		val;								\
450b285192aSMauro Carvalho Chehab 	})
451b285192aSMauro Carvalho Chehab 
452b285192aSMauro Carvalho Chehab struct cx8800_dev;
453b285192aSMauro Carvalho Chehab struct cx8802_dev;
454b285192aSMauro Carvalho Chehab 
455b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
456b285192aSMauro Carvalho Chehab /* function 0: video stuff                                     */
457b285192aSMauro Carvalho Chehab 
458b285192aSMauro Carvalho Chehab struct cx8800_fh {
459b285192aSMauro Carvalho Chehab 	struct v4l2_fh		   fh;
460b285192aSMauro Carvalho Chehab 	struct cx8800_dev          *dev;
461b285192aSMauro Carvalho Chehab 	unsigned int               resources;
462b285192aSMauro Carvalho Chehab 
463b285192aSMauro Carvalho Chehab 	/* video capture */
464b285192aSMauro Carvalho Chehab 	struct videobuf_queue      vidq;
465b285192aSMauro Carvalho Chehab 
466b285192aSMauro Carvalho Chehab 	/* vbi capture */
467b285192aSMauro Carvalho Chehab 	struct videobuf_queue      vbiq;
468b285192aSMauro Carvalho Chehab };
469b285192aSMauro Carvalho Chehab 
470b285192aSMauro Carvalho Chehab struct cx8800_suspend_state {
471b285192aSMauro Carvalho Chehab 	int                        disabled;
472b285192aSMauro Carvalho Chehab };
473b285192aSMauro Carvalho Chehab 
474b285192aSMauro Carvalho Chehab struct cx8800_dev {
475b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
476b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
477b285192aSMauro Carvalho Chehab 
478b285192aSMauro Carvalho Chehab 	/* various device info */
479b285192aSMauro Carvalho Chehab 	unsigned int               resources;
480b285192aSMauro Carvalho Chehab 	struct video_device        *video_dev;
481b285192aSMauro Carvalho Chehab 	struct video_device        *vbi_dev;
482b285192aSMauro Carvalho Chehab 	struct video_device        *radio_dev;
483b285192aSMauro Carvalho Chehab 
484b285192aSMauro Carvalho Chehab 	/* pci i/o */
485b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
486b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev,pci_lat;
487b285192aSMauro Carvalho Chehab 
488b285192aSMauro Carvalho Chehab 	const struct cx8800_fmt    *fmt;
489b285192aSMauro Carvalho Chehab 	unsigned int               width, height;
490b285192aSMauro Carvalho Chehab 
491b285192aSMauro Carvalho Chehab 	/* capture queues */
492b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vidq;
493b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vbiq;
494b285192aSMauro Carvalho Chehab 
495b285192aSMauro Carvalho Chehab 	/* various v4l controls */
496b285192aSMauro Carvalho Chehab 
497b285192aSMauro Carvalho Chehab 	/* other global state info */
498b285192aSMauro Carvalho Chehab 	struct cx8800_suspend_state state;
499b285192aSMauro Carvalho Chehab };
500b285192aSMauro Carvalho Chehab 
501b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
502b285192aSMauro Carvalho Chehab /* function 1: audio/alsa stuff                                */
503b285192aSMauro Carvalho Chehab /* =============> moved to cx88-alsa.c <====================== */
504b285192aSMauro Carvalho Chehab 
505b285192aSMauro Carvalho Chehab 
506b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
507b285192aSMauro Carvalho Chehab /* function 2: mpeg stuff                                      */
508b285192aSMauro Carvalho Chehab 
509b285192aSMauro Carvalho Chehab struct cx8802_fh {
510b285192aSMauro Carvalho Chehab 	struct v4l2_fh		   fh;
511b285192aSMauro Carvalho Chehab 	struct cx8802_dev          *dev;
512b285192aSMauro Carvalho Chehab 	struct videobuf_queue      mpegq;
513b285192aSMauro Carvalho Chehab };
514b285192aSMauro Carvalho Chehab 
515b285192aSMauro Carvalho Chehab struct cx8802_suspend_state {
516b285192aSMauro Carvalho Chehab 	int                        disabled;
517b285192aSMauro Carvalho Chehab };
518b285192aSMauro Carvalho Chehab 
519b285192aSMauro Carvalho Chehab struct cx8802_driver {
520b285192aSMauro Carvalho Chehab 	struct cx88_core *core;
521b285192aSMauro Carvalho Chehab 
522b285192aSMauro Carvalho Chehab 	/* List of drivers attached to device */
523b285192aSMauro Carvalho Chehab 	struct list_head drvlist;
524b285192aSMauro Carvalho Chehab 
525b285192aSMauro Carvalho Chehab 	/* Type of driver and access required */
526b285192aSMauro Carvalho Chehab 	enum cx88_board_type type_id;
527b285192aSMauro Carvalho Chehab 	enum cx8802_board_access hw_access;
528b285192aSMauro Carvalho Chehab 
529b285192aSMauro Carvalho Chehab 	/* MPEG 8802 internal only */
530b285192aSMauro Carvalho Chehab 	int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
531b285192aSMauro Carvalho Chehab 	int (*resume)(struct pci_dev *pci_dev);
532b285192aSMauro Carvalho Chehab 
533b285192aSMauro Carvalho Chehab 	/* Callers to the following functions must hold core->lock */
534b285192aSMauro Carvalho Chehab 
535b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Driver probe and configuration */
536b285192aSMauro Carvalho Chehab 	int (*probe)(struct cx8802_driver *drv);
537b285192aSMauro Carvalho Chehab 	int (*remove)(struct cx8802_driver *drv);
538b285192aSMauro Carvalho Chehab 
539b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Access for hardware control */
540b285192aSMauro Carvalho Chehab 	int (*advise_acquire)(struct cx8802_driver *drv);
541b285192aSMauro Carvalho Chehab 	int (*advise_release)(struct cx8802_driver *drv);
542b285192aSMauro Carvalho Chehab 
543b285192aSMauro Carvalho Chehab 	/* MPEG 8802 <- mini driver - Access for hardware control */
544b285192aSMauro Carvalho Chehab 	int (*request_acquire)(struct cx8802_driver *drv);
545b285192aSMauro Carvalho Chehab 	int (*request_release)(struct cx8802_driver *drv);
546b285192aSMauro Carvalho Chehab };
547b285192aSMauro Carvalho Chehab 
548b285192aSMauro Carvalho Chehab struct cx8802_dev {
549b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
550b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
551b285192aSMauro Carvalho Chehab 
552b285192aSMauro Carvalho Chehab 	/* pci i/o */
553b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
554b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev,pci_lat;
555b285192aSMauro Carvalho Chehab 
556b285192aSMauro Carvalho Chehab 	/* dma queues */
557b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       mpegq;
558b285192aSMauro Carvalho Chehab 	u32                        ts_packet_size;
559b285192aSMauro Carvalho Chehab 	u32                        ts_packet_count;
560b285192aSMauro Carvalho Chehab 
561b285192aSMauro Carvalho Chehab 	/* other global state info */
562b285192aSMauro Carvalho Chehab 	struct cx8802_suspend_state state;
563b285192aSMauro Carvalho Chehab 
564b285192aSMauro Carvalho Chehab 	/* for blackbird only */
565b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
5668268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_BLACKBIRD)
567b285192aSMauro Carvalho Chehab 	struct video_device        *mpeg_dev;
568b285192aSMauro Carvalho Chehab 	u32                        mailbox;
569b285192aSMauro Carvalho Chehab 	int                        width;
570b285192aSMauro Carvalho Chehab 	int                        height;
571b285192aSMauro Carvalho Chehab 	unsigned char              mpeg_active; /* nonzero if mpeg encoder is active */
572b285192aSMauro Carvalho Chehab 
573b285192aSMauro Carvalho Chehab 	/* mpeg params */
574b285192aSMauro Carvalho Chehab 	struct cx2341x_handler     cxhdl;
575b285192aSMauro Carvalho Chehab #endif
576b285192aSMauro Carvalho Chehab 
5778268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
578b285192aSMauro Carvalho Chehab 	/* for dvb only */
579b285192aSMauro Carvalho Chehab 	struct videobuf_dvb_frontends frontends;
580b285192aSMauro Carvalho Chehab #endif
581b285192aSMauro Carvalho Chehab 
5828268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
583b285192aSMauro Carvalho Chehab 	/* For VP3045 secondary I2C bus support */
584b285192aSMauro Carvalho Chehab 	struct vp3054_i2c_state	   *vp3054;
585b285192aSMauro Carvalho Chehab #endif
586b285192aSMauro Carvalho Chehab 	/* for switching modulation types */
587b285192aSMauro Carvalho Chehab 	unsigned char              ts_gen_cntrl;
588b285192aSMauro Carvalho Chehab 
589b285192aSMauro Carvalho Chehab 	/* List of attached drivers; must hold core->lock to access */
590b285192aSMauro Carvalho Chehab 	struct list_head	   drvlist;
591b285192aSMauro Carvalho Chehab 
592b285192aSMauro Carvalho Chehab 	struct work_struct	   request_module_wk;
593b285192aSMauro Carvalho Chehab };
594b285192aSMauro Carvalho Chehab 
595b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
596b285192aSMauro Carvalho Chehab 
597b285192aSMauro Carvalho Chehab #define cx_read(reg)             readl(core->lmmio + ((reg)>>2))
598b285192aSMauro Carvalho Chehab #define cx_write(reg,value)      writel((value), core->lmmio + ((reg)>>2))
599b285192aSMauro Carvalho Chehab #define cx_writeb(reg,value)     writeb((value), core->bmmio + (reg))
600b285192aSMauro Carvalho Chehab 
601b285192aSMauro Carvalho Chehab #define cx_andor(reg,mask,value) \
602b285192aSMauro Carvalho Chehab   writel((readl(core->lmmio+((reg)>>2)) & ~(mask)) |\
603b285192aSMauro Carvalho Chehab   ((value) & (mask)), core->lmmio+((reg)>>2))
604b285192aSMauro Carvalho Chehab #define cx_set(reg,bit)          cx_andor((reg),(bit),(bit))
605b285192aSMauro Carvalho Chehab #define cx_clear(reg,bit)        cx_andor((reg),(bit),0)
606b285192aSMauro Carvalho Chehab 
607b285192aSMauro Carvalho Chehab #define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
608b285192aSMauro Carvalho Chehab 
609b285192aSMauro Carvalho Chehab /* shadow registers */
610b285192aSMauro Carvalho Chehab #define cx_sread(sreg)		    (core->shadow[sreg])
611b285192aSMauro Carvalho Chehab #define cx_swrite(sreg,reg,value) \
612b285192aSMauro Carvalho Chehab   (core->shadow[sreg] = value, \
613b285192aSMauro Carvalho Chehab    writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
614b285192aSMauro Carvalho Chehab #define cx_sandor(sreg,reg,mask,value) \
615b285192aSMauro Carvalho Chehab   (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | ((value) & (mask)), \
616b285192aSMauro Carvalho Chehab    writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
617b285192aSMauro Carvalho Chehab 
618b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
619b285192aSMauro Carvalho Chehab /* cx88-core.c                                                 */
620b285192aSMauro Carvalho Chehab 
621b285192aSMauro Carvalho Chehab extern void cx88_print_irqbits(const char *name, const char *tag, const char *strings[],
622b285192aSMauro Carvalho Chehab 			       int len, u32 bits, u32 mask);
623b285192aSMauro Carvalho Chehab 
624b285192aSMauro Carvalho Chehab extern int cx88_core_irq(struct cx88_core *core, u32 status);
625b285192aSMauro Carvalho Chehab extern void cx88_wakeup(struct cx88_core *core,
626b285192aSMauro Carvalho Chehab 			struct cx88_dmaqueue *q, u32 count);
627b285192aSMauro Carvalho Chehab extern void cx88_shutdown(struct cx88_core *core);
628b285192aSMauro Carvalho Chehab extern int cx88_reset(struct cx88_core *core);
629b285192aSMauro Carvalho Chehab 
630b285192aSMauro Carvalho Chehab extern int
631b285192aSMauro Carvalho Chehab cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
632b285192aSMauro Carvalho Chehab 		 struct scatterlist *sglist,
633b285192aSMauro Carvalho Chehab 		 unsigned int top_offset, unsigned int bottom_offset,
634b285192aSMauro Carvalho Chehab 		 unsigned int bpl, unsigned int padding, unsigned int lines);
635b285192aSMauro Carvalho Chehab extern int
636b285192aSMauro Carvalho Chehab cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
637b285192aSMauro Carvalho Chehab 		     struct scatterlist *sglist, unsigned int bpl,
638b285192aSMauro Carvalho Chehab 		     unsigned int lines, unsigned int lpi);
639b285192aSMauro Carvalho Chehab extern int
640b285192aSMauro Carvalho Chehab cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
641b285192aSMauro Carvalho Chehab 		  u32 reg, u32 mask, u32 value);
642b285192aSMauro Carvalho Chehab extern void
643b285192aSMauro Carvalho Chehab cx88_free_buffer(struct videobuf_queue *q, struct cx88_buffer *buf);
644b285192aSMauro Carvalho Chehab 
645b285192aSMauro Carvalho Chehab extern void cx88_risc_disasm(struct cx88_core *core,
646b285192aSMauro Carvalho Chehab 			     struct btcx_riscmem *risc);
647b285192aSMauro Carvalho Chehab extern int cx88_sram_channel_setup(struct cx88_core *core,
648b285192aSMauro Carvalho Chehab 				   const struct sram_channel *ch,
649b285192aSMauro Carvalho Chehab 				   unsigned int bpl, u32 risc);
650b285192aSMauro Carvalho Chehab extern void cx88_sram_channel_dump(struct cx88_core *core,
651b285192aSMauro Carvalho Chehab 				   const struct sram_channel *ch);
652b285192aSMauro Carvalho Chehab 
653b285192aSMauro Carvalho Chehab extern int cx88_set_scale(struct cx88_core *core, unsigned int width,
654b285192aSMauro Carvalho Chehab 			  unsigned int height, enum v4l2_field field);
655b285192aSMauro Carvalho Chehab extern int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
656b285192aSMauro Carvalho Chehab 
657b285192aSMauro Carvalho Chehab extern struct video_device *cx88_vdev_init(struct cx88_core *core,
658b285192aSMauro Carvalho Chehab 					   struct pci_dev *pci,
659b285192aSMauro Carvalho Chehab 					   const struct video_device *template_,
660b285192aSMauro Carvalho Chehab 					   const char *type);
661b285192aSMauro Carvalho Chehab extern struct cx88_core* cx88_core_get(struct pci_dev *pci);
662b285192aSMauro Carvalho Chehab extern void cx88_core_put(struct cx88_core *core,
663b285192aSMauro Carvalho Chehab 			  struct pci_dev *pci);
664b285192aSMauro Carvalho Chehab 
665b285192aSMauro Carvalho Chehab extern int cx88_start_audio_dma(struct cx88_core *core);
666b285192aSMauro Carvalho Chehab extern int cx88_stop_audio_dma(struct cx88_core *core);
667b285192aSMauro Carvalho Chehab 
668b285192aSMauro Carvalho Chehab 
669b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
670b285192aSMauro Carvalho Chehab /* cx88-vbi.c                                                  */
671b285192aSMauro Carvalho Chehab 
672b285192aSMauro Carvalho Chehab /* Can be used as g_vbi_fmt, try_vbi_fmt and s_vbi_fmt */
673b285192aSMauro Carvalho Chehab int cx8800_vbi_fmt (struct file *file, void *priv,
674b285192aSMauro Carvalho Chehab 					struct v4l2_format *f);
675b285192aSMauro Carvalho Chehab 
676b285192aSMauro Carvalho Chehab /*
677b285192aSMauro Carvalho Chehab int cx8800_start_vbi_dma(struct cx8800_dev    *dev,
678b285192aSMauro Carvalho Chehab 			 struct cx88_dmaqueue *q,
679b285192aSMauro Carvalho Chehab 			 struct cx88_buffer   *buf);
680b285192aSMauro Carvalho Chehab */
681b285192aSMauro Carvalho Chehab int cx8800_stop_vbi_dma(struct cx8800_dev *dev);
682b285192aSMauro Carvalho Chehab int cx8800_restart_vbi_queue(struct cx8800_dev    *dev,
683b285192aSMauro Carvalho Chehab 			     struct cx88_dmaqueue *q);
684b285192aSMauro Carvalho Chehab void cx8800_vbi_timeout(unsigned long data);
685b285192aSMauro Carvalho Chehab 
686b285192aSMauro Carvalho Chehab extern const struct videobuf_queue_ops cx8800_vbi_qops;
687b285192aSMauro Carvalho Chehab 
688b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
689b285192aSMauro Carvalho Chehab /* cx88-i2c.c                                                  */
690b285192aSMauro Carvalho Chehab 
691b285192aSMauro Carvalho Chehab extern int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
692b285192aSMauro Carvalho Chehab 
693b285192aSMauro Carvalho Chehab 
694b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
695b285192aSMauro Carvalho Chehab /* cx88-cards.c                                                */
696b285192aSMauro Carvalho Chehab 
697b285192aSMauro Carvalho Chehab extern int cx88_tuner_callback(void *dev, int component, int command, int arg);
698b285192aSMauro Carvalho Chehab extern int cx88_get_resources(const struct cx88_core *core,
699b285192aSMauro Carvalho Chehab 			      struct pci_dev *pci);
700b285192aSMauro Carvalho Chehab extern struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
701b285192aSMauro Carvalho Chehab extern void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
702b285192aSMauro Carvalho Chehab 
703b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
704b285192aSMauro Carvalho Chehab /* cx88-tvaudio.c                                              */
705b285192aSMauro Carvalho Chehab 
706b285192aSMauro Carvalho Chehab void cx88_set_tvaudio(struct cx88_core *core);
707b285192aSMauro Carvalho Chehab void cx88_newstation(struct cx88_core *core);
708b285192aSMauro Carvalho Chehab void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
709b285192aSMauro Carvalho Chehab void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
710b285192aSMauro Carvalho Chehab int cx88_audio_thread(void *data);
711b285192aSMauro Carvalho Chehab 
712b285192aSMauro Carvalho Chehab int cx8802_register_driver(struct cx8802_driver *drv);
713b285192aSMauro Carvalho Chehab int cx8802_unregister_driver(struct cx8802_driver *drv);
714b285192aSMauro Carvalho Chehab 
715b285192aSMauro Carvalho Chehab /* Caller must hold core->lock */
716b285192aSMauro Carvalho Chehab struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board_type btype);
717b285192aSMauro Carvalho Chehab 
718b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
719b285192aSMauro Carvalho Chehab /* cx88-dsp.c                                                  */
720b285192aSMauro Carvalho Chehab 
721b285192aSMauro Carvalho Chehab s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
722b285192aSMauro Carvalho Chehab 
723b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
724b285192aSMauro Carvalho Chehab /* cx88-input.c                                                */
725b285192aSMauro Carvalho Chehab 
726b285192aSMauro Carvalho Chehab int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
727b285192aSMauro Carvalho Chehab int cx88_ir_fini(struct cx88_core *core);
728b285192aSMauro Carvalho Chehab void cx88_ir_irq(struct cx88_core *core);
729b285192aSMauro Carvalho Chehab int cx88_ir_start(struct cx88_core *core);
730b285192aSMauro Carvalho Chehab void cx88_ir_stop(struct cx88_core *core);
731b285192aSMauro Carvalho Chehab extern void cx88_i2c_init_ir(struct cx88_core *core);
732b285192aSMauro Carvalho Chehab 
733b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
734b285192aSMauro Carvalho Chehab /* cx88-mpeg.c                                                 */
735b285192aSMauro Carvalho Chehab 
736b285192aSMauro Carvalho Chehab int cx8802_buf_prepare(struct videobuf_queue *q,struct cx8802_dev *dev,
737b285192aSMauro Carvalho Chehab 			struct cx88_buffer *buf, enum v4l2_field field);
738b285192aSMauro Carvalho Chehab void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
739b285192aSMauro Carvalho Chehab void cx8802_cancel_buffers(struct cx8802_dev *dev);
740b285192aSMauro Carvalho Chehab 
741b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
742b285192aSMauro Carvalho Chehab /* cx88-video.c*/
743b285192aSMauro Carvalho Chehab int cx88_enum_input (struct cx88_core  *core,struct v4l2_input *i);
744b530a447SHans Verkuil int cx88_set_freq(struct cx88_core  *core, const struct v4l2_frequency *f);
745b285192aSMauro Carvalho Chehab int cx88_video_mux(struct cx88_core *core, unsigned int input);
746b285192aSMauro Carvalho Chehab void cx88_querycap(struct file *file, struct cx88_core *core,
747b285192aSMauro Carvalho Chehab 		struct v4l2_capability *cap);
748